Tool/software:
Dear TI Support,
I am currently working with the TMS570LC4357 microcontroller and came across the CDDIS
(Clock Domain Disable) register, particularly the bit related to the GCLK1
domain (SETGCLK1OFF
). According to the documentation, this bit can disable the GCLK1
domain, which I understand is feeding critical components such as the CPU and CCM.
Specific Questions:
- Purpose: What is the intended use case or purpose for disabling the
GCLK1
domain? Under what scenarios should this bit be toggled? - Impacts: If the
GCLK1
domain is disabled by setting this bit, should we expect an immediate halt of the CPU and other critical system functions? What safeguards are implemented to handle such an event? - Interrupts: Considering the CPU relies on the
GCLK1
domain, if theGCLK1
domain is disabled, how are interrupts affected? Would the system lose the capability to handle interrupts immediately? - Recovery: In case the
GCLK1
domain is disabled, how does the system recover? Is there an automatic restart mechanism, or would it require manual intervention/reset? - Power Management: Is disabling
GCLK1
part of any power management strategy, such as placing the CPU in a low-power state, or preparing the system for shutdown or deep sleep? If so, how are these managed to ensure system stability upon re-enabling the clock?
Understanding these aspects is crucial for our project and system stability. Any insights or additional documentation you could provide would be highly valuable.
Thank you for your assistance.
Best Regards