TMS320F28388D: CPUSEL0 register : can ePWM block be accessed both CPU1 and CPU2 ?

Hidehiko-san,

Hidehiko Kaya said:

TRM : CPUSEL0 , a user can select which CPU is connected with each ePWM

As mentioned in TRM, CPUSEL is control for mux which select the access from CPU1 or CPU2. 

In your example, you have assigned some of the ePWM to CPU1 and some to CPU2 and that should work. If you are asking about sync source then that is independent of CPUSEL. You should be able to select the ePWM16 as sync source for any of the ePWM irrespective of which CPU has access to that ePWM. 

Hope this is clear.

Regards,

Vivek Singh

Vivek-san,

Thank you for your answer.

I would like to know what you meaning.

>As mentioned in TRM, CPUSEL is control for mux which select the access from CPU1 or CPU2.

When ePWM1 is connected with CPU1,  a software on CPU2 can not access ePWM1.

 F28388D datasheet(SPRSP14D – MAY 2019)

8.5 Bus Architecture – Peripheral Connectivity

This mentioned below ?

When a peripheral is assigned to CPU1, a software on CPU1 cannot access(read/write) that peripheral.

Best regards,

Hidehiko

Hidehiko-san,

Hidehiko Kaya said:

When ePWM1 is connected with CPU1,  a software on CPU2 can not access ePWM1.

This is correct.

Hidehiko Kaya said:

When a peripheral is assigned to CPU1, a software on CPU1 cannot access(read/write) that peripheral.

Where is this mentioned ? Can you take a snapshot of that section and post it here. 

Regards,

Vivek Singh

Vivek-san,

I'm sorry for my mistake.

When a peripheral is assigned to CPU1, a software on CPU2 cannot access(read/write) that peripheral.

Except ADC_A,B,C,D result register,

each peripheral allows only one CPU access.

Is my understanding right ? 

ADC result registers are readable form all masters.

Best regards,

Hidehiko

Vivek-san,

Thank you for your quick answer.

I understand.

And we plan to use HRPWM. 

When HRPWM is enabled, a below use case is acceptable ?

CPU1 :  ePWM 1, 2, 3, 16 are assigned( = a user software control), sync source ePWM16

CPU2 :  ePWM 4, 5, 6 are assigned, sync source ePWM16

And

CPUSEL25[HRCAL_A] = 0 (CPU1)

I do not find detailed information about HRCAL.

Could you please provide more document ?

Best regards,

Hidehiko

For this I need to loop-in our ePWM expert. Please wait for his response on this.

Regards,

Vivek Singh

Yes you can do what you have with HRPWM as well. Just make sure that EPWM1 which the calibration SFO library runs on is assigned to CPU1.

Nima

Hi, Nima

Thank you for your reply.

Nima Eskandari said:

Just make sure that EPWM1 which the calibration SFO library runs on is assigned to CPU1.

When HRPWM is enabled,

ePWM1 must be assigned to CPU1, and a user software on CPU1 should calls SFO().

Is it right ?

Best regards,

Hidehiko

Hi, Nima

"ePWM1 must be assigned to CPU1, and a user software on CPU1 should calls SFO()."

Unfortunately I can not find this information on TRM, datasheet.

If you know description on any manuals, could you please let me know ?

If there is no information, could you please add the below information on next TRM ?

Best regards,

Hidehiko

Hi, Nima

Thank you for your reply. I wait for your update.

Best regards,

Hidehiko