Other Parts Discussed in Thread: C2000WARE
Hello,
just have a question regarding the note on page 1874 TRM (chapter 18.15.1.5.4.1 High-Resolution Period Configuration):
"When high-resolution period mode is enabled, an EPWMxSYNC pulse will introduce +/- 1 - 2 cycle jitter to the PWM (+/- 1 cycle in up-count mode and +/- 2 cycle in up-down count mode). For this
reason, TBCTL[SYNCOSEL] should not be set to 1 (CTR = 0 is EPWMxSYNCO source) or 2 (CTR = CMPB is EPWMxSYNCO source). Otherwise, the jitter will occur on every PWM cycle with the
synchronization pulse. When TBCTL[SYNCOSEL] = 0 (EPWMxSYNCI is EPWMxSYNCO source), a software synchronization pulse should be issued only once during high-resolution period initialization. If a
software sync pulse is applied while the PWM is running, the jitter will appear on the PWM output at the time of the sync pulse."
- I understand that the jitter is not on the current ePWM HRPWM output but the following ePWM which is synchronized by the EPWMxSYNC pulse?
- doesn't matter if the following PWM is in normal or HR mode?
- jitter has a size of +/-1-2 PWM clocks not HR steps?
Regards, Holger
