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TMS320F28388S: Using ESC EEPROM emulation

Part Number: TMS320F28388S

Is there an example of using a block of the CM's Flash memory instead of a dedicated EEPROM chip for the EtherCAT module specifically?

Also is there any TI documentation that has a more centralized location for all of the settings and configurations for EEPROM Emulation? The Beckhoff documentation speaks spec generics, and I was hoping to find some more TI specific configuration information.

  • Hi Jacob,

    We don't have an example for ESC EEPROM emulation currently, but we are actively looking into adding support for it. If you're able to answer the questions below, that would actually help us out.

      • Number of times needing to change the EEPROM contents during the life of the product?
      • Size of EEPROM support needed? EtherCAT specs up to 4 MB, but this seems much larger than what most users would use.
      • Is drop in support to match external EEPROM method needed?
    Also is there any TI documentation that has a more centralized location for all of the settings and configurations for EEPROM Emulation? The Beckhoff documentation speaks spec generics, and I was hoping to find some more TI specific configuration information.

    The F2838x device EEPROM emulation implementation will look somewhat different than what Beckhoff documents. I don't have further specifics to share right now unfortunately.

    Thanks,

    Kevin

  • We'd only be storing the standard EtherCAT SII so it would only change as often as the spec has that interface change. And by my estimates it would be well contained inside of a 4K block. The access to the EEPROM would not need to be changed often as it would only be directly accessed by the ESC.

    It sounds like using an external EEPROM that is dedicated to the ESC seems to be the most stable choice for the moment, based on your response. 

    When could we expect there to be documentation and example implementation for this use case?

  • Hi Jacob,

    Thanks for sharing the details on your usage, it helps with our plans.


    It sounds like using an external EEPROM that is dedicated to the ESC seems to be the most stable choice for the moment, based on your response. 

    That's correct, this is the only option we support right now.

    When could we expect there to be documentation and example implementation for this use case?

    We don't have a formal schedule right now, but hopefully we can have a schedule established soon. The answers you provided help us narrow down the scope of the feature. Lower memory sizes and # of EEPROM content changes should make it easier to implement.

    Best,

    Kevin