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TMS320F280049C: PWM sync issue

Part Number: TMS320F280049C
Other Parts Discussed in Thread: SYSCONFIG

Hi Expert,

My customer use several PWM module that require sync event,  they use software to sync EPWM1, they find that after set TBCLKSYNC to 1, they have to use Delay function which delay 1400us so that EPWM2 will sync up with EPWM1, otherwise there will fail to sync up. 

The PWM period is only 4us, Could you help explain why require delay so long that it can work normally? thanks. 

  • Hi Strong,

    My customer use several PWM module that require sync event,  they use software to sync EPWM1, they find that after set TBCLKSYNC to 1, they have to use Delay function which delay 1400us so that EPWM2 will sync up with EPWM1, otherwise there will fail to sync up. 

    The synchronization model for the F28004x device is shown below.

    EPWM2 can be synchronized to EPWM1 since the SYNC OUT pulse of EPWM1 is directly connected to EPWM2 (internal to the device).

    The synchronization scheme is mostly used when you want to apply a phase shift between epwm modules. Is this the intent? If so, there should be no phase applied to EPWM1 (since this is the synchronization source). 

    PHSEN should actually be disabled and SYNCOSEL should be set to EPWMxSYNCI / SWFSYNC with phase shift set to zero.

    EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;//TB_ENABLE;//lzy for TBPRDHR  TB_DISABLE
    EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through

    For the rest of the modules you want within the synchronization scheme, like EPWM2, you have to enable the phase shift and then provide the SYNC OUT pulse. The code you have is correct, but note that every time there is a software sync pulse from EPWM1, the time base counter (TBCTR) of EPWM2 will move to 2 (TBCTR=2) since TBPHS is set to 2.

    EPwm2Regs.TBPHS.bit.TBPHS = 2;
    EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;//TB_ENABLE;//lzy for TBPRDHR
    EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through

    I would also like to share this information from the TRM:

    You would need to take into account for these extra cycles depending on the EPWMCLK. 

    If you would like both EPWM1 and EPWM2 to start at the same time, then when TBCLKSYNC = 1 this means that the time-base counter for all EPWM modules will start. In the screenshot you provided EPWM1 and EPWM2 have different TBCTR values when TBCLKSYNC is set to 1 so naturally they will be offset with one another.

    The delay between the EPWM modules should be handled through the phase shift value not by changing TBCTR values. 

    Can you please work with the customer to implement the above changes?

    This video has an example of configuring the sync scheme. It is explained using SysConfig but the concept still holds: https://training.ti.com/c2000-enhanced-pulse-width-modulator-epwm-time-base-submodule?context=1137766-1149551-1149545 

    Best Regards,

    Marlyn

  • Hi Marlyn,

    Thanks for your  reply in detail.

    The customer use case is not normal use case, they only require EPWM1 and EPWM2 sync up at the first time when using Software sync method, they set different counter value for EPWM1 and EPWM2 just for test,  when use below command, TBCTR of EPWM1 and EPWM2 should be the same, but what they check is not by inset breakpoint in the code.

    EPwm1Regs.TBCTL.bit.SWFSYNC = 1;

    Only after add 1400us delay that TBCTR of EPWM1 and EPWM2 is the same.

    They want to know why require  add 1400us delay so that everything work as expect. 

  • Hi Strong,

    when use below command, TBCTR of EPWM1 and EPWM2 should be the same, but what they check is not by inset breakpoint in the code.

    When TBCLKSYNC is set to 1 the TBCTR of EPWM1 and EPWM2 will not be the same since they were initialized to different values. Where is the breakpoint being inserted? 

    To summarize, the goal is to have TBCTR of EPWM1 and EPWM2 be the same when the software sync occurs and not when TBCLKSYNC is called? 

    Best Regards,

    Marlyn

  • Hi Marlyn,

    To summarize, the goal is to have TBCTR of EPWM1 and EPWM2 be the same when the software sync occurs and not when TBCLKSYNC is called? 

    ---> Yes, that is right, when the software sync occurs, TBCTR of EPWM1 and EPWM2 should be the same, this is what they understand in theory, is it correct?

  • Hi Strong,

    Thank you for clarifying. In that case, you would need to set the TBPHS to the correct value, this is what the TBCTR counter gets set to when a software sync occurs.

    Best Regards,

    Marlyn

  • Marlyn,

    Thanks for your update,

    customer did the test that by setting TBPHS to 0 for both EPWM1 and EPMW2, it works and can sync up.

    but if they change TBPHS to 2 for both EPWM1 and EPMW2, then it did not work and didnot sync up.

    customer are asking any further explain that require only setting TBPHS to 0 that can work? 

  • Marlyn,

    If they set TBPHS to 2 for both EPWM1 and EPMW2, then they got the different value of TBCTR as below showed.

    If they set TBPHS to 0for both EPWM1 and EPMW2,  Actually TBCTR is not absolutely the same, relationship is EPWM1 TBCTR = EPWM2 TBCTR -1 as below showed.

    This is not what they expected, what they want is that EPWM1 TBCTR = EPWM2 TBCTR

    But if they set EPWM1 TBPHS = 0, EPWM2 TBPHS =1 at the beginning, EPWM1 TBCTR have a big different value compared with EPWM2 TBCTR.

    Below phenomenon did not work as expected, any explanation for this? customer want to fix the software for mass production, so they request to know all details and how PWM sync up feature work. 

  • Hi Strong,

    If they set TBPHS to 0for both EPWM1 and EPMW2,  Actually TBCTR is not absolutely the same, relationship is EPWM1 TBCTR = EPWM2 TBCTR -1 as below showed.

    This is not what they expected, what they want is that EPWM1 TBCTR = EPWM2 TBCTR

    This is most likely attributed to the note I inserted within my initial reply:

    The extra cycle needs to be accounted for in the TBPHS of EPWM2. 

    Best Regards,

    Marlyn