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TMS320F28069: CAN status bit

Cherry Zhou
Mastermind 22235 points
Part Number: TMS320F28069

Hi team,

Here's an issue from the customer may need your help:

Debug CAN receive stability, CAN transmit and receive normal after DSP software is running.

Then try to unplug the CAN cable and then connect the CAN device, after several consecutive plug-and-connect times, the two bit CCEs and ACKE of canes are set up, and CAN is not able to transmit or receive properly. Does ACKE relate to the hardware cable? Under what circumstances will CCE be set?

Sometimes SMA, SE errors are set, but these bits should not cause can to receive and transmit incorrectly.

Could you help check this case? Thanks.

Best Regards,

Cherry

  • 0
    TI__Guru* 95315 points
    Cherry Zhou said:
    Does ACKE relate to the hardware cable?

    ACKE has nothing to do with H/W cable. ACKE happens when no other node on the network transmits the ACK signal.

    Cherry Zhou said:
    Under what circumstances will CCE be set?

    CCE will be set under two situations:

    1. When CCR bit is set by the s/w in order to configure CANBTC
    2. When CCR bit is set by the CAN module under a bus-off condition

    In both situations, transmit/receive will not happen.

    Cherry Zhou said:

    Sometimes SMA, SE errors are set, but these bits should not cause can to receive and transmit incorrectly.

    SMA will not. SE indicates that a stuff error happened.

  • 0 in reply to Hareesh Janakiraman
    TI__Mastermind 22235 points

    Hi Hareesh,

    Thanks for your support.

    Hareesh Janakiraman said:
    When CCR bit is set by the CAN module under a bus-off condition

    Bus-off condition, is this referring to unplugging the CAN line? 

    And now the case is when hardware is disturbed, the CAN connection fails completely and the CAN connection does not return to normal even when external interference is removed. 

    Thanks and regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Guru* 95315 points
    Cherry Zhou said:
    Bus-off condition, is this referring to unplugging the CAN line? 

    No. Bus-off is a condition when the TEC or REC is ≥ 255. BO happens when there is a large number of errors during communication. Note that BO can be caused by unplugging the CAN line. 

    Cherry Zhou said:
    CAN connection does not return to normal even when external interference is removed. 

    Node may be in BO condition. If so, it will not participate in communication. If ABO=1, node can come out of BO automatically provided there are no more errors. If ABO=0, node will stay in BO. That is probably what is happening.

  • 0 in reply to Hareesh Janakiraman
    Prodigy 70 points

    Then current situation is how can I make CAN link recover even this error happen ? Or the recovery is possible only after power on-off ? 
    Or what can I do under current situation , like re-init some register?

  • 0 in reply to Hareesh Janakiraman
    TI__Mastermind 22235 points

    Hi Hareesh,

    Xiaohuang Li is my customer and you could directly discuss this issue in this thread, if you need any further assistance please let me know.

    Thanks and regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Guru* 95315 points

    Xiaohuang,

                    Repeatedly disturbing a node (deliberately) is likely to increment the Transmit or Receive Error counters to > 255, thereby pushing the node to bus-off (BO) state. You can verify if the node is indeed in BO by checking if CCR bit is 1.

    There are two ways to come out of BO:

    1. Manual method: Clear the CCR bit upon BO.
    2. Automatic method: Make ABO=1 during initialization.
  • 0 in reply to Hareesh Janakiraman
    Prodigy 70 points

    I am still confused why CCE bit can be set after DSP has init eCAN successfully.

    My issue is CCE bit is set after several times plug-unplug CAN device.

    Can I use the way you have mentioned as above to resolve my issue ? 

    Now, seems the issue can resolved after power-off and power on again. This is not my intention. My intention is to recover CAN tx-rx without power-off & power-on;

  • 0 in reply to Xiaohuang Li
    Prodigy 70 points

    I found another phenomenon that after CAN RX-TX does not work, then I watch CANES register, no TM can be set to 1 even if the DSP software has  a large quantities of data is being sent.


    Per my understanding, event TX will result in TM set ,right ? but now, it is not;
    Why this happen ?

  • 0 in reply to Xiaohuang Li
    TI__Guru* 95315 points
    Xiaohuang Li said:
    I am still confused why CCE bit can be set after DSP has init eCAN successfully

    CCE bit will be set every time CCR bit is set.

    Xiaohuang Li said:
    My issue is CCE bit is set after several times plug-unplug CAN device.

    That is because CCR bit is set due to the node going bus-off.

    Xiaohuang Li said:
    Can I use the way you have mentioned as above to resolve my issue ? 

    Yes.

    Xiaohuang Li said:
    My intention is to recover CAN tx-rx without power-off & power-on;

    No need to power cycle. If the node is in bus-off condition, you can bring it our of bus-off by clearing the CCR bit. This is applicable if you don't want to recover from BO automatically. Another option is to perform a software reset using the SRES bit.

    Xiaohuang Li said:
    Per my understanding, event TX will result in TM set ,right ? but now, it is not;

    TM will indeed be set while the module is transmitting. Ensure the module is actually transmitting and use 32-bit reads. See www.ti.com/lit/SPRA876 for information.

  • 0 in reply to Hareesh Janakiraman
    Prodigy 70 points

    Thanks for your reply,

    I find once the issue as mentioned as above happen, If I re-invoke InitECana(void) will help bring eCAN RX-Tx back to normal status.

    BTW, if SRES bit is set again, must eCAN be re-init or nor ?

  • 0 in reply to Xiaohuang Li
    TI__Guru* 95315 points
    Xiaohuang Li said:
    I find once the issue as mentioned as above happen, If I re-invoke InitECana(void) will help bring eCAN RX-Tx back to normal status.

    That is because CCR bit is set and cleared in the initialization process.

    Xiaohuang Li said:
    BTW, if SRES bit is set again, must eCAN be re-init or nor ?

    It is a good practice to re-initialize the registers. As stated in the TRM, the MBX contents are not modified.

  • 0 in reply to Hareesh Janakiraman
    Prodigy 70 points

    do you mean this setting will help ?

    {
    /* Create a shadow register structure for the CAN control registers. This is
    needed, since only 32-bit access is allowed to these registers. 16-bit access
    to these registers could potentially corrupt the register contents or return
    false data. */

    struct ECAN_REGS ECanaShadow;

    //////////////////////////////////////////////////////
    // 0~23 is TX
    //////////////////////////////////////////////////////
    CONFIG_TX_MSG_BOXS();

    //////////////////////////////////////////////////////
    // 24~31 is Rx
    //////////////////////////////////////////////////////
    CONFIG_RCV_MSG_BOXS();

    // TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
    // as a matter of precaution.

    ECanaRegs.CANTA.all = 0xFFFFFFFF; /* Clear all TAn bits */
    ECanaRegs.CANRMP.all = 0xFFFFFFFF; /* Clear all RMPn bits */

    ECanaRegs.CANGIF0.all = 0xFFFFFFFF; /* Clear all interrupt flag bits */
    ECanaRegs.CANGIF1.all = 0xFFFFFFFF;

    /* Configure bit timing parameters for eCANA*/

    EALLOW;
    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU has been granted permission to change the configuration registers
    do
    {
    ECanaShadow.CANES.all = ECanaRegs.CANES.all;
    } while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set..

    // Step 6. Program the master control register (CANMC) as follows:
    // 1. Clear CCR (CANMC.12) = 0
    // 2. Clear PDR (CANMC.11) = 0
    // 3. Clear DBO (CANMC.10) = 0
    // 4. Clear WUBA (CANMC.9)= 0
    // 5. Clear CDR (CANMC.8) = 0
    // 6. Clear ABO (CANMC.7) = 1
    // 7. Clear STM (CANMC.6) = 0
    // 8. Clear SRES (CANMC.5) = 0
    // 9. Clear MBNR (CANMC.4-0) = 0

    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
    ECanaShadow.CANMC.bit.CCR = 0 ; // Set CCR = 0
    ECanaShadow.CANMC.bit.PDR = 0 ; // Set PDR = 0
    ECanaShadow.CANMC.bit.DBO = 0 ; // Set DBO = 0
    ECanaShadow.CANMC.bit.WUBA = 0 ; // Set WUBA = 0
    ECanaShadow.CANMC.bit.CDR = 0 ; // Set CDR = 0
    ECanaShadow.CANMC.bit.ABO = 1 ; // Set ABO = 1
    ECanaShadow.CANMC.bit.STM = 0 ; // Set STM = 0
    ECanaShadow.CANMC.bit.SRES = 0 ; // Set SRES = 0
    ECanaShadow.CANMC.bit.MBNR = 0 ; // Set MBNR = 0
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

    // Wait until the CPU no longer has permission to change the configuration registers
    do
    {
    ECanaShadow.CANES.all = ECanaRegs.CANES.all;
    } while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..
    EDIS;

    EALLOW;
    ECanaRegs.CANMIM.all = 0xFFFFFFFF;
    ECanaRegs.CANMIL.all = 0;
    ECanaRegs.CANGIF0.all = 0xFFFFFFFF;
    ECanaRegs.CANGIM.all = 0x0003FF07;
    EDIS;
    }

  • 0 in reply to Xiaohuang Li
    TI__Guru* 95315 points

    I am not clear what you are trying to accomplish with this code, so I cannot comment. CCR bit needs to be set only when configuring CANBTC register, not for CANMC register. Please refer to the examples in www.ti.com/lit/SPRA876.