TMS320F28069: Abnormal EPWM output occurred in random

Hi Champ,

I am asking for my customer.

There are two EPWMs (EPWM3 & EPWM8) operating in 18kHz independently, and both are set in up-down count. 

Both EPWM CMPA registers are configured as below which the CMPA values are given between 125 and 0 in a while loop.

while(1)
{
    if (a)
    {
        EPwm3Regs.CMPA.half.CMPA = 0;
        EPwm8Regs.CMPA.half.CMPA = 125;
        a = 0;
    }
    else
    {
        EPwm3Regs.CMPA.half.CMPA = 125;
        EPwm8Regs.CMPA.half.CMPA = 0;
        a = 1;
    }
}

The compare registers for both EPWM are in shadow mode, and load on when both CTR = PRD and CTR = Zero. Besides, the AQ is set High when CTR = Zero, and set low when CTR = CMPA for both EPWM3 and EPWM8.

(1). From above EPWM configuration, both EPWMs should take turn to have the EPWM signal (Figure1). However, somehow it is found out that either one would miss the output in a turn or have a short pulse which is supposed not to be there in random as below waveforms (Figure 2&3) .

(Figure1) Operating correctly. EPWM3 & EPWM8 take turn to have the EPWM signal in every period 

CH3 : EPWM3 ; CH4 : EPWM8 

(Figure2) Abnormal. EPWM8 has a abnormal short pulse ~200ns happening randomly

CH3 : EPWM3 ; CH4 : EPWM8 

(Figure3) Abnormal. EPWM3 misses a output in a period, circled in red.

CH3 : EPWM3 ; CH4 : EPWM8 

(2). With the same CMPA configured for both EPWM3 &  EPWM8, modify to load on CTR = PRD only. It is found out that either one EPWM would have the same consistent duty outputting at the same time or either one EPWM would miss the output in random. 

(Figure4) Abnormal. EPWM8 has the same consistent duty outputting at the same time when EPWM3 takes turn

CH3 : EPWM3 ; CH4 : EPWM8 

(Figure5) Abnormal. EPWM8 misses a output in a period, circled in red.

CH3 : EPWM3 ; CH4 : EPWM8

I am thinking whether both cases (1) and (2) is facing the NOTE condition from below that causes somehow EPWM isn't operating functionally.

Would the expert kindly share the thought for both cases over here ? To address the issue, should I use the workaround (use a non-zero counter compare) as suggested ?

Thanks and regards,

Johnny