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MSP430F5529 ADC required input current range

Other Parts Discussed in Thread: MSP430F5529

Hi,

I'm searching the MSP430F5529 datasheet (http://www.ti.com/lit/ds/symlink/msp430f5529.pdf) trying to find the information on how much current MSP430's ADC module need to be applied to analog input to be probed correctly. This is to properly calculate the voltage divider.
Input impedance of the analog input would allow me to calculate the typical current range (Ia = Uin / input impedance, where 0 < Uin < Vcc ) but cannot find it either.

How can I obtain this info from the datasheet?

Best Regards,

tml

• tml said:
How can I obtain this info from the datasheet?

You would want to read 5xx series Users Guide (SLAU208), ADC chapter "Sample Timing Considerations". There's formula to determine required voltage source impedance for given sample timing

• Ilmars said:
How can I obtain this info from the datasheet?

You would want to read 5xx series Users Guide (SLAU208), ADC chapter "Sample Timing Considerations". There's formula to determine required voltage source impedance for given sample timing[/quote]

This is not really what I am looking for, or I cannot interpret it the way that I need :)

These formulas state for minimum sampling times and not the minimum input signal current that is needed to be provided for analog input.

• tml said:
These formulas state for minimum sampling times and not the minimum input signal current that is needed to be provided for analog input.

ADC input is RC circuit which cannot be considered as constant current sink so asking to specify current of ADC input is... unproductive.

What's your problem you need to solve? Consider that the higher signal source impedance, the slower shall be sampling which in result impact sample rate.

• The ADC needs a certain charge (in As) rather than a current. The higher the source impedance and the smaller the maximum current, the more time you need in the sampling stage to fill the sampling capacitor.

There is a hint for the required minimum current: the minimum ADC clock speed tells you that for 13 clock cycles of this sped, the stored charge will dissipate to more than ½ LSB. This can be used to calculate the maximum source impedance to have the charge capacitor ever filled: the minimum input current needs to be larger than the leakage current.