TM4C129XNCZAD: 'Timer Compare Action Mode': output pin is not affected at compare match time

Markus Karas

Part Number: TM4C129XNCZAD
Other Parts Discussed in Thread: TM4C129CNCZAD, , SEGGER

Hello,

we have an issue using the ‘Timer Compare Action Mode’ on the TM4C microcontroller and hope you can support us. The connected output pin is not affected at compare match time.

Ambient conditions:

Target controller: TM4C129CNCZAD
Currently used controller: TM4C129XNCZAD on DK-TM4C129X evaluation board
Compiler: IAR Embedded Workbench for ARM 9.10.2.39460

Use case:

To control our physical process, we need several timers in combination with timer compare action mode to switch digital outputs at defined times in the future without processor action.

Timer A and B are use individual in 16-bit mode
Timers are configured as periodic with a timer interval load of 0xFFFF. Timers are free running and cannot be reinitialized during normal operation.
Digital output must only be switched at compare time. Timer timeout must not affect the digital output. The physical process is asynchronous to the timer period.

Used configuration:

TCACT in GPTMTnMR register is set to a non-zero value to configure the pin switching.
TnAMS bit is set to zero: Capture or compare mode is enabled.
For switching the output GPTMTnMATCHR register is set with the time for next switching.
Timer interrupt is configured for timer-match interrupt
GPIOs are connected to the timer using the MUX.

Issue / current behaviour:

Timer match interrupt correctly occurs at compare match time. à OK
The corresponding output is not switched at compare match time. à not OK
The corresponding output is switched at timer timeout. à not OK
All non-zero values of TCACT do not lead to an output pin action at compare match time.

Code extract:

void Timer1IntHandler(void)
{
    // this port switch is only for testing the timer match ISR
    GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_3, GPIO_PIN_3);
    TimerIntClear(TIMER1_BASE, TIMER_TIMA_MATCH);
    GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_3, 0);
}

int main(void)
{
    //
    // Run from the PLL at 120 MHz.
    // Note: SYSCTL_CFG_VCO_240 is a new setting provided in TivaWare 2.2.x and
    // later to better reflect the actual VCO speed due to SYSCTL#22.
    //
    ui32SysClock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
                                           SYSCTL_OSC_MAIN |
                                           SYSCTL_USE_PLL |
                                           SYSCTL_CFG_VCO_240), 120000000);

    //
    // Configure the device pins.
    //
    PinoutSet();

    //
    // Enable the peripherals used by this example.
    //
    SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);

    //
    // Enable processor interrupts.
    //
    IntMasterEnable();

    TimerConfigure(TIMER1_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC | TIMER_CFG_A_ACT_TOGGLE);
    
    TimerLoadSet(TIMER1_BASE, TIMER_A, 0xFFFF);
    TimerMatchSet(TIMER1_BASE, TIMER_A, 30000);

    IntEnable(INT_TIMER1A);
    
    TimerIntEnable(TIMER1_BASE, TIMER_TIMA_MATCH);

    GPIOPinConfigure(GPIO_PD2_T1CCP0);
    GPIOPinTypeTimer(GPIO_PORTD_BASE, GPIO_PIN_2);
    
    // configure output for ISR testing
    GPIOPinTypeGPIOOutput(GPIO_PORTQ_BASE, GPIO_PIN_3);
    GPIOPinWrite(GPIO_PORTQ_BASE, GPIO_PIN_3, 0);
       
    //
    // Enable the timers.
    //
    TimerEnable(TIMER1_BASE, TIMER_A);

    //
    // Loop forever while the timers run.
    //
    while(1)
    {
    }
}

We have the following questions:

Is it possible to configure Timer Compare Action Mode in such a way that only compare match affects the corresponding output pin? Timer timeout must not affect the output pin.
What error was made in the code sample so that the desired behaviour is not achieved.

Thank you very much for your support.

Best regards,

Markus Karas

over 3 years ago

0 Ralph Jacobi over 3 years ago

TI__Guru*** 134105 points

Hello Markus,

I replicated your current situation and understand what you are trying to do. We will probably need to work this further next week to get a resolution here but I can explain what is going on with your current configuration.

I am not 100% sure if it is possible to get the output to trigger on match and not timeout without manual GPIO control.

Here is the details of the GPTMTAMR register on Page 1130 of the Device Datasheet. Specifically, this is for the TCACT (Timer Compare Action Select) register bits:

Value Description

0x0 Disable compare operations.
0x1   Toggle State on Time-Out
0x2   Clear CCP on Time-Out
0x3   Set CCP on Time-Out
0x4   Set CCP immediately and toggle on Time-Out
0x5   Clear CCP immediately and toggle on Time-Out
0x6   Set CCP immediately and clear on Time-Out
0x7   Clear CCP immediately and set on Time-Out

All of these indicate actions only on timeout and not on match and so the behavior makes sense based on this.

I would need to dig deeper into how the match works for this to be sure, but it seems to me like the match won't trigger the toggling of the I/O, only an interrupt. And then in the interrupt you could handle the I/O toggle.

It is a holiday weekend in the US so I will pick this back up on Tuesday, but may not have a reply back to you until Wednesday. Hopefully these initial details help you understand your observations at least.

Best Regards,

Ralph Jacobi

0 Markus Karas over 3 years ago in reply to Ralph Jacobi

Prodigy 10 points

Hello Ralph,

Thank you very much for this first assessment. Your description matches the debug results we made.

In the manual on page 1114 our use case is described. Unfortunately we can't get the microcontroller to behave like that.

Timer Compare Action Mode
The timer compare mode is an extension to the GPTM's existing one-shot and periodic modes. This
mode can be used when an application requires a pin change state at some time in the future,
regardless of the processor state. The compare mode does not operate when the PWM mode is
active and is mutually exclusive to the PWM mode. The compare mode is enabled when the TAMR
field is set to 0x1 or 0x2 (one-shot or periodic), the TnAMS bit is 0 (capture or compare mode) and
the TCACT field is nonzero in the GPTM Timer n Mode (GPTMTnMR) register. Depending on the
TCACT encoding, the timer can perform a set, clear or toggle on the corresponding CCPn pin when
a timer match occurs. In 16-bit mode, the corresponding CCP pin can have an action applied, but
when operating in 32-bit mode, the action can only be applied to the even CCP pin.
The TCACT field can be changed while the GPTM is enabled to generate different combinations of
actions. For example, during a periodic event, encodings TCACT = 0x6 or 0x7 can be used to force
the initial state of the CCPn pin before the first interrupt and following that, TCACT=0x2 and TCACT=0x3
can be used (alternately) to change the sense of the pin for the subsequent toggle, while possible
changing load value for the next period.
The time-out interrupts used for one-shot and periodic modes are used in the compare action modes.
Thus, the TnTORIS bits in the GPTMRIS register are triggered if the appropriate mask bits are set
in the GPTMIM register.

Tank you very much for your support.

Best regards,

Markus Karas

0 Genatco over 3 years ago in reply to Markus Karas

Guru 55283 points

Hi Marcus,

Have you checked the silicon errata PDF about timer actions? There are odd behaviors for match on upcount mode on some classes of MCU.

Regards,

0 Markus Karas over 3 years ago in reply to Genatco

Prodigy 10 points

Hi,

thank you for the hint. We have already checked the errata. The listed topics do not correspond to the timer configuration used. We use periodic down counting timers, based on syclk.

Best regards,

Markus Karas

0 Genatco over 3 years ago in reply to Markus Karas

Guru 55283 points

That's good you checked errata first and have you used CCS debug to confirm all timer registers being set as desired?

0 Markus Karas over 3 years ago in reply to Genatco

Prodigy 10 points

We are using IAR Workbench combined with Segger's J-Trace. Yes, we have checked the registers to be correctly set according to the manual.

0 Genatco over 3 years ago in reply to Markus Karas

Guru 55283 points

I don't see the timer control event being configured in your listed code. We use the interrupt edge event like Ralph mentions.

/* Configure edge polarity capture events for CCP1. */
MAP_TimerControlEvent(TIMER0_BASE, TIMER_A, TIMER_EVENT_POS_EDGE);

0 Genatco over 3 years ago in reply to Genatco

Guru 55283 points

BTW: Seemingly CCP action events trigger is for GPIO captured events from package pins inward. Past experiments TM4C1294 never could get CCP pins to toggle a GPIO output to package pins. It's a capture event action for GPIO sense, not an output control action event.

0 Ralph Jacobi over 3 years ago in reply to Markus Karas

TI__Guru*** 134105 points

Hello Markus,

I agree that the description in the datasheet indicates that, but the registers seem to conflict with that which leaves me with doubt about if that functionality can actually be achieved. Unfortunately I was not able to spend much time on this today so I don't have any newer findings.

Best Regards,

Ralph

0 Markus Karas over 3 years ago in reply to Genatco

Prodigy 10 points

I guess TimerControlEvent() is only necessary in capture mode to define the edge to be captured. In compare mode this is not necessary in my opinion.

0 Markus Karas over 3 years ago in reply to Ralph Jacobi

Prodigy 10 points

Hi Ralph,
After all we have tried in the meantime, I think that the capture compare unit does not work as we need it to. Here the TM4C unfortunately differs from microcontrollers known so far.
Nevertheless it would be very helpful if you can give me some feedback if something else has been found out in this regard.

Thank you very much and best regards,
Markus

0 Genatco over 3 years ago in reply to Markus Karas

Guru 55283 points

You can force a timer to re-load well before time out event. Also in Oneshot mode the default reset match value is 32 bits wide, can be reduced to 0x1. The Oneshot mode can drive ADC sequencer trigger, perhaps even toggle CCPn pin on match count.

    MAP_TimerClockSourceSet(TIMER1_BASE, TIMER_CLOCK_SYSTEM);
    MAP_TimerConfigure(TIMER1_BASE, TIMER_CFG_ONE_SHOT);
    /* Load the 32 bit Match value for one shot
     * re-load GPTMnMATCHR Reset value (FFFF.FFFF)  */
    MAP_TimerMatchSet(TIMER1_BASE, TIMER_A, 0x1);
    /* Set IMR interrupt disabled for timeout events */
    MAP_TimerIntDisable(TIMER4_BASE, TIMER_TIMA_TIMEOUT|TIMER_TIMA_MATCH);

0 Ralph Jacobi over 3 years ago in reply to Markus Karas

TI__Guru*** 134105 points

Hello Markus,

Okay so as far as "timer can perform a set, clear or toggle on the corresponding CCPn pin when a timer match occurs" goes, you need to use one of the these settings:

0x4 Set CCP immediately and toggle on Time-Out
0x5 Clear CCP immediately and toggle on Time-Out
0x6 Set CCP immediately and clear on Time-Out
0x7 Clear CCP immediately and set on Time-Out

The problem is that this feature is not then setup to maintain that output. The signal will be toggled in some manner after the timeout. What I did find unusual is that instead of toggling on Time-Out, it toggled on the next Match set. So that behavior doesn't seem to line up with the exact register description, but I think in this case the datasheet isn't being explicit enough as the idea of needing to use other settings to toggle on timeout is mentioned explicitly:

For example, during a periodic event, encodings TCACT = 0x6 or 0x7 can be used to force
the initial state of the CCPn pin before the first interrupt and following that, TCACT=0x2 and TCACT=0x3
can be used (alternately) to change the sense of the pin for the subsequent toggle, while possible
changing load value for the next period.

Markus Karas said:
Digital output must only be switched at compare time. Timer timeout must not affect the digital output. The physical process is asynchronous to the timer period.

As far as I can tell, you'll need to manually control the I/O via an interrupt of some sort. I'm not quite sure what to suggest for your system though because I don't know realistically what the other options are for you without the Match feature working as you had desired.

Best Regards,

Ralph Jacobi

0 Markus Karas over 3 years ago in reply to Ralph Jacobi

Prodigy 10 points

Hello GI,

we have also thought of manipulating the timer reload value to solve the issue. The problem of this solution is that we use 7 timers for switching different hardware signals. All these timers must run synchronous to have the same time base. So, we cannot manipulate the timer value or timer reload value of single timers.

Thank you for your support.

Best regards, Markus

Hello Ralph,

thank you for your assessment. We did not find a configuration for compare output which is suitable for our needs. We now use the compare match interrupt and control the output pins manually. We must check if the increased latency caused by the interrupt (or higher priority interrupts) influence our control algorithm.

Thanks’ again for your support.

Best regards,
Markus

0 Karim Jamal over 3 years ago in reply to Markus Karas

TI__Expert 5465 points

implemented in interrupt routine.

solved and closed

Arm-based microcontrollers

Arm-based microcontrollers forum

TM4C129XNCZAD: 'Timer Compare Action Mode': output pin is not affected at compare match time