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[FAQ] Pre-production device information

Other Parts Discussed in Thread: MCF8316A

Errata - MCF8316A

Errata #

Errata

Functional impact

Workaround

Addressed in production samples?

 

 

1

Higher speed errors up to 5-10% are observed with PWM frequencies other than 15kHz, 30kHZ and 60kHz PWM frequencies

Device is functional for all the specified PWM frequencies. Speed errors are prominent and go up to 5-10% for certain PWM frequencies.

Recommended PWM frequencies for better speed accuracies are 15kHz, 30kHZ and 60kHz.

Yes, speed accuracy will be same across PWM from 10kHz to 75kHz.

2

Ripple in current waveform at sector change.

Distortion in current waveform resulting in higher harmonics

None available

Yes

 

3

Startup failures with IPD

IPD functionality on very low inductance and high resistance motors (for R/L > 7kHz) may fail as the current may not reach desired threshold.

Use alternate start up options like align, double align or slow first cycle methods for such motors

No

4

Longer start up time with Dynamic CSA gain (up to 1.5X increase)

Current reference is updated based on CSA gain, CSA gain is updated in 1ms ISR and limiting current reference for faster start up

Dynamic CSA gain to be disabled for fast start up requirements and chose CSA gain manually

Yes, startup time will be similar with dynamic CSA gain and fixed CSA gain 

5

Incorrect MPET functionality on low inductance motors

MPET loops forever on low inductance and high resistance motors (for R/L > 7kHz)

Limitation of MPET, need to manually enter R and L values before tuning the FOC algorithm

Yes, MPET will not loop forever and indicate a fault for low inductance and high resistance motors 

6

Brake functionality is improper when applied in standby state

Activate BRAKE through Pin or I2C configuration in standby state when low side braking is configured, MCF8316A reports current loop saturation fault

Ignore current loop saturation fault reported by MCF8316A during BRAKE state if low side braking is configured

Yes

7

Stop mode is defaulted to HI-Z while entering sleep mode

Motor stop options ignored and defaulted to HI-Z while entering sleep mode

None available

Yes, stop options are supported as per user configurations  

8

Latched fault clears automatically under multiple fault condition

Some of the latched faults like UVLO, OCP, OVP will be cleared automatically if multiple faults occur together and few of them configured for retry mode

None available

Yes

9

Pulses on nFAULT pin for some of the latched faults like OCP, CPUV, OVP.

nFAULT is pulled low but not held low when these faults occur.

Use fault status register for accurate fault state of execution instead of nFAULT pin

Yes, nFAULT will be remain low for all latched fault conditions  

10

With thermal shutdown, MCF8316A devices goes to reset

With thermal shutdown, MCF8316A devices goes to reset. In MCF8316 devices, buck voltage is used as DVDD IN. So, with thermal shutdown, buck output voltage is tri-stated, so device also goes to reset. Till buck voltage is up, we cannot communicate with device.

 

Restart the motor under thermal shutdown condition.

Yes, thermal shutdown triggers latched fault and does not reset the device. The status of thermal shutdown can be read through I2C register

11

FG_DIV by zero does not provide correct FG output

Motor functionality is not affected. FG signal is distorted.

Use FG_DIV values of 1 and above for clean FG output.

In production samples, FG_DIV will be same as electrical frequency.

12

Slew rates and dead-time compensation functionality

At 25V/µS slew rate, motor may not spin at higher PWM frequencies beyond 50kHz due to higher dead time. Beyond 90% duty cycle, delay compensation may cause stability issues with motor spinning.

None available

No

13

Spike in current waveform when transitioning from IPD startup to open loop.

Current waveform is not smooth with IPD startup, while other startup options like align, double align and slow first cycle do not reflect any spike in current. This current spike does not impact functionality, other than the minor distortion in current waveform before transitioning to closed loop.

None available

 

Yes

Errata – MCT8316AV (I2C variant)

Errata #

Errata

Use case

Functional impact

Workaround

Addressed in production samples?

1

ISD resync failures at low speeds.

When the motor is coasting during motor startup, if the peak to peak BEMF magnitude is less than 1000mV, Enabling ISD resync may result in loss of Sync Fault.

Loss of sync observed while resyncing during Motor startup.

Set the stationary back EMF threshold to value to 100mV.Set the stationary brake time to higher value to decay the speed to zero before restarting the motor.

Yes

2

ISD resync failures at low speeds.

When the motor is coasting during motor startup, even when the peak-peak BEMF magnitude is greater than stationary BEMF threshold, motor may restart instead of resyncing.

Loss of sync observed while restarting the Motor if motor is still spinning especially with IPD startup.

Set the stationary back EMF threshold to value greater than 100mV.Set the stationary brake time to higher value to decay the speed to zero before restarting the motor.

Yes

3

Current spikes during Motor Startup after ISD Re-sync Start.

During Motor Startup after successful ISD resync, spikes in currents are observed while the motor accelerates to Target duty cycle.

Spikes in Motor current after resyncing the motor in Closed loop.

Set the acceleration rates to higher values.

Yes

 

 

4

DC bus Voltage Spikes during Motor deceleration in Complimentary Mode.

During motor deceleration, with complimentary mode of operation, setting very high ramp down rate or setting higher Kp, Ki values may result in DC bus Voltage bump even if AVS is enabled.

Rise in DC bus during motor deceleration with very fast ramp down rates.

Set the Ramp down rates to lower values or Recommend to use Single ended mode to avoid voltage surges. In case of complimentary mode, enable High Side modulation, AAR, ASR with AVS enabled and lower the PWM frequency.

Yes

 

 

5

Motor not responding to External Speed command after deceleration.

With complementary mode of operation, if AVS is enabled, motor may get stuck in AVS duty control loop during Deceleration and may not respond to external speed input for longer time.

Longer / Infinite deceleration periods when AVS is enabled in complementary mode with Low inductance motors.

 

We can tune AVS_DEGLITCH_COUNT and AVS_DYN_RAMPDOWN_RATE to achieve better performance. Alternately disable AVS and set lower Ramp down rates to avoid voltage surges. Or Enable ASR and AAR with High side modulation to avoid Voltage Surge.

Yes

6

FG signal error during ISD resync.

Sudden frequency jumps on FG signal During Motor Startup with ISD – resync.

FG during ISD resync has irregular frequencies, prominent with FG configuration set to 3 times the electrical frequency

Use FG configuration set for 2 poles or higher.

Yes

7

DAC Speed out Clamped to max during ISD Resync.

During Motor Startup, if motor is coasting and ISD resync is enabled, motor resyncs the speed to closed loop value but DAC speed out is observed to be clamped to max value before settling down.

Speed oscillations on the DAC speed out line.

 

Wait for couples of cycles after resync/Startup before monitoring variables using DAC so that stable variables value can be monitored on DAC

Yes

8

Speed pin can’t be configured to bring the device out of sleep alone without setting speed command.

When device is set to sleep state, to bring the device out of sleep, Speed is to be configured to value greater than Sleep Exit voltage level. But this operation will also start spinning the motor.

No effect on configuring the speed pin based on user settings in EEPROM, Speed pin always gives the speed command irrespective of mode configured.

None available.

 

YES, speed pin can be configured for wake up only or speed input based on user configuration in EEPROM.

9

Active braking not applicable during Braking & Direction reversal.

During Braking or Direction reversal operation, the motor speed is brought down till brake duty threshold or Open loop duty cycle. During this time of operation, active braking is not enabled.  

 

Takes same time for braking or direction reversal irrespective of active braking configuration.

None available.

Yes

 

 

 

 

 

10

Functional issues with Gate driver setting of ASR and AAR.

Use Case 1: Enabling the ASR when AAR is disabled results in loss of Sync, Gate driver disabled.

Use Case 2: Enabling the ASR & AAR in Low side or Mixed modulation results in lower torque delivery to Motor.

Use Case 3: Spike in DC bus voltage with ASR & AAR enabled, Complimentary mode at very high ramp down rates, higher Kp, Ki values.

Mis-commutations, reduction in torque delivery or Spikes in DC bus voltage when configured improperly.

Use High side modulation only with ASR & AAR enabled.

 

Yes

 

 

11

CBC faults Latched when motor is stopped.

If the motor brakes are applied at higher speeds while stopping or hard braking the Motor, CBC fault is reported during the braking operation and fault is latched even after stopping the motor.

Spurious CSA cycle by cycle current limit faults and fault pin is pulled low indicating fault event even when motor is not spinning.

Configure the CBC fault in nFault inactive mode.

 

 

Yes

12

CBC RETRY PWM Mode not functional as expected.

If CBC limit mode set to multiple PWM retry, currently the number of PWM’s after which the device is turned on depends on the PWM frequency and can vary from 2-8 times the configured PWM.

Number of PWM’s after which pulses are applied will vary based on configured PWM frequency.

Set the PWM retry time value to 2.

Yes

 

 

13

External WDT is Disabled.

 

Setting external WDT and configurations to give the source for Watch Dog externally.

Cannot use External WDT functionality.

None available.

None

Errata – MCT8316AT (Hardware variant)

Errata #

Errata

Use case

Functional impact

Workaround

Addressed in production samples?

1

First start-up attempts after power-up in H-variant with speed input set to non-zero value results in stall fault if DIR function is set to 0.

 

Set DIR pin to Levels 0-7 and power-up the H-variant with speed input (via potentiometer) already set to a non-zero value.

 

First start-up attempts after power-up results in stall fault if DIR pin is set to Levels 0-7(DIR function set to 0) and speed input is already set to non-zero value.

Set DIR pin to Levels 8-15(DIR function should be set to 1). Only one direction of rotation is possible if first attempt fault is to be avoided. If first attempt fault is acceptable, user can set DIR function to 0; motor will spin on first retry (second start-up attempt) since H-variant is set to retry after 5s of stall fault by default.

 

Yes