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DRV8316: VCP_OV flag / OT Flag

Part Number: DRV8316

Hello together,

currently, we are evaluating first PCBA of or design, in which the DRV8316R is used. Unfortunatly, we are experiencing some issues with the diver and do not understand the reason for it's behaviour. 

1) Everytime we start up the driver, the status register 1 bit 7 (OTW bit) gets triggered. This will be cleared, if we set DRV_OFF to low after bootup but for series, it seems to be unsafe to enable a device, which shows OT flag. Why is the OT triggered, as there is no OT situation? How can we avoid this behavior?

2) Status register 2 bit 3 (VCP_UV) is triggered. As the supply voltage of the system is 24V (additional diode in series => 23.3V), the charge pump will deploy a higher voltage. I meassured the voltage @ Pin8 (CP output), which is ~28.5, which seems in an acceptable range. Could you confirm, that this is ok? Why is the flag trigged? Could you please tell, if there is a mistake in the design?

Thanks,

Florian

  • Hi Florian,

    Thanks for the question, this is interesting behavior. 

    1) Everytime we start up the driver, the status register 1 bit 7 (OTW bit) gets triggered. This will be cleared, if we set DRV_OFF to low after bootup but for series, it seems to be unsafe to enable a device, which shows OT flag. Why is the OT triggered, as there is no OT situation? How can we avoid this behavior?

    Is OTW bit the only bit that is a "1", or are all bits "1" in this state?

    Can you try keeping DRVOFF = low and ensure nSLEEP = high when VM powers above UVLO? I want to ensure the SPI registers are active. 

    There should be no reason for OTW to be triggered if there is no OT situation. 

    2) Status register 2 bit 3 (VCP_UV) is triggered. As the supply voltage of the system is 24V (additional diode in series => 23.3V), the charge pump will deploy a higher voltage. I meassured the voltage @ Pin8 (CP output), which is ~28.5, which seems in an acceptable range. Could you confirm, that this is ok? Why is the flag trigged? Could you please tell, if there is a mistake in the design?

    CP = 28.5V is fine (VM + 5V). Can you check to see if other status bits are "1"?

    Thanks,
    Aaron

  • Hi Aaron,

    thank you for your support! I had a wrong configuration of the SPI clock phase, this lead to errornous behavior of the SPI registers and its assignmets in SW.

    Furthermore, my SPI_UnlockRegisters was too fast after initialization of the chip and it was ignored (your hint with SPI active).

    Now everything is fine and I can read and write the expected values.

    Thanks,

    Florian