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DRV8876N: PH/EN Control mode setting won't work

Part Number: DRV8876N
Other Parts Discussed in Thread: DRV8876, DRV8874

Hello everyone,

I'm using the drv8876 stand-alone in following configuration of PH/EN Control mode:

in the follwiing schematics I show you my design:

The DRV8876 should work from "power on" in PH/EN Mode.
I use the PH/EN as I have only the PWM signal from another device  .

* I tied pmode=GND (to select the PH/EN mode).
* I tied  nSleep=High  (Out1 and Out2 enabled)

Problem:

The problem is that the outputs (out1 and out2)  of DRB8876 wont work, if I'm tying nSleep to +5V.
I think its because nSleep needs an low pulse for selecting the pMode Signal ?
So I put an R1/C19 combination  to nSleep to generate an low pulse to nSleep after power on. Put this is only for test purposes.

Is there another way to select PH/EN-Mode from power on, when I have no possibilty to change state of nSleep-Pin afterwards?


thank you in advance

Wolf

  • Hi Wolf,

    I noticed you have already posted the same question twice. I will reply and close the other thread.

    Regards,

    Pablo Armet

  • Hi Wolf,

    MODE pin is latched during power up (nSLEEP = HIGH and VM>UVLO). nSLEEP does not need to toggle LOW to HIGH. As long as it is always tied to external VCC supply, it will turn on. Your schematic is good.

    Which signal are you PWMing? the EN or PH pin?

    Regards,

    Pablo Armet

  • Hello Pablo,

    thank you for your answer. I hope this will help me.
    excuse my double post. I thought I erased it.

    >you wrote: MODE pin is latched during power up (nSLEEP = HIGH and VM>UVLO). nSLEEP does not need to toggle LOW to HIGH.

    Now I tested it once more in SPICE. I took the Spice Model from here : https://www.ti.com/lit/zip/slvmcq2.
    Unfortunately the out1 and out2 of DRV8876 in SPICE  will only work if I delayed the toggle on nSleep by a RC (yellow) during power up in SPICE.
    If I tied nSleep to VCC the outputs wont work. Could the misfunction an error in the SPICE-Model of DRV8876 ?

    Could it possible that the latch of pMode during powerup is not implemented in the SPICE-Model of the DRV8876 ?

    >Which signal are you PWMing? the EN or PH pin?
    Yes I put the PWM on PH Pin and set EN=Logic High.

    I read during the last days in data sheet
    https://www.ti.com/lit/ds/symlink/drv8876.pdf?ts=1685915003450&ref_url=https%253A%252F%252Fwww.google.com%252F
    page 10:
    "The PMODE pin state is latched when the device is enabled through the nSLEEP pin. The PMODE state can be changed by taking the nSLEEP pin logic low, waiting the tSLEEP time, changing the PMODE pin input, and then enabling the device by taking the nSLEEP pin back logic high".
    I found nothing about power on and nSleep behaviour.

    Thank you in advance

    Wolf

  • Hi Wolf,

    Let me investigate internally if there are any slew rate restrictions on the nSLEEP pin to accurately latch the MODE pin. 

    I will get back to you with a response within 24 hours.

    Regards,

    Pablo Armet

  • Hello Pablo,

    thank you for helping me. I have no idea how I could solve this proble,

    Regards Wolfi

     

  • Hello Pablo,

    is it useful to send you my Spice-simulation file ? Unfortunately I found no way to upload my  Spice Simulation into this forum.

    Or is the picture of my Spice Simulation helpful enough

    Regards Wolf

  • Hi wolf,

    Please do send me the PSPICE simulation. 

    I’m still investigating internally. Allow me more time to get an answer. 

    Regards,

    Pablo Armet

  • Hello Paböo How can I send you the SPICE Simulation ? I found no possibilty to upload it here in forum

  • Hello Pablo

    I'm not sure where to upload my Spice simulation . So I put the Code here into the following box.
    I'm using LTSpice . The Spice Model I took from TI Website : https://www.ti.com/lit/zip/slvmcq1.

    Here is my Spice-simulation Code

    Version 4
    SHEET 1 1552 680
    WIRE -816 -304 -992 -304
    WIRE -128 -272 -496 -272
    WIRE -16 -272 -128 -272
    WIRE 48 -272 -16 -272
    WIRE -992 -256 -992 -304
    WIRE 752 -224 624 -224
    WIRE -16 -208 -16 -272
    WIRE 48 -208 48 -272
    WIRE -752 -176 -752 -192
    WIRE -1072 -144 -1104 -144
    WIRE -992 -144 -992 -176
    WIRE -992 -144 -1008 -144
    WIRE -608 -144 -992 -144
    WIRE -1104 -128 -1104 -144
    WIRE -160 -128 -160 -144
    WIRE 624 -96 624 -224
    WIRE 976 -96 624 -96
    WIRE -144 -64 -800 -64
    WIRE 48 -64 48 -144
    WIRE 160 -64 48 -64
    WIRE 64 0 -32 0
    WIRE 240 0 64 0
    WIRE -32 16 -32 0
    WIRE -32 16 -256 16
    WIRE 64 16 64 0
    WIRE -592 32 -624 32
    WIRE -480 32 -528 32
    WIRE -32 48 -256 48
    WIRE -16 48 -16 -144
    WIRE -16 48 -32 48
    WIRE 0 48 -16 48
    WIRE -1056 64 -1200 64
    WIRE -800 64 -800 -64
    WIRE -800 64 -1056 64
    WIRE -624 64 -624 32
    WIRE -480 64 -624 64
    WIRE -208 80 -256 80
    WIRE -160 80 -208 80
    WIRE -32 80 -32 48
    WIRE 784 80 448 80
    WIRE 1104 80 784 80
    WIRE -480 96 -736 96
    WIRE 240 96 240 0
    WIRE 288 96 240 96
    WIRE 976 96 976 -96
    WIRE -1200 112 -1200 64
    WIRE -208 112 -208 80
    WIRE -208 112 -256 112
    WIRE -160 112 -160 80
    WIRE 624 112 624 -96
    WIRE 624 112 448 112
    WIRE 864 112 672 112
    WIRE -736 128 -736 96
    WIRE -736 128 -800 128
    WIRE -528 128 -672 128
    WIRE -480 128 -528 128
    WIRE 64 128 64 96
    WIRE 176 128 64 128
    WIRE 288 128 192 128
    WIRE -736 144 -736 128
    WIRE -144 144 -144 -64
    WIRE -144 144 -256 144
    WIRE 64 144 64 128
    WIRE 64 144 32 144
    WIRE 576 144 448 144
    WIRE -672 160 -672 128
    WIRE -528 160 -528 128
    WIRE -480 160 -528 160
    WIRE 288 160 240 160
    WIRE 576 160 576 144
    WIRE 672 160 672 112
    WIRE 672 160 576 160
    WIRE 720 160 720 144
    WIRE -208 176 -208 112
    WIRE -208 176 -256 176
    WIRE 32 176 32 144
    WIRE 64 176 64 144
    WIRE 528 176 448 176
    WIRE -528 192 -528 160
    WIRE -480 192 -528 192
    WIRE 864 192 864 112
    WIRE 976 192 976 176
    WIRE 976 192 864 192
    WIRE -224 208 -256 208
    WIRE -128 208 -128 -272
    WIRE -128 208 -160 208
    WIRE 976 208 976 192
    WIRE -736 224 -768 224
    WIRE -480 224 -736 224
    WIRE -128 240 -128 208
    WIRE -128 240 -256 240
    WIRE -112 240 -128 240
    WIRE -32 240 -48 240
    WIRE 240 240 240 160
    WIRE 576 240 576 160
    WIRE 576 240 240 240
    WIRE -800 256 -800 128
    WIRE -656 256 -800 256
    WIRE -608 256 -608 -144
    WIRE -480 256 -608 256
    WIRE -32 256 -32 240
    WIRE 192 256 192 128
    WIRE 224 256 192 256
    WIRE -96 272 -256 272
    WIRE 224 272 224 256
    WIRE 32 288 32 240
    WIRE 64 288 64 256
    WIRE 64 288 32 288
    WIRE -176 320 -224 320
    WIRE 0 320 0 48
    WIRE 64 320 64 288
    WIRE 64 320 0 320
    WIRE 160 320 160 -64
    WIRE 160 320 64 320
    WIRE 176 320 176 128
    WIRE 528 320 528 176
    WIRE 528 320 176 320
    WIRE -656 352 -656 256
    WIRE -224 352 -224 320
    WIRE -224 352 -656 352
    WIRE -96 432 -96 272
    FLAG -160 -128 0
    FLAG 752 -144 0
    FLAG 224 272 0
    FLAG -880 336 0
    FLAG -496 -192 0
    FLAG -1200 192 0
    FLAG -672 160 0
    FLAG -160 112 0
    FLAG 720 240 0
    FLAG 976 288 0
    FLAG 784 80 Output_CurrentMeasurement
    FLAG -1056 64 PWN_INPUT
    FLAG -176 400 0
    FLAG -96 512 0
    FLAG -32 256 0
    FLAG -1104 -128 0
    FLAG -816 -224 0
    SYMBOL AD8210 368 128 R0
    SYMATTR InstName U1
    SYMBOL ind 48 160 R0
    SYMATTR InstName L2
    SYMATTR Value 27mH
    SYMATTR SpiceLine Rser=78 Rpar=3000
    SYMBOL res 48 0 R0
    SYMATTR InstName R1
    SYMATTR Value 0.3
    SYMBOL voltage -1200 96 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V2
    SYMATTR Value PULSE(0 5 0 1n 1n 0.5m 1m)
    SYMBOL voltage 752 -240 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V1
    SYMATTR Value 5V
    SYMBOL voltage -496 -288 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V4
    SYMATTR Value 24V
    SYMBOL voltage -176 304 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V5
    SYMATTR Value 5V
    SYMBOL diode 0 -144 R180
    WINDOW 0 24 64 Left 2
    WINDOW 3 24 0 Left 2
    SYMATTR InstName D1
    SYMBOL diode 64 -144 R180
    WINDOW 0 24 64 Left 2
    WINDOW 3 24 0 Left 2
    SYMATTR InstName D2
    SYMBOL voltage 720 144 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V6
    SYMATTR Value 2.5V
    SYMBOL res 960 192 R0
    SYMATTR InstName R2
    SYMATTR Value 10k
    SYMBOL res 960 80 R0
    SYMATTR InstName R3
    SYMATTR Value 10k
    SYMBOL cap 16 176 R0
    SYMATTR InstName C1
    SYMATTR Value 18nF
    SYMATTR SpiceLine Rser=52
    SYMBOL cap -160 192 R90
    WINDOW 0 0 32 VBottom 2
    WINDOW 3 32 32 VTop 2
    SYMATTR InstName C2
    SYMATTR Value 100nF
    SYMATTR SpiceLine Rser=52
    SYMBOL cap -528 16 R90
    WINDOW 0 0 32 VBottom 2
    WINDOW 3 32 32 VTop 2
    SYMATTR InstName C3
    SYMATTR Value 22nF
    SYMATTR SpiceLine Rser=52
    SYMBOL voltage -96 416 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V8
    SYMATTR Value 5V
    SYMBOL res -752 128 R0
    SYMATTR InstName R4
    SYMATTR Value 10k
    SYMBOL AutoGenerated\\DRV8876_TRANS -368 144 R0
    SYMATTR InstName U2
    SYMBOL cap -48 224 R90
    WINDOW 0 0 32 VBottom 2
    WINDOW 3 32 32 VTop 2
    SYMATTR InstName C4
    SYMATTR Value 100nF
    SYMATTR SpiceLine Rser=52
    SYMBOL cap -1008 -160 R90
    WINDOW 0 0 32 VBottom 2
    WINDOW 3 32 32 VTop 2
    SYMATTR InstName C5
    SYMATTR Value 100nF
    SYMATTR SpiceLine Rser=52
    SYMBOL res -1008 -272 R0
    SYMATTR InstName R5
    SYMATTR Value 10k
    SYMBOL voltage -816 -320 R0
    WINDOW 123 0 0 Left 0
    WINDOW 39 0 0 Left 0
    SYMATTR InstName V7
    SYMATTR Value 5V
    TEXT -1312 344 Left 2 !.tran 0 30m 0 0.001m startup
    TEXT 208 384 Left 2 ;Current Measurement
    TEXT -480 440 Left 2 ;H-Bridge
    TEXT -112 352 Left 2 ;Motor 

  • Hello Pablo,

    the DRV8876Symbol-File "DRV8876_TRANS.asy" I generated from  "DRV8876_TRANS.lib" out of TI*'s "DRV8876 PSpice Transient Simulation" .

    could this help you to us my Spice-simulation -file from above ?

    Kindly regards

    Wolfi

  • Hi Wolf,

    I can try it. I have some technical issues with Pspice at the moment but I will load in your sim once I resolve it. 

    I check with our internal team and the feedback is that we are still unsure of what the root cause is. I will go to the lab and attempt to replicate with an evaluation board. I will update you within 24 hours about the results.

    Regards,

    Pablo Armet

  • Hello Pablo,

    thank you for your investigations and your answer.
    I stopped my design of a PCB until you will find a solution.

    1.) I found two pictures in datasheet with the behavour of nsleep at power up.  In datasheet at page 3:

    "Sleep mode input. Logic high to enable device. Logic low to enter low-power sleep
    mode. See Device Functional Modes. Internal pulldown resistor."

    If I leave nSleep open even of  this pull up resistor the out1 will switch to contanz 5V in Spice-Simulation.

    2.) On page 27 of datasheet is "Device Power-up " shown:

    I tested this inputs of pictures in Spice with an active PWM-Signal on PH/IN2.
    The only thing what happened after power up ("nSLEEP = HIGH" and "VM>UVLO" and "PWM-Signal on PH/IN2" and "pMode=Low")
    is that out1 switched to a constant 24V Signal. But no switching at out1/out2  although I have a PWM input signal on IN2.


    Thank you that you test the power on Behaviour of the DRV8876 nSleep on power up at your evualation board.

    and  hope that can find out that the pMODE pin is latched during power up (nSLEEP = HIGH and VM>UVLO).
    Thank you in advance

    Wolf

  • Hi Wolf,

    I would not trust the simulations too much. The DRV8874 has known bugs that cause abnormal behavior during simulation. Try it on your real hardware.

    Please give me more time to run my own tests. I have been occupied with other tasks so haven't had the time to run the tests.

    Regards,

    Pablo Armet

  • Hello Pablo ,

    Thank you for your Last  answer.

    I Tested it in my Hardware on and on  Thats why i Made the spice Tests, too.

    In my Hardware  pmode =  ph/en1 is only entered at Power on If i give an delayed toogle to nsleep from 0 to 1 with an RC Combination. Then the Outputs out1 and out2 will Work. But i think the RC Combination is not a secure Design .

    So please could you Test it too?  Mandy thanks for helping me.

    Wolfi 

  • Hi Wolf,

    I tried running the test in the lab but was not able to replicate the issue. I tried to keep the setup as close to yours as possible. Obviously hardware is different but i tied nSLEEP to 3v3 coming from LDO with VM as input. I enabled VM with 9V. I'm not sure if nSLEEP being 5V instead of 3v3 is the reason for the issue. Have you tried using 3v3 for nsleep? 

    Regards,

    Pablo Armet

  • Hello Pablo,

    thank you so much for testing it. 
    I have tied nSleep to 3.3V at power up. But is the same behaviour as before. the ouput switch to contantly 24V but no PWM.

     nSleep tied to 3.3V

    Only if I put a small delay (for examples 1ms) (10kOhm/100uF) between VM(on) and nSleep-Signal (by an RC-Combination) the pMode=0V is latched and the out1/out2 will work.

     nSleep tied to a RC delay

    Could it be in your case the same ?
    If you put 9V VM-Voltage on a LDO there could be an delay,too ? Until the 3.3V output (LDO) has reached  the nominal output Voltage.

    This is what I cannot understand. In my case there must be a  1ms delay between nSLEEP = HIGH and VM>UVLO 
    But datasheet said that there could be a ramp at VM when  nSleep=High before.

    Have you still any idea

    Thank you in advance

    Wolf

  • Hi Wolf,

    The VM ramp is just from turning ON your VM supply to when it is at its programmed voltage. The nFAULT toggle at the beginning is from UVLO fault getting detected but it self clears once VM > UVLO. The 1ms delay is from the wake up time before the driver can properly detect the INx signals and switch the outputs. If you try to switch the outputs during this wakeup time, nothing will happen at the outputs. 

    In my test, I used an external 3v3 supply from the LDO. It is possible that the delay at the LDO matches the delay you get from the RC time constant delay and explains why I was not able to replicate. When I go back to the lab on Monday, I can retest using external 3V supply for nSLEEP.

    I would to confirm something. When no delay is added to nSLEEP, are the outputs never switching even after waiting for the wakeup time to expire and INx switching? Or they do after the wakeup time expires?

    Regards,

    Pablo Armet

  • Hello Pablo, 

    I can confirm that the Outputs never Switching when i Put no delay on it. Nothing Happen even If i wait until wake Up time is expired. Only with RC delay the Outputs starts Switching.

    As i read in Datasheet there is a Schmitt  Trigger Input at nsleep.so the Input Signal on nsleep has a good Low to high Signal If i Take the rc Combination.

    All other cases will Not Work 

    • Regards 

     Wolf

  • Hi Wolf,

    Understood. Thank you for the clarification.

    It seems like there might be a slew rate specification for the input Schmitt trigger on the nSLEEP pin. I'm fairly certain that is the reason as you have tested. Can you send me an oscilloscope of the nSLEEP pin slew rate both with and without the RC delay. 

    Since the root cause is known, I will close this ticket but will reply back once I learn more about this behavior. 

    My suggestion is to add this RC delay to your design and tune it such that the delay is long enough to enable the driver.

    Regards,

    Pablo Armet

  • I'm using the drv8876 stand-alone in following configuration of PH/EN Control mode:

    Hi,

    The schematic is wrong, and the external PWM should be connected to EN and not to PH. If PWM is connected to PH then the motor will be vibrating at high frequency as the PH is changing motor direction at whatever pwm frequency. Fix this first. 

    Also the posted waveform 6 days ago doesn't have the control inputs PWM and EN so we cannot tell of the output behaves right or wrong.

    Brian

  • Hello Brian,

    There exists two modes to control a brushed DC Motor:

    The Sign-Magnitude Magnitude Mode 
    and the  Locked Anti-Phase Mode to control a DC motor

    please excuse me but thats not true:
    "If PWM is connected to PH then the motor will be vibrating at high frequency as the PH is changing motor direction at whatever pwm frequency"

    Here you will find the descriptiom of the Anti-phase Mode at :
    https://www.pcb-3d.com/wordpress/tutorials/what-is-a-h-bridge-sign-magnitude-and-locked-anti-phase-control-of-a-dc-motor/
    https://www.acmesystems.it/pcb_pwm
    https://www.ti.com/lit/an/snoa170c/snoa170c.pdf?ts=1686648391182&ref_url=https%253A%252F%252Fwww.google.com%252F
    https://www.ti.com/lit/ds/symlink/lmd18200.pdf

    from Texas Instruments:

    Locked anti-phase PWM consists of a single, variable duty-cycle signal in which is encoded both direction and amplitude information . A 50% duty-cycle PWM signal represents zero drive, since the net value of voltage (integrated over one period) delivered to the load is zero.

    My design with the DRV8876  is working in the "Locked Anti Phase Mode" n PH/EN Control mode with PH=PWM and EN=Enabled
    I use the he "lock anti-phase" mode  to control motors direction and Voltage Amplitude for controlling the motor.  For this mode only one PWM Signal is used for control DC Motor.


    1.) For a duty cycle of 50% the motor will stop;

    2.) for duty cycles between 51...100% my motor will turn forward with full forward speed at 100% Duty Cycle

    3.) or duty cycles between 0...49 % my motor will turn backwarts with full backward speed at 0% Duty Cycle
    The follwing picture show the condition when motor is stoppimg an 50% duty cycle:

    50% duty cyleThis is the idle condition, since the motor doesn’t see an (average) voltage difference across it’s terminals.

    If I increase duty cycle beetween 51...100%:
    If the duty cycle is increased, Q1 and Q4 will be on longer than Q2 and Q3 are. The average voltage on the ‘B’-side of the motor will be higher than on the ‘A’ side, so it will start spinning in the forward direction.

    Conversely, if the duty cycle is decreased below 50%, the ‘A-side’ sill see a higher average voltage than ‘B’, so the motor will turn in the reverse direction.



    I hope this is a plain explanation for this anti-phase locked PWM Mode

    kindly Regards

    Wolf

  • Hello Brian,

    excuse me I posted a wrong schematics of my design.

    I link PWM to PH Pin and EN=VCC(High) and this is working.

  • Hello

    I just found a other project with anti-phase locked for 8876 whre PWM is connected to PH and EN1=High:
    I hope this will help: The Anti-Phase locked mode is described for DRV8876 in https://www.pololu.com/product/4036;

    Phase/enable (PH/EN) mode for 8876 for locked antiphase Mode:

    Simplified drive/brake operation with PMODE=0 (PHASE/ENABLE)
    EN PH OUT1 OUT2 operating mode
    0 X L L brake low (outputs shorted to ground)
    PWM 1 PWM (H/L) L forward/brake at speed PWM %
    PWM 0 L PWM (H/L) reverse/brake at speed PWM %

    This PH/EN mode can also be used for locked-antiphase operation, where a sufficiently high-frequency (up to 100 kHz) PWM is applied to the phase (PH) pin and the enable (EN) pin is tied high. In locked-antiphase operation, the PWM duty cycle controls speed and direction, going from full-speed in one direction at 0% duty cycle to full speed in the other direction at 100% duty cycle. A duty cycle of 50% will stop the motor. The appropriate PWM frequency will generally depend on the inductance of the motor.

    kindly regard

    Wolf

  • thank you so much for testing it. 
    I have tied nSleep to 3.3V at power up. But is the same behaviour as before. the ouput switch to contantly 24V but no PWM.

    Hi,

    To verify this, could you post a captured waveform of the pwm input, nSLEEP, and the outputs on the same screen shot? If the nSLEEP is logic high then then max the driver in the sleep mode is 1ms, so please make sure the waveform captures more than 1ms.

    My design with the DRV8876  is working in the "Locked Anti Phase Mode" n PH/EN Control mode with PH=PWM and EN=Enabled
    I use the he "lock anti-phase" mode  to control motors direction and Voltage Amplitude for controlling the motor.  For this mode only one PWM Signal is used for control DC Motor.

    You're right that what I was saying is not quite correct -- it depends on the pwm frequency and the motor will not be vibrating if the pwm is high enough. However, using locked anti phase has the disadvantage: you loose 50% of the pwm resolution for fine control; all 4 FETs are switching all of the time and so higher switching loss.

    Why couldn't you connect PH to direction and pwm to EN so you can utilize the full 10bit or whatever bit resolution of the pwm control input?

    Brian

  • Brian,

    Why couldn't you connect PH to direction and pwm to EN so you can utilize the full 10bit or whatever bit resolution of the pwm control input?

    Typically that is what is recommended. The H-bridge switches between driving in one direction to current recirculation. I do agree with you that this should be the proper way to control a BDC motor. Wolf, why do you control the PH pin rather than the EN pin?

    Regards,

    Pablo Armet

  • Hello Brian,

    its right I loose 50% of the resolution. But  I get from my Industrial Control System only a PWM-Signal which is created for "locked anti-phase" mode.
    This means as I said:
                           duty cycle 50% Motor stops
                           duty cycle  0....49% motor backwards (max backward speed at 0%)
                           duty cycle  51... 100% motor forward (max forward speed at 100%)          

    In other words, I have no "single signal for direction" and
     I have only a "PWM-Signal" which is using 50% of the duty cycle for each direction. Thats are my recommentions                                                         

  • Hello Brian, hello Pablo,

    thank you for your answer.

    Brian said "Why couldn't you connect PH to direction and pwm to EN so you can utilize the full 10bit or whatever bit resolution of the pwm control input?"

    Pablo said: ". Wolf, why do you control the PH pin rather than the EN pin?"


    As I said I have only the "antiphase PWM Signal" and no direction Signal ( see table3 in this reply) .
    EN=PWM PH=1 would not work for me.
    When  EN=PWM=0 the outputs of DRV8876 would "brake",
     when EN=PWM=1 the outputs of DRV8876   would  run Reverse
    But how could I move Forward (OUT1 → OUT2)? This is not possible with antiphase locked PWM, when connect EN=PWM.

    This is my output-signal when EN=PWM and PH=1 (only one voltage direction -24V is possible, so motor will drive only  backwards)
    Green is "antiphase locked pwm" input signal . Blue is output between "out1 and out2" of DRV8876:

    This is my output-signal when EN=1 and PH=PWM (two directions of voltage +/24V  is possiblen, so motor will drive back and forward)
    Green is my "antiphase locked" input signal pwm-signal . Blue is output between out1 and out2 of DRV8876:

  • Hello Brian, hello Pablo,

    thank you for your answers.

    Brian said: To verify this, could you post a captured waveform of the pwm input, nSLEEP, and the outputs on the same screen shot? If the nSLEEP is logic high then then max the driver in the sleep mode is 1ms, so please make sure the waveform captures more than 1ms.

    This is my capture of PWM from power up to 2ms. nSleep(red)  and outputs(blue) pwm_in (green).  nSleep is tied to 5V and no delay for this signal.
    The Output(blue) switch to 5V and after 1ms to  constantly at 24V ( no PWM switching):

    The question still is: Why does output not working when tied nSleep=1? As you see it in picture above.
    Only with delayed toggle from  LOW to HIGH at nSleep DRV8876 outputs will work.
     I just took once more a look thru all applications of DRV8876 and found no explanation for this behaviour.
    Because Datasheet deecribe only that nSleep= '1' to set DRV8876 active mode.
    I found out that nSleep toogle from '0' to '1' has to be minimumdelay of  0.1ms after power up of the device.
    Than the output will work and the PH/EN-Mode is set correctly.  This is the capture of the Signals

    kindly regards

    Wolf

  • EN=PWM PH=1 would not work for me.
    When  EN=PWM=0 the outputs of DRV8876 would "brake",
     when EN=PWM=1 the outputs of DRV8876   would  run Reverse
    But how could I move Forward (OUT1 → OUT2)? This is not possible with antiphase locked PWM, when connect EN=PWM.

    What device output the pwm signal, and why not use the same device to output one GPIO to control the direction by connect it to PH pin? If the device capable of output pwm and direction signals, then there is no reason to use anti-phase pwm as you loose 50% of the pwm resolution.

    This is my output-signal when EN=PWM and PH=1 (only one voltage direction -24V is possible, so motor will drive only  backwards)
    Green is "antiphase locked pwm" input signal . Blue is output between "out1 and out2" of DRV8876:

    I see the waveform with pwm = 1khz which is too low for anti-phase pwm control as this would cause high audible noise and bad performance if motor has low inductive.

    Are the waveforms captured with a scope or from Spice simulation?

    Brian

  • Hello Brian, hello Pablo

    thank you for your answer and your questions:

    Brian Dang said: "What device output the pwm signal, and why not use the same device to output one GPIO to control the direction by connect it to PH pin? If the device capable of output pwm and direction signals, then there is no reason to use anti-phase pwm as you loose 50% of the pwm resolution."

    The PWM-Signal lost of 50% is no problem in our application. The device outputs   the "antiphase locked  PWM-Signal"  its not a microcontroller. It is a industrial PLC (from Scheider electronic). In the design of this PLC is only "anti-Phase locked PWM" offered. We ask the manufacturer for  a "PWM-Signal +direction Signal", but this is implemented in this PLC.
    And as the PLC has no "H-Bridge output", we use DRV8876 as Motor driver. The given frequency fpwm has two possibilities :  1kHz and 5kHz:
    In our design I use fpwm=5kHz but the motor will run at 1kHz as well.

    Brian Dang said : I see the waveform with pwm = 1khz which is too low for anti-phase pwm control as this would cause high audible noise and bad performance if motor has low inductive.

    It's small 24V-motor  There is no noise with our frequency  fpwm=1kHz/5kHz. This is not root  problem. The Problem is the initialization of nSleep at "power up". Our only problem is the fact, that DRV8876 is not working when we connecting nSleep directly Vcc.

    Pablo said: It seems like there might be a slew rate specification for the input Schmitt trigger on the nSLEEP pin. I'm fairly certain that is the reason as you have tested. Can you send me an oscilloscope of the nSLEEP pin slew rate both with and without the RC delay. Since the root cause is known, I will close this ticket but will reply back once I learn more about this behavior.  My suggestion is to add this RC delay to your design and tune it such that the delay is long enough to enable the driver.

    As I wrote, there is no noise with fpwm=1kHz and 5kHz, As we discussed  about the kind of PWM-Signal we forgot about our main problem  .
    Our only problem is not the PWM-Signal itself.  the problem is the needed Signal at  nSleep -Pin on  "power up".
    Is a RC-Delay the only way ?

    So I ask you both if you found a solution to set DRV8876 into "PH/EN - mode" with a correct signal for nSleep at power up. why can nSleep not tied to Vcc ?

    kindly regards

    Wolf

  • As we discussed  about the kind of PWM-Signal we forgot about our main problem  .
    Our only problem is not the PWM-Signal itself.  the problem is the needed Signal at  nSleep -Pin on  "power up".

    Hi,

    Can you confirm the waveform in the question below? Spice simulation is not perfect for this sort of cases.

    Are the waveforms captured with a scope or from Spice simulation?
  • Hello Brian, Hello Pablo,

    thank ou for our reply.
    I  just wait for new samples of DRV8876.
     Because my  DRV8876 does not work anymore.

    Brian Dang said: Are the waveforms captured with a scope or from Spice simulation?
    The last  waveform captures made in Spice. But ou are right I have to wait for the new devices and test it once more on my real PCB.

    Pablo Armet said:My suggestion is to add this RC delay to your design and tune it such that the delay is long enough to enable the driver.
    This is what I will do when the new devices are there

    regards Wolf

  • Wolf,

    It is better to test this on real hardware. Let me know if you see any more issues with the RC delay when you get the units and test it on your board.

    Regards,

    pablo Armet