• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 3 answers
  • Subscribers 28 subscribers
  • Views 240 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8231: Questions about specifications

koshima shumpei
Prodigy 30 points
Part Number: DRV8231
Other Parts Discussed in Thread: DRV8812

Hello, I have two questions.

Are there any regulations regarding the minimum time for the HI width and LOW width of the signals input to the IN1 and IN2 terminals?

Is there a mode where the H-bridge FET turns on due to residual charge in the capacitor of the booster circuit inside the driver when the power is off?


(Background of the question)
In the DRV8812/8813, there was a mode in which the motor terminals were shorted (FET→ON) when the power was turned off due to residual charge in the charge pump capacitor.

  • 0
    TI__Mastermind 37683 points

    Hello Koshima,

    koshima shumpei said:
    Are there any regulations regarding the minimum time for the HI width and LOW width of the signals input to the IN1 and IN2 terminals?

    The driver can support any pulse width at the inputs (IN1 and IN2) but below a certain pulse width, the output voltage will not rise all the way to the expected supply voltage. Below is a diagram with some explanation. Essentially, below a certain Dmin (minimum duty cycle for a given frequency), the output voltage duty cycle will be close to zero since the input duty cycle is not long enough to allow the output voltage to rise to the max. A good estimation is to make sure the minimum ON/OFF pulse of the input signal is greater than Tdead+Trise/Tfall. The rise and fall times is depended on your motor or load.

    koshima shumpei said:
    In the DRV8812/8813, there was a mode in which the motor terminals were shorted (FET→ON) when the power was turned off due to residual charge in the charge pump capacitor.

    The FETs all have an internal pulldown from Gate to Source to prevent residual charge from building up on the gate and turning ON the FET. So there is no risk of this issue from occurring.

    Regards,

    Pablo Armet

  • 0 in reply to Pablo Armet
    Prodigy 30 points

    Hello Pablo.

    Thank you for answering.

    I checked the values of Tdead, Trise, Tfall in the datasheet.

    I would also like to know the value of MIN. (Tdead, Trise, Tfall)

  • 0 in reply to koshima shumpei
    TI__Mastermind 37683 points

    Hello Koshima,

    You can expect the MIN value to be greater than 100us. 

    Regards,

    Pablo Armet

  • 0 in reply to Pablo Armet
    Prodigy 30 points

    Hello Pablo.

    Thank you for answering.

    Could you also tell me the MAX value? (Tdead, Trise, Tfall)

  • 0 in reply to koshima shumpei
    TI__Mastermind 37683 points

    Koshima,

    The max is around 400us.

    Regards,

    Pablo Armet