UCC2895: How limit the maximum duty cycle

Hello Jesus

The data sheet is not exactly clear on this point - I'll run some checks tomorrow and see if I can figure out what is happening. I'll re-post then. If I can't figure out what is happening I'll have to get in contact with the design group and get their opinion.

Please note that the 880pF limit in the data sheet must be observed.

Regards
Colin

Hello Colin,
Could you find some conclusion for my question?

Thanks

Hello Jesus

I have not had an opportunity to work on your question yet - I hope to look at it today -
My apologies for the delay.

Regards
Colin

Hello Jesus

I ran some tests on my bench today and the results are attached.

I saw a 95.5% Dmax at 100kHs oscillator frequency (50kHz switching frequency) with 120k and 820pF. One of the things limiting Dmax is the dead time and I had used 10k resistors at DELAB and DELCD - the measured dead time was about 450ns - and this of course reduces the duty cycle.

The fall time of the CT waveform is a function of the capacitance used but the variation was from 87ns down to about 20ns so I wouldn't think that was going to be too significant.

At higher frequencies, the maximum duty cycle was lower - dominated by the dead times.

If  you have a particular switching frequency in mind please let me know and I'll run some further tests - I'd expect that a 95% effective limit on the duty cycle is possible.

/cfs-file/__key/communityserver-discussions-components-files/196/Dmax-vs-timing-components.docx

Regards
Colin

Hi Colin,
Thanks for your time testing it.
In my application, the switching frequency is 100kHz.
I set dead times based on resonant frequencies to improve the efficiency so I should not modify them.

Regards