TPS650250: Enable pin floating and sink current

Hi,

I have forwarded your request to the Applications Engineer supporting this device. She is based in Dallas and will provide the feedback later today.

Regards,

Murthy

Hi Emily,

Thankyou for your quick response. 

1. I am planning to drive the enable pin using the GPIO. can you please let me know what is minimum current required to for enable pin.

2. Also can you please let me know he ramp time of LDO1 and LDO2

Hi Shifali,

I can take a closer look at this once I have the opportunity to test the device in the lab. Due to ongoing circumstances, it may take a moment before I can get back to you with greater detail. 

Hi Emily,

Waiting for your response.

Hi Shifali,

I will be in the lab and working on getting an answer for you by 3/16.

Hi Emily,

Waiting for your response.

Hi Shifali,

Apologies for the delayed response, other priority items came up. I will be back in the lab this week and provide an answer to you by 4/2.

Best,

Emily

7331.PMIC.pdfHi Emily,

I have attached the layout file of TPS650250. Kindly review the same and provide your valuable feedbacks.

Hi Shifali,

Can you share the schematic instead of that layout pdf? That would allow me to have a better understanding of your connections.

Best,

Emily

Hi Emily,

Please find the attached schematics as well.Design17.pdf

Hi Emily,

Waiting for your response.

Hi Shifali,

The EN pin minimum current is defined by the Input bias current in Table 6.6, above. You can find the ramp time of LDO1 and LDO1 in the datasheet, Figure 19.

Best,

Emily

Hi,

Waiting for your response on PMIC related to PMIC layout review

Shifali,

Per your PMIC schematic, L3 is recommended to be 3.3uH and if using PWRFAIL to detect VDCDC3 going low, to use a pull-up.