AM64 EVM- activation of R5 from CCS and A53 from SD card

What should work and I just tried:

1. SD card boot with Linux image for the entire SoC (loads ipc examples to R5’s as well)
2. Launch CCS debugger target configuration (file with extension .ccxml)
3. On CCS Debug window right click on the R5 core and click Connect (I in general use R5_0_1 most often, but looks like R5_0_0 also works)

 If you try to connect to A53 it will mess up Linux, a little bit depending on what is going on there. But if you stick to R5 Linux should stay up with the above and looks like I can reboot the SoC from Linux and CCS just loses the connection. Redoing #3 after SoC boot allows halting and running R5.

  Pekka

EyalCo said:

they are looking for the boot pins configuration, or any other configuration, that let them both work.

If this is on AM64x EVM, please check the following link for EVM boot switch configurations.

https://dev.ti.com/tirex/explore/node?a=XaWts8R__8.3.0.0%20v1&node=AL9a3dR64f2rR2j8NX0fzA__7qm9DIS__LATEST&r=XaWts8R__8.3.0.0%20v2

Thanks Pekka and Bin for your responses.

I'm not trying to connect to the A53 but debug the R5 processor.

I can connect to the R5 after the Linux loads the FW into it according to Pekka's instructions.

The code on the CCS is the code which the FW was built from.

I can put HW breakpoints on the disassembly but I can't enable SW breakpoints in the code.

I guess that it's all about any missing debug configuration.

Searching TI's forum, I didn't find any reference to this problem.

Please assist.

Dekel Guterman said:

I can put HW breakpoints on the disassembly but I can't enable SW breakpoints in the code.

SW breakpoints modify the opcode and thus need write permission to the memory being used. This is one possibility of hat you are observing. See https://software-dl.ti.com/ccs/esd/documents/users_guide/ccs_debug-main.html#breakpoints . I tried with default SDK and the image that happens to be on R5 and both SW and HW break points work from the disassembly window. To get some progress is there some reason you can't use HW breakpoints? Are you seetting up so maby breakpoints you are running out of HW breakpoints?

  Pekka

I can set SW breakpoints in the disassembly window but I'm trying to debug by setting breakpoints in the code itself.

It seems that the issue is about the symbols, as right after connecting to the R5 I receive the following:

The breakpoints I put in the code:

And their properties:

And again, the code on the CCS matches to the FW loaded by the Linux.

Please advise how to set the symbols.