TDA4VM: UART app not running alongside Linux for mcu1_0

Elf file type is EXEC (Executable file)
Entry point 0x41010000
There are 14 program headers, starting at offset 189440

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  LOAD           0x000038 0x41010000 0x41010000 0x00040 0x00040 R   0x8
  LOAD           0x000080 0x41010100 0x41010100 0x00588 0x00588 R E 0x10
  LOAD           0x000608 0xa0400000 0xa0400000 0x00000 0x1bef1 RW  0x8
  LOAD           0x000608 0xa041bef4 0xa041bef4 0x0000a 0x0000a R   0x4
  LOAD           0x000620 0xa041bf00 0xa041bf00 0x269c8 0x269c8 R E 0x10
  LOAD           0x026fe8 0xa04428c8 0xa04428c8 0x00000 0x00004 RW  0x4
  LOAD           0x027000 0xa0442900 0xa0442900 0x00000 0x05880 RW  0x80
  LOAD           0x027000 0xa0448180 0xa0448180 0x03b1e 0x03b1e R   0x4
  LOAD           0x02ab20 0xa044bca0 0xa044bca0 0x00000 0x02000 RW  0x8
  LOAD           0x02ab80 0xa044dd00 0xa044dd00 0x01700 0x01700 R   0x80
  LOAD           0x02c280 0xa044f400 0xa044f400 0x00000 0x00f14 RW  0x4
  LOAD           0x02c280 0xa0450314 0xa0450314 0x00770 0x00770 R   0x4
  LOAD           0x02c9f0 0xa0450a84 0xa0450a84 0x00000 0x001e8 RW  0x4
  LOAD           0x02c9f0 0xa0450c70 0xa0450c70 0x015a0 0x015a0 R   0x8

 Section to Segment mapping:
  Segment Sections...
   00     .vecs .vecs 
   01     .init_text .text:xdc_runtime_Startup_reset__I .utilsCopyVecsToAtcm 
   02     .bss __llvm_prf_cnts 
   03     .const.devgroup.DMSC_INTERNAL 
   04     .text .const 
   05     .bss.devgroup.DMSC_INTERNAL 
   06     .data 
   07     .const.devgroup.MAIN 
   08     .stack 
   09     .boardcfg_data 
   10     .bss.devgroup.MAIN 
   11     .const.devgroup.MCU_WAKEUP 
   12     .bss.devgroup.MCU_WAKEUP 
   13     .cinit 

From cc292e88d6ed443455b309809da6d3e23a6f38cd Mon Sep 17 00:00:00 2001
From: Karan Saxena <karan@ti.com>
Date: Mon, 9 May 2022 08:52:21 -0400
Subject: [PATCH] Update MCSPI_Master_TestApp to run along side Linux

- Patches needed:
  - u-boot: to disable MCU UART
  - Linux : to disable MCU UART
  - PDK   : changes to application's mem map, bios config and startup hook fxn

Note that w/o a valid slave app, the master app on MCU1_0 will wait in a loop.

Signed-off-by: Karan Saxena <karan@ti.com>
---
 .../j721e/linker_mcu_sysbios.lds              |  51 ----
 .../j721e/linker_r5f_mcu1_0_btcm_sysbios.lds  | 149 +++++++++++
 .../mcspi_slavemode/j721e/r5_mpu_ipc.xs       | 159 ++++++++++++
 .../j721e/sysbios_r5f_btcm.cfg                | 239 ++++++++++++++++++
 .../drv/spi/example/mcspi_slavemode/makefile  |   5 +-
 .../mcspi_slavemode/src/ipcCopyVecs2Exc.asm   |  59 +++++
 .../src/main_mcspi_slave_mode.c               |   4 +
 7 files changed, 613 insertions(+), 53 deletions(-)
 delete mode 100755 packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds
 create mode 100755 packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_r5f_mcu1_0_btcm_sysbios.lds
 create mode 100644 packages/ti/drv/spi/example/mcspi_slavemode/j721e/r5_mpu_ipc.xs
 create mode 100644 packages/ti/drv/spi/example/mcspi_slavemode/j721e/sysbios_r5f_btcm.cfg
 create mode 100644 packages/ti/drv/spi/example/mcspi_slavemode/src/ipcCopyVecs2Exc.asm

diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds
deleted file mode 100755
index 76ef5d9..0000000
--- a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds
+++ /dev/null
@@ -1,51 +0,0 @@
-/* linker options */
---fill_value=0
---stack_size=0x2000
---heap_size=0x1000
-
--e __VECS_ENTRY_POINT
---retain="*(.utilsCopyVecsToAtcm)"
-
-MEMORY
-{
-    R5F_TCMA_SBL_RSVD(X): ORIGIN = 0x00000000 , LENGTH = 0x100
-    R5F_TCMB0(RWIX)     : ORIGIN = 0x41010000 , LENGTH = 0x00008000
-
-    /* Refer the user guide for details on persistence of these sections */
-    OCMC_RAM_BOARD_CFG (RWIX)   : origin=0x41C80000 length=0x2000
-    OCMC_RAM_SCISERVER (RWIX)   : origin=0x41C82000 length=0x60000
-    RESET_VECTORS (X)           : origin=0x41CE2000 length=0x100
-    OCMC_RAM (RWIX)             : origin=0x41CE2100 length=0x1DA00
-    OCMC_RAM_X509_HEADER (RWIX) : origin=0x41CFFB00 length=0x500
-
-    /* Donot use MSMC. Used by MPU. */
-    MSMC3(RWIX)         : ORIGIN = 0x70080000 , LENGTH = 0x770000
-    DDR0(RWIX)          : ORIGIN = 0x88000000 , LENGTH = 0x8000000
-}
-
-SECTIONS
-{
-    .vecs       : {
-        __VECS_ENTRY_POINT = .;
-    } palign(8) > RESET_VECTORS
-    .text_boot {
-        *boot.aer5f*<*boot.o*>(.text)
-     }  palign(8)   > R5F_TCMB0
-    .text:xdc_runtime_Startup_reset__I     : {} palign(8) > R5F_TCMB0
-    .text:ti_sysbios_family_arm_v7r_Cache* : {} palign(8) > R5F_TCMB0
-    .text:ti_sysbios_family_arm_MPU*       : {} palign(8) > R5F_TCMB0
-    .utilsCopyVecsToAtcm                   : {} palign(8) > R5F_TCMB0
-
-    .text       : {} palign(8)   > DDR0
-    .cinit      : {} palign(8)   > DDR0
-    .bss        : {} align(8)    > DDR0
-    .far        : {} align(8)    > DDR0
-    .const      : {} palign(8)   > DDR0
-    .data       : {} palign(128) > DDR0
-    .sysmem     : {} align(8)    > DDR0
-    .stack      : {} align(4)    > DDR0
-    .data_buffer: {} palign(128) > DDR0
-    .bss.devgroup*  : {} align(4) > DDR0
-    .const.devgroup*: {} align(4) > DDR0
-    .boardcfg_data  : {} align(4) > DDR0
-}
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_r5f_mcu1_0_btcm_sysbios.lds b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_r5f_mcu1_0_btcm_sysbios.lds
new file mode 100755
index 0000000..f5ddf57
--- /dev/null
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_r5f_mcu1_0_btcm_sysbios.lds
@@ -0,0 +1,149 @@
+/*----------------------------------------------------------------------------*/
+/* File: linker_r5f_mcu1_0_btcm_sysbios.lds                                        */
+/* Description:			  					      */
+/*    Link command file for J7ES MCU1_0 view				      */
+/*	  TI ARM Compiler version 15.12.3 LTS or later			      */
+/*                                                                            */
+/* (c) Texas Instruments 2018, All rights reserved.                           */
+/*----------------------------------------------------------------------------*/
+/*  History:								      */
+/*    Aug 26th, 2016 Original version .......................... Loc Truong   */
+/*    Aug 01th, 2017 new TCM mem map  .......................... Loc Truong   */
+/*    Nov 07th, 2017 Changes for R5F Init Code.................. Vivek Dhande */
+/*    Sep 17th, 2018 Added DDR sections for IPC................. J. Bergsagel */
+/*    Sep 26th, 2018 Extra mem sections for IPC resource table.. J. Bergsagel */
+/*    Nov 06th, 2018 Correction to TCM addresses for MCU1_0..... J. Bergsagel */
+/*    Nov 07th, 2018 Split up OCMRAM_MCU for split-mode R5Fs.... J. Bergsagel */
+/*    Feb 20th, 2019 Use R5F BTCM memory for boot vectors........J. Bergsagel */
+/*    Apr 23th, 2019 Changes for R5F startup Code............... Vivek Dhande */
+/*----------------------------------------------------------------------------*/
+/* Linker Settings                                                            */
+/* Standard linker options						      */
+--retain="*(.bootCode)"
+--retain="*(.startupCode)"
+--retain="*(.startupData)"
+--fill_value=0
+--stack_size=0x2000
+--heap_size=0x1000
+
+-stack  0x2000                              /* SOFTWARE STACK SIZE           */
+-heap   0x2000                              /* HEAP AREA SIZE                */
+
+#define DDR0_ALLOCATED_START 0xA0000000
+
+#define MCU1_0_EXT_DATA_BASE     (DDR0_ALLOCATED_START + 0x00100000)
+#define MCU1_0_R5F_MEM_TEXT_BASE (DDR0_ALLOCATED_START + 0x00200000)
+#define MCU1_0_R5F_MEM_DATA_BASE (DDR0_ALLOCATED_START + 0x00300000)
+#define MCU1_0_DDR_SPACE_BASE    (DDR0_ALLOCATED_START + 0x00400000)
+
+#define MCU1_1_ALLOCATED_START   DDR0_ALLOCATED_START + 0x01000000
+#define MCU1_1_EXT_DATA_BASE     (MCU1_1_ALLOCATED_START + 0x00100000)
+#define MCU1_1_R5F_MEM_TEXT_BASE (MCU1_1_ALLOCATED_START + 0x00200000)
+#define MCU1_1_R5F_MEM_DATA_BASE (MCU1_1_ALLOCATED_START + 0x00300000)
+#define MCU1_1_DDR_SPACE_BASE    (MCU1_1_ALLOCATED_START + 0x00400000)
+
+#define MCU2_0_ALLOCATED_START   DDR0_ALLOCATED_START + 0x02000000
+#define MCU2_0_EXT_DATA_BASE     (MCU2_0_ALLOCATED_START + 0x00100000)
+#define MCU2_0_R5F_MEM_TEXT_BASE (MCU2_0_ALLOCATED_START + 0x00200000)
+#define MCU2_0_R5F_MEM_DATA_BASE (MCU2_0_ALLOCATED_START + 0x00300000)
+#define MCU2_0_DDR_SPACE_BASE    (MCU2_0_ALLOCATED_START + 0x00400000)
+
+#define MCU2_1_ALLOCATED_START   DDR0_ALLOCATED_START + 0x03000000
+#define MCU2_1_EXT_DATA_BASE     (MCU2_1_ALLOCATED_START + 0x00100000)
+#define MCU2_1_R5F_MEM_TEXT_BASE (MCU2_1_ALLOCATED_START + 0x00200000)
+#define MCU2_1_R5F_MEM_DATA_BASE (MCU2_1_ALLOCATED_START + 0x00300000)
+#define MCU2_1_DDR_SPACE_BASE    (MCU2_1_ALLOCATED_START + 0x00400000)
+
+#define ATCM_START 0x00000000
+#define BTCM_START 0x41010000
+
+-e __VECS_ENTRY_POINT
+--retain="*(.ipcCopyVecsToExc)"
+
+/*----------------------------------------------------------------------------*/
+/* Memory Map                                                                 */
+MEMORY
+{
+    /* MCU1_R5F_0 local view  */
+    MCU_ATCM (RWX)		: origin=ATCM_START	length=0x8000
+    /* MCU1_R5F0_TCMB0 (RWIX)	: origin=BTCM_START	length=0x8000 (documented only, to avoid conflict below) */
+
+    /* MCU1_R5F_0 SoC view  */
+    MCU1_R5F0_ATCM (RWIX)  	: origin=0x41000000 length=0x8000
+    MCU1_R5F0_BTCM_VECS (RWIX)  : origin=0x41010000 length=0x0100
+    MCU1_R5F0_BTCM (RWIX) 	: origin=0x41010100 length=0x7F00
+
+    DDR0_RESERVED    (RWIX)  	: origin=0x80000000 length=0x20000000	  	/* 512MB */
+    MCU1_0_IPC_DATA (RWIX)	: origin=DDR0_ALLOCATED_START     length=0x00100000	/*   1MB */
+    MCU1_0_EXT_DATA  (RWIX)	: origin=MCU1_0_EXT_DATA_BASE     length=0x00100000	/*   1MB */
+    MCU1_0_R5F_MEM_TEXT (RWIX)	: origin=MCU1_0_R5F_MEM_TEXT_BASE length=0x00100000	/*   1MB */
+    MCU1_0_R5F_MEM_DATA (RWIX)	: origin=MCU1_0_R5F_MEM_DATA_BASE length=0x00100000	/*   1MB */
+    MCU1_0_DDR_SPACE (RWIX)	: origin=MCU1_0_DDR_SPACE_BASE    length=0x00C00000	/*  12MB */
+    MCU1_1_IPC_DATA (RWIX)	: origin=MCU1_1_ALLOCATED_START   length=0x00100000	/*   1MB */
+    MCU1_1_EXT_DATA  (RWIX)	: origin=MCU1_1_EXT_DATA_BASE     length=0x00100000	/*   1MB */
+    MCU1_1_R5F_MEM_TEXT (RWIX)	: origin=MCU1_1_R5F_MEM_TEXT_BASE length=0x00100000	/*   1MB */
+    MCU1_1_R5F_MEM_DATA (RWIX)	: origin=MCU1_1_R5F_MEM_DATA_BASE length=0x00100000	/*   1MB */
+    MCU1_1_DDR_SPACE (RWIX)	: origin=MCU1_1_DDR_SPACE_BASE    length=0x00C00000	/*  12MB */
+    MCU2_0_IPC_DATA (RWIX)	: origin=MCU2_0_ALLOCATED_START   length=0x00100000	/*   1MB */
+    MCU2_0_EXT_DATA  (RWIX)	: origin=MCU2_0_EXT_DATA_BASE     length=0x00100000	/*   1MB */
+    MCU2_0_R5F_MEM_TEXT (RWIX)	: origin=MCU2_0_R5F_MEM_TEXT_BASE length=0x00100000	/*   1MB */
+    MCU2_0_R5F_MEM_DATA (RWIX)	: origin=MCU2_0_R5F_MEM_DATA_BASE length=0x00100000	/*   1MB */
+    MCU2_0_DDR_SPACE (RWIX)	: origin=MCU2_0_DDR_SPACE_BASE    length=0x00C00000	/*  12MB */
+    MCU2_1_IPC_DATA (RWIX)	: origin=MCU2_1_ALLOCATED_START   length=0x00100000	/*   1MB */
+    MCU2_1_EXT_DATA  (RWIX)	: origin=MCU2_1_EXT_DATA_BASE     length=0x00100000	/*   1MB */
+    MCU2_1_R5F_MEM_TEXT (RWIX)	: origin=MCU2_1_R5F_MEM_TEXT_BASE length=0x00100000	/*   1MB */
+    MCU2_1_R5F_MEM_DATA (RWIX)	: origin=MCU2_1_R5F_MEM_DATA_BASE length=0x00100000	/*   1MB */
+    MCU2_1_DDR_SPACE (RWIX)	: origin=MCU2_1_DDR_SPACE_BASE    length=0x00C00000	/*  12MB */
+
+    SHARED_DDR_SPACE (RWIX)	: origin=0xAA000000 length=0x01C00000           /*  28MB */
+
+}  /* end of MEMORY */
+
+/*----------------------------------------------------------------------------*/
+/* Section Configuration                                                      */
+
+SECTIONS
+{
+    .vecs : {
+         *(.vecs)
+    } palign(8) > BTCM_START
+    .vecs       : {
+        __VECS_ENTRY_POINT = .;
+    } > MCU1_R5F0_BTCM_VECS
+    xdc.meta (COPY): { *(xdc.meta) } > MCU1_R5F0_BTCM
+    .init_text  : {
+                     boot.*(.text)
+                     *(.text:ti_sysbios_family_arm_MPU_*)
+                     *(.text:ti_sysbios_family_arm_v7r_Cache_*)
+                  }  palign(8) > MCU1_R5F0_BTCM
+    .text:xdc_runtime_Startup_reset__I     : {} palign(8) > MCU1_R5F0_BTCM
+    .bootCode    	: {} palign(8) 		> MCU1_R5F0_BTCM
+    .startupCode 	: {} palign(8) 		> MCU1_R5F0_BTCM
+    .startupData 	: {} palign(8) 		> MCU1_R5F0_BTCM, type = NOINIT
+    .ipcCopyVecsToExc                   : {} palign(8) > MCU1_R5F0_BTCM
+    .text	: {} palign(8)		> MCU1_0_DDR_SPACE
+    .const   	: {} palign(8) 		> MCU1_0_DDR_SPACE
+    .cinit   	: {} palign(8) 		> MCU1_0_DDR_SPACE
+    .pinit   	: {} palign(8) 		> MCU1_0_DDR_SPACE
+    .bss     	: {} align(4)  		> MCU1_0_DDR_SPACE
+    .data    	: {} palign(128) 	> MCU1_0_DDR_SPACE
+    .data_buffer: {} palign(128) 	> MCU1_0_DDR_SPACE
+    .sysmem  	: {} 			> MCU1_0_DDR_SPACE
+    .stack	: {} align(4)		> MCU1_0_DDR_SPACE
+
+    .const.devgroup.MCU_WAKEUP    : {} align(4)      > MCU1_0_DDR_SPACE
+    .const.devgroup.MAIN          : {} align(4)      > MCU1_0_DDR_SPACE
+    .const.devgroup.DMSC_INTERNAL : {} align(4)      > MCU1_0_DDR_SPACE
+    .bss.devgroup.MAIN            : {} align(4)      > MCU1_0_DDR_SPACE
+    .bss.devgroup.MCU_WAKEUP      : {} align(4)      > MCU1_0_DDR_SPACE
+    .bss.devgroup.DMSC_INTERNAL   : {} align(4)      > MCU1_0_DDR_SPACE
+    .boardcfg_data                : {} align(4)      > MCU1_0_DDR_SPACE
+    .bss.devgroup*                : {} align(4)      > MCU1_0_DDR_SPACE
+    .const.devgroup*              : {} align(4)      > MCU1_0_DDR_SPACE
+}  /* end of SECTIONS */
+
+/*----------------------------------------------------------------------------*/
+/* Misc linker settings                                                       */
+
+
+/*-------------------------------- END ---------------------------------------*/
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/r5_mpu_ipc.xs b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/r5_mpu_ipc.xs
new file mode 100644
index 0000000..44f66e4
--- /dev/null
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/r5_mpu_ipc.xs
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2019, Texas Instruments Incorporated
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * *  Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ * *  Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * *  Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ *  ======== event_MPU.xs ========
+ *  MPU Settings for J721E device's Cortex-R5F
+ */
+
+/*
+ *  -------------------------------------------------------------------------------------------------------------
+ * | Id | Base Address | Size | En | Cacheable                                 | XN | AccPerm             | Mask |
+ * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
+ * | 0  | 0x00000000   | 4GB  | T  | uncacheable, Shareable                    | F  | RW at PL 1 & PL 2   | 0x0  |
+ * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
+ * | 1  | 0 (local TCM)| 32K  | T  | Write-through, Shareable                  | F  | RW at PL 1          | 0x0  |
+ * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
+ * | 2  | 0x41000000   | 32K  | T  | Write-through, Shareable                  | F  | RW at PL 1          | 0x0  |
+ * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
+ * | 3  | 0x41010000   | 32K  | T  | Write-through, Shareable                  | F  | RW at PL 1          | 0x0  |
+ * |----|--------------|------|----|-------------------------------------------|----|---------------------|------|
+ * | 4  | 0x41C00000   | 1MB  | T  | Write-through, Shareable                  | F  | RW at PL 1          | 0x0  |
+ *  -------------------------------------------------------------------------------------------------------------
+ * | 5  | 0x70000000   | 8MB  | T  | MSMC Ram - Cachable                       | F  | RW at PL 1          | 0x0  |
+ *  -------------------------------------------------------------------------------------------------------------
+ * | 6  | 0x80000000   | 2GB  | T  | DDR - Strongly Ordered, Shareable         | F  | RW at PL 1 & PL 3   | 0x0  |
+ *  -------------------------------------------------------------------------------------------------------------
+ * | 7  | 0xAA000000   | 32MB | T  | DDR (VRing Buffer) - Uncacheble           | F  | RW at PL 1 & PL 3   | 0x0  |
+ * |-------------------------------------------------------------------------------------------------------------|
+ */
+
+/*
+ * Note: Marking a region as shareable will cause the region to behave as outer shareable with write through
+ *       no write-allocate caching policy irrespective of the actual cache policy set. Therefore, only select
+ *       regions that are actually shared outside the R5 CPUSS must be marked as shared.
+ */
+
+var MPU = xdc.useModule('ti.sysbios.family.arm.MPU');
+MPU.enableMPU = true;
+MPU.enableBackgroundRegion = true;
+
+var attrs = new MPU.RegionAttrs();
+MPU.initRegionAttrsMeta(attrs);
+
+/* This entry covers the whole 32 bit memory range
+   Address: 0x00000000-0xffffffff */
+attrs.enable = true;
+attrs.bufferable = false;
+attrs.cacheable = false;
+attrs.shareable = true;
+attrs.noExecute = true;
+attrs.accPerm = 1;          /* RW at PL1 */
+attrs.tex = 0;
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(0, 0x00000000, MPU.RegionSize_4G, attrs);
+
+/* This entry covers the ATCM mapped to 0 */
+attrs.enable = true;
+attrs.bufferable = false;
+attrs.cacheable = true;
+attrs.shareable = true;
+attrs.noExecute = false;
+attrs.accPerm = 1;          /* RW at PL1 */
+attrs.tex = 0;
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(1, 0x00000000, MPU.RegionSize_32K, attrs);
+
+/* This entry covers ATCM if mapped to 0x41000000 */
+attrs.enable = true;
+attrs.bufferable = false;
+attrs.cacheable = true;
+attrs.shareable = true;
+attrs.noExecute = false;
+attrs.accPerm = 1;          /* RW at PL1 */
+attrs.tex = 0;
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(2, 0x41000000, MPU.RegionSize_32K, attrs);
+
+/* This entry covers BTCM if mapped to 0x41010000 */
+attrs.enable = true;
+attrs.bufferable = false;
+attrs.cacheable = true;
+attrs.shareable = true;
+attrs.noExecute = false;
+attrs.accPerm = 1;          /* RW at PL1 */
+attrs.tex = 0;
+attrs.subregionDisableMask = 0x0;
+MPU.setRegionMeta(3, 0x41010000, MPU.RegionSize_32K, attrs);
+
+/* This entry covers RAM0 */
+attrs.enable = true;
+attrs.bufferable = false;
+attrs.cacheable = true;
+attrs.shareable = true;
+attrs.noExecute = false;
+attrs.accPerm = 1;          /* RW at PL1 */
+attrs.tex = 0;
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(4, 0x41C00000, MPU.RegionSize_1M, attrs);
+
+/* This entry covers MSMC SRAM */
+attrs.enable = true;
+attrs.bufferable = true;
+attrs.cacheable = true;
+attrs.shareable = false;
+attrs.noExecute = false;
+attrs.accPerm = 1;          /* RW at PL1 */
+attrs.tex = 1;
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(5, 0x70000000, MPU.RegionSize_8M, attrs);
+
+/* This entry covers DDR memory */
+attrs.enable = true;
+attrs.bufferable = true;
+attrs.cacheable = true;
+attrs.shareable = false;
+attrs.noExecute = false;
+attrs.accPerm = 0x3;          /* RW at PL1 & PL2 */
+attrs.tex = 1;
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(6, 0x80000000, MPU.RegionSize_2G, attrs);
+
+/* Ring Buffer uncached.... */
+attrs.enable = true;
+attrs.bufferable = false;
+attrs.cacheable = false;
+attrs.shareable = true;
+attrs.noExecute = true;
+attrs.accPerm = 3;          /* RW at PL1 */
+attrs.tex = 0;
+attrs.subregionDisableMask = 0;
+MPU.setRegionMeta(7, 0xAA000000, MPU.RegionSize_32M, attrs);
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/j721e/sysbios_r5f_btcm.cfg b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/sysbios_r5f_btcm.cfg
new file mode 100644
index 0000000..f3c6801
--- /dev/null
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/j721e/sysbios_r5f_btcm.cfg
@@ -0,0 +1,239 @@
+
+/* =============================================================================
+ *   Copyright (c) Texas Instruments Incorporated 2020
+ *
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *
+ *    Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *
+ *    Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the
+ *    distribution.
+ *
+ *    Neither the name of Texas Instruments Incorporated nor the names of
+ *    its contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+var Defaults = xdc.useModule('xdc.runtime.Defaults');
+var Diags = xdc.useModule('xdc.runtime.Diags');
+var Error = xdc.useModule('xdc.runtime.Error');
+var Log = xdc.useModule('xdc.runtime.Log');
+var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
+var Main = xdc.useModule('xdc.runtime.Main');
+var Memory = xdc.useModule('xdc.runtime.Memory')
+var System = xdc.useModule('xdc.runtime.System');
+var Text = xdc.useModule('xdc.runtime.Text');
+var Clock = xdc.useModule('ti.sysbios.knl.Clock');
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
+var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
+var GateSwi = xdc.useModule('ti.sysbios.gates.GateSwi');
+
+var BIOS = xdc.useModule('ti.sysbios.BIOS');
+var Hwi = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Hwi');
+var Core = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Core');
+var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
+var SysMin = xdc.useModule('xdc.runtime.SysMin');
+/* System stack size (used by ISRs and Swis) */
+Program.stack = 0x2000;
+var Task = xdc.useModule('ti.sysbios.knl.Task');
+Task.defaultStackSize = 0x4000;
+Task.common$.namedInstance = true;
+Task.common$.namedModule = true;
+
+/* Enable cache */
+var Cache = xdc.useModule('ti.sysbios.family.arm.v7r.Cache');
+Cache.enableCache = true;
+
+/*
+ * Direct CIO to UART
+ */
+/* System.SupportProxy = SysUart; */
+System.SupportProxy = SysMin;
+System.extendedFormats += "%f";
+/*
+ * Program.argSize sets the size of the .args section.
+ * The examples don't use command line args so argSize is set to 0.
+ */
+Program.argSize = 0x0;
+
+/*
+ * Uncomment this line to globally disable Asserts.
+ * All modules inherit the default from the 'Defaults' module.  You
+ * can override these defaults on a per-module basis using Module.common$.
+ * Disabling Asserts will save code space and improve runtime performance.
+Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;
+ */
+
+/*
+ * Uncomment this line to keep module names from being loaded on the target.
+ * The module name strings are placed in the .const section. Setting this
+ * parameter to false will save space in the .const section.  Error and
+ * Assert messages will contain an "unknown module" prefix instead
+ * of the actual module name.
+Defaults.common$.namedModule = false;
+ */
+
+/* Create default heap and hook it into Memory */
+var heapMemParams = new HeapMem.Params;
+heapMemParams.size = 16384*4;
+var heap0 = HeapMem.create(heapMemParams);
+
+Memory.defaultHeapInstance = heap0;
+
+/*
+ * Minimize exit handler array in System.  The System module includes
+ * an array of functions that are registered with System_atexit() to be
+ * called by System_exit().
+ */
+System.maxAtexitHandlers = 4;
+
+/*
+ * Uncomment this line to disable the Error print function.
+ * We lose error information when this is disabled since the errors are
+ * not printed.  Disabling the raiseHook will save some code space if
+ * your app is not using System_printf() since the Error_print() function
+ * calls System_printf().
+Error.raiseHook = null;
+ */
+
+/*
+ * Uncomment this line to keep Error, Assert, and Log strings from being
+ * loaded on the target.  These strings are placed in the .const section.
+ * Setting this parameter to false will save space in the .const section.
+ * Error, Assert and Log message will print raw ids and args instead of
+ * a formatted message.
+Text.isLoaded = false;
+ */
+
+/*
+ * Uncomment this line to disable the output of characters by SysMin
+ * when the program exits.  SysMin writes characters to a circular buffer.
+ * This buffer can be viewed using the SysMin Output view in ROV.
+SysMin.flushAtExit = false;
+ */
+
+/*
+ * Create and install logger for the whole system
+ */
+var loggerBufParams = new LoggerBuf.Params();
+loggerBufParams.numEntries = 32;
+var logger0 = LoggerBuf.create(loggerBufParams);
+Defaults.common$.logger = logger0;
+Main.common$.diags_INFO = Diags.ALWAYS_ON;
+
+BIOS.libType = BIOS.LibType_Custom;
+BIOS.cpuFreq.lo = 1000000000;
+BIOS.cpuFreq.hi = 0;
+
+var coreId = java.lang.System.getenv("CORE");
+
+var DMTimer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
+DMTimer.checkFrequency = false;
+for (var i=0; i < DMTimer.numTimerDevices; i++) {
+    DMTimer.intFreqs[i].lo = 19200000;
+    DMTimer.intFreqs[i].hi = 0;
+}
+
+if(coreId=="mcu1_0")
+{
+    Core.id = 0;
+    /* DM timer cfg */
+    Clock.timerId = 1;
+}
+if(coreId=="mcu1_1")
+{
+    Core.id = 1;
+    /* DM timer cfg */
+    Clock.timerId = 2;
+}
+if(coreId=="mcu2_0")
+{
+    Core.id = 0;
+    Clock.timerId = 0;
+    /* DMTimer #12 - in general, address is 0x024x0000 where x is timer # */
+    DMTimer.timerSettings[0].baseAddr = 0x024c0000;
+    DMTimer.timerSettings[0].intNum = 168;
+}
+if(coreId=="mcu2_1")
+{
+    Core.id = 1;
+    Clock.timerId = 1;
+    /* DMTimer #13 - in general, address is 0x024x0000 where x is timer # */
+    DMTimer.timerSettings[1].baseAddr = 0x024d0000;
+    DMTimer.timerSettings[1].intNum = 169;
+}
+if(coreId=="mcu3_0")
+{
+    Core.id = 0;
+    Clock.timerId = 2;
+    /* DMTimer #14 - in general, address is 0x024x0000 where x is timer # */
+    DMTimer.timerSettings[2].baseAddr = 0x024e0000;
+    DMTimer.timerSettings[2].intNum = 170;
+}
+if(coreId=="mcu3_1")
+{
+    Core.id = 1;
+    Clock.timerId = 3;
+    /* DMTimer #15 - in general, address is 0x024x0000 where x is timer # */
+    DMTimer.timerSettings[3].baseAddr = 0x024f0000;
+    DMTimer.timerSettings[3].intNum = 171;
+}
+
+/* Set base address of Vector Interrupt Manager */
+if((coreId=="mcu2_0") || (coreId=="mcu2_1") || (coreId=="mcu3_0") || (coreId=="mcu3_1"))
+{
+    var Hwi = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Hwi');
+    Hwi.vimBaseAddress = 0x0ff80000;
+}
+
+/* Sysbios supports workaround for Silicon issue https://jira.itg.ti.com/browse/K3_OPEN_SI-148
+ * Details of silicon issue : https://confluence.itg.ti.com/display/PROCIPDEV/%2310+The+same+interrupt+cannot+be+nested+back-2-back+within+another+interrupt
+ * Sysbios Requirement Details: https://jira.itg.ti.com/browse/SYSBIOS-1419
+ * Workaround requires use of a resevred dummyIRQ.
+ * Using DummyIRQ#383 as per cslr_intr_mss.h it is a reserved interrupt not connected to any
+ * peripheral interrupt sources
+ */
+if((coreId=="mcu1_0") || (coreId=="mcu1_1"))
+{
+    Hwi.dummyIRQ                   = 383;
+}
+if((coreId=="mcu2_0") || (coreId=="mcu2_1") || (coreId=="mcu3_0") || (coreId=="mcu3_1"))
+{
+    Hwi.dummyIRQ                   = 511;
+}
+
+var Reset = xdc.useModule("xdc.runtime.Reset");
+Reset.fxns[Reset.fxns.length++] = "&ipcCopyVecs2Exc";
+
+/*
+ * Initialize MPU and enable it
+ *
+ * Note: MPU must be enabled and properly configured for caching to work.
+ */
+xdc.loadCapsule("r5_mpu_ipc.xs");
+
+/* Check if application needs to update with custom configuration options */
+/* Caution: This should be at the end of this file after all other common cfg */
+var cfgUpdate = java.lang.System.getenv("XDC_CFG_UPDATE")
+if ((cfgUpdate != '')&&(cfgUpdate != null))
+{
+    xdc.print("Loading configuration update " + cfgUpdate);
+    xdc.loadCapsule(cfgUpdate);
+}
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/makefile b/packages/ti/drv/spi/example/mcspi_slavemode/makefile
index 7ec572c..2c325ba 100644
--- a/packages/ti/drv/spi/example/mcspi_slavemode/makefile
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/makefile
@@ -20,7 +20,7 @@ XDC_CFG_FILE_mpu1_0 = ./am65xx/mcspiMasterSlaveTest_a53.cfg
 XDC_CFG_FILE_mcu1_0 = ./am65xx/mcspiMasterSlaveTest_r5.cfg
 else
 ifeq ($(SOC),$(filter $(SOC), j721e j7200 am64x))
-XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/$(SOC)/sysbios_$(ISA).cfg
+XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/drv/spi/example/mcspi_slavemode/$(SOC)/sysbios_$(ISA)_btcm.cfg
 endif
 endif
 
@@ -57,11 +57,12 @@ else
 CFLAGS_SPI_MS     = -DMCSPI_MASTER_TASK
 APP_MASTER_SLAVE  = Master
 ifeq ($(SOC),$(filter $(SOC), j721e j7200))
+SRCS_ASM_COMMON += ipcCopyVecs2Exc.asm
 # Slave uses local linker command file to avoid code/data memory conflict with master application
 ifeq ($(IS_BAREMETAL),yes)
 EXTERNAL_LNKCMD_FILE_LOCAL =  $(PDK_INSTALL_PATH)/ti/drv/spi/example/mcspi_slavemode/$(SOC)/linker_mcu.lds
 else
-EXTERNAL_LNKCMD_FILE_LOCAL =  $(PDK_INSTALL_PATH)/ti/drv/spi/example/mcspi_slavemode/$(SOC)/linker_mcu_sysbios.lds
+EXTERNAL_LNKCMD_FILE_LOCAL =  $(PDK_INSTALL_PATH)/ti/drv/spi/example/mcspi_slavemode/$(SOC)/linker_r5f_mcu1_0_btcm_sysbios.lds
 
 endif
 endif
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/src/ipcCopyVecs2Exc.asm b/packages/ti/drv/spi/example/mcspi_slavemode/src/ipcCopyVecs2Exc.asm
new file mode 100644
index 0000000..d740900
--- /dev/null
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/src/ipcCopyVecs2Exc.asm
@@ -0,0 +1,59 @@
+;
+;  Copyright (c) 2020, Texas Instruments Incorporated
+;  All rights reserved.
+; 
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+; 
+;  *  Redistributions of source code must retain the above copyright
+;     notice, this list of conditions and the following disclaimer.
+; 
+;  *  Redistributions in binary form must reproduce the above copyright
+;     notice, this list of conditions and the following disclaimer in the
+;     documentation and/or other materials provided with the distribution.
+; 
+;  *  Neither the name of Texas Instruments Incorporated nor the names of
+;     its contributors may be used to endorse or promote products derived
+;     from this software without specific prior written permission.
+; 
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+;  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+;  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+;  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+;  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+;  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+;  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;
+;
+; ======== ipcCopyVecs2Exc.asm ========
+; Copies sysbios defined vector to Exception Handler area
+;
+    .text
+    .sect   ".ipcCopyVecsToExc"
+;==============================================================================
+;   void ipcCopyVecs2Exc( void )
+;==============================================================================
+    .global ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
+
+    .global ipcCopyVecs2Exc
+ipcCopyVecs2Exc:
+        .asmfunc
+        movw    r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
+        movt    r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
+        mov     r1, #0                  ; Exeception Handler address
+        mov	r2, #64			; 64 bytes
+loop:
+        ldr	r3, [r0], #4
+        str     r3, [r1], #4
+        subs    r2, r2, #4
+        bgt     loop
+exit:
+        bx      lr
+        .endasmfunc
+
+        .end
diff --git a/packages/ti/drv/spi/example/mcspi_slavemode/src/main_mcspi_slave_mode.c b/packages/ti/drv/spi/example/mcspi_slavemode/src/main_mcspi_slave_mode.c
index 04d7493..cb8c0cd 100755
--- a/packages/ti/drv/spi/example/mcspi_slavemode/src/main_mcspi_slave_mode.c
+++ b/packages/ti/drv/spi/example/mcspi_slavemode/src/main_mcspi_slave_mode.c
@@ -1588,6 +1588,8 @@ void slaveTaskFxn()
     }
 }
 
+/* Make this variable non zero to debug using CCS */
+volatile uint32_t ccs_debug_loop = 0x0;
 /*
  *  ======== masterTaskFxn ========
  *  This task is part of master example project.
@@ -1601,6 +1603,8 @@ Void masterTaskFxn (UArg arg0, UArg arg1)
 void masterTaskFxn()
 #endif
 {
+    while(ccs_debug_loop);
+
     uint32_t  i;
     bool      testFail = false;
     SPI_Tests *test;
-- 
2.17.1

error: creating output section ".utilsCopyVecsToAtcm" without a SECTIONS
   specification
error: errors encountered during linking;
   "/home/ketaki/ti-processor-sdk-rtos-j721e-evm-07_03_00_07/pdk_jacinto_07_03_
   00_29/packages/ti/binary/UART_TestApp/bin/j721e_evm/UART_j721e_evm_mcu1_0Tes
   tApp_release.xer5f" not built

>> Compilation failure
/home/ketaki/ti-processor-sdk-rtos-j721e-evm-07_03_00_07/pdk_jacinto_07_03_00_29/packages/ti/build/makerules/rules_ti_cgt_arm.mk:312: recipe for target '/home/ketaki/ti-processor-sdk-rtos-j721e-evm-07_03_00_07/pdk_jacinto_07_03_00_29/packages/ti/binary/UART_TestApp/bin/j721e_evm/UART_j721e_evm_mcu1_0TestApp_release.xer5f' failed
make[2]: *** [/home/ketaki/ti-processor-sdk-rtos-j721e-evm-07_03_00_07/pdk_jacinto_07_03_00_29/packages/ti/binary/UART_TestApp/bin/j721e_evm/UART_j721e_evm_mcu1_0TestApp_release.xer5f] Error 1
/home/ketaki/ti-processor-sdk-rtos-j721e-evm-07_03_00_07/pdk_jacinto_07_03_00_29/packages/ti/build/makerules/common.mk:405: recipe for target 'mcu1_0' failed
make[1]: *** [mcu1_0] Error 2
makefile:361: recipe for target 'UART_TestApp' failed
make: *** [UART_TestApp] Error 2

/*----------------------------------------------------------------------------*/
/* File: linker_r5f_mcu1_0_btcm_sysbios.lds                                        */
/* Description:			  					      */
/*    Link command file for J7ES MCU1_0 view				      */
/*	  TI ARM Compiler version 15.12.3 LTS or later			      */
/*                                                                            */
/* (c) Texas Instruments 2018, All rights reserved.                           */
/*----------------------------------------------------------------------------*/
/*  History:								      */
/*    Aug 26th, 2016 Original version .......................... Loc Truong   */
/*    Aug 01th, 2017 new TCM mem map  .......................... Loc Truong   */
/*    Nov 07th, 2017 Changes for R5F Init Code.................. Vivek Dhande */
/*    Sep 17th, 2018 Added DDR sections for IPC................. J. Bergsagel */
/*    Sep 26th, 2018 Extra mem sections for IPC resource table.. J. Bergsagel */
/*    Nov 06th, 2018 Correction to TCM addresses for MCU1_0..... J. Bergsagel */
/*    Nov 07th, 2018 Split up OCMRAM_MCU for split-mode R5Fs.... J. Bergsagel */
/*    Feb 20th, 2019 Use R5F BTCM memory for boot vectors........J. Bergsagel */
/*    Apr 23th, 2019 Changes for R5F startup Code............... Vivek Dhande */
/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */
/* Standard linker options						      */
--retain="*(.bootCode)"
--retain="*(.startupCode)"
--retain="*(.startupData)"
--fill_value=0
--stack_size=0x2000
--heap_size=0x1000

-stack  0x20000 //org 0x2000                              /* SOFTWARE STACK SIZE           */
-heap   0x2000 //org 0x2000                              /* HEAP AREA SIZE                */

--define FILL_PATTERN=0xFEAA55EF
--define FILL_LENGTH=0x100

#define DDR0_ALLOCATED_START 0xA0000000

#define MCU1_0_EXT_DATA_BASE     (DDR0_ALLOCATED_START + 0x00100000)
#define MCU1_0_R5F_MEM_TEXT_BASE (DDR0_ALLOCATED_START + 0x00200000)
#define MCU1_0_R5F_MEM_DATA_BASE (DDR0_ALLOCATED_START + 0x00300000)
#define MCU1_0_DDR_SPACE_BASE    (DDR0_ALLOCATED_START + 0x00400000)

#define MCU1_1_ALLOCATED_START   DDR0_ALLOCATED_START + 0x01000000
#define MCU1_1_EXT_DATA_BASE     (MCU1_1_ALLOCATED_START + 0x00100000)
#define MCU1_1_R5F_MEM_TEXT_BASE (MCU1_1_ALLOCATED_START + 0x00200000)
#define MCU1_1_R5F_MEM_DATA_BASE (MCU1_1_ALLOCATED_START + 0x00300000)
#define MCU1_1_DDR_SPACE_BASE    (MCU1_1_ALLOCATED_START + 0x00400000)

#define MCU2_0_ALLOCATED_START   DDR0_ALLOCATED_START + 0x02000000
#define MCU2_0_EXT_DATA_BASE     (MCU2_0_ALLOCATED_START + 0x00100000)
#define MCU2_0_R5F_MEM_TEXT_BASE (MCU2_0_ALLOCATED_START + 0x00200000)
#define MCU2_0_R5F_MEM_DATA_BASE (MCU2_0_ALLOCATED_START + 0x00300000)
#define MCU2_0_DDR_SPACE_BASE    (MCU2_0_ALLOCATED_START + 0x00400000)

#define MCU2_1_ALLOCATED_START   DDR0_ALLOCATED_START + 0x03000000
#define MCU2_1_EXT_DATA_BASE     (MCU2_1_ALLOCATED_START + 0x00100000)
#define MCU2_1_R5F_MEM_TEXT_BASE (MCU2_1_ALLOCATED_START + 0x00200000)
#define MCU2_1_R5F_MEM_DATA_BASE (MCU2_1_ALLOCATED_START + 0x00300000)
#define MCU2_1_DDR_SPACE_BASE    (MCU2_1_ALLOCATED_START + 0x00400000)

#define ATCM_START 0x00000000
#define BTCM_START 0x41010000

-e __VECS_ENTRY_POINT
--retain="*(.intvecs)"
--retain="*(.intc_text)"
--retain="*(.rstvectors)"
--retain="*(.ipcCopyVecsToExc)"

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */
MEMORY
{
    /* MCU1_R5F_0 local view  */
    MCU_ATCM (RWX)		: origin=ATCM_START	length=0x8000
    /* MCU1_R5F0_TCMB0 (RWIX)	: origin=BTCM_START	length=0x8000 (documented only, to void conflict below) */

    /* MCU1_R5F_0 SoC view  */
    MCU1_R5F0_ATCM (RWIX)  	: origin=0x41000000 length=0x8000
    MCU1_R5F0_BTCM_VECS (RWIX)  : origin=0x41010000 length=0x0100
    MCU1_R5F0_BTCM (RWIX) 	: origin=0x41010100 length=0x7F00

    DDR0_RESERVED    (RWIX)  	: origin=0x80000000 length=0x20000000	  	/* 512MB */
    MCU1_0_IPC_DATA (RWIX)	: origin=DDR0_ALLOCATED_START     length=0x00100000	/*   1MB */
    MCU1_0_EXT_DATA  (RWIX)	: origin=MCU1_0_EXT_DATA_BASE     length=0x00100000	/*   1MB */
    MCU1_0_R5F_MEM_TEXT (RWIX)	: origin=MCU1_0_R5F_MEM_TEXT_BASE length=0x00100000	/*   1MB */
    MCU1_0_R5F_MEM_DATA (RWIX)	: origin=MCU1_0_R5F_MEM_DATA_BASE length=0x00100000	/*   1MB */
    MCU1_0_DDR_SPACE (RWIX)	: origin=MCU1_0_DDR_SPACE_BASE    length=0x00C00000	/*  12MB */
    MCU1_1_IPC_DATA (RWIX)	: origin=MCU1_1_ALLOCATED_START   length=0x00100000	/*   1MB */
    MCU1_1_EXT_DATA  (RWIX)	: origin=MCU1_1_EXT_DATA_BASE     length=0x00100000	/*   1MB */
    MCU1_1_R5F_MEM_TEXT (RWIX)	: origin=MCU1_1_R5F_MEM_TEXT_BASE length=0x00100000	/*   1MB */
    MCU1_1_R5F_MEM_DATA (RWIX)	: origin=MCU1_1_R5F_MEM_DATA_BASE length=0x00100000	/*   1MB */
    MCU1_1_DDR_SPACE (RWIX)	: origin=MCU1_1_DDR_SPACE_BASE    length=0x00C00000	/*  12MB */
    MCU2_0_IPC_DATA (RWIX)	: origin=MCU2_0_ALLOCATED_START   length=0x00100000	/*   1MB */
    MCU2_0_EXT_DATA  (RWIX)	: origin=MCU2_0_EXT_DATA_BASE     length=0x00100000	/*   1MB */
    MCU2_0_R5F_MEM_TEXT (RWIX)	: origin=MCU2_0_R5F_MEM_TEXT_BASE length=0x00100000	/*   1MB */
    MCU2_0_R5F_MEM_DATA (RWIX)	: origin=MCU2_0_R5F_MEM_DATA_BASE length=0x00100000	/*   1MB */
    MCU2_0_DDR_SPACE (RWIX)	: origin=MCU2_0_DDR_SPACE_BASE    length=0x00C00000	/*  12MB */
    MCU2_1_IPC_DATA (RWIX)	: origin=MCU2_1_ALLOCATED_START   length=0x00100000	/*   1MB */
    MCU2_1_EXT_DATA  (RWIX)	: origin=MCU2_1_EXT_DATA_BASE     length=0x00100000	/*   1MB */
    MCU2_1_R5F_MEM_TEXT (RWIX)	: origin=MCU2_1_R5F_MEM_TEXT_BASE length=0x00100000	/*   1MB */
    MCU2_1_R5F_MEM_DATA (RWIX)	: origin=MCU2_1_R5F_MEM_DATA_BASE length=0x00100000	/*   1MB */
    MCU2_1_DDR_SPACE (RWIX)	: origin=MCU2_1_DDR_SPACE_BASE    length=0x00C00000	/*  12MB */

    SHARED_DDR_SPACE (RWIX)	: origin=0xAA000000 length=0x01C00000           /*  28MB */

}  /* end of MEMORY */

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */
SECTIONS
{
    .vecs : {
         *(.vecs)
    } palign(8) > BTCM_START
    .vecs       : {
        __VECS_ENTRY_POINT = .;
    } > MCU1_R5F0_BTCM_VECS
    xdc.meta (COPY): { *(xdc.meta) } > MCU1_R5F0_BTCM
    .init_text  : {
                     boot.*(.text)
                     *(.text:ti_sysbios_family_arm_MPU_*)
                     *(.text:ti_sysbios_family_arm_v7r_Cache_*)
                  }  palign(8) > MCU1_R5F0_BTCM
    .text:xdc_runtime_Startup_reset__I     : {} palign(8) > MCU1_R5F0_BTCM
    .bootCode    	: {} palign(8) 		> MCU1_R5F0_BTCM
    .startupCode 	: {} palign(8) 		> MCU1_R5F0_BTCM
    .startupData 	: {} palign(8) 		> MCU1_R5F0_BTCM, type = NOINIT
    .ipcCopyVecsToExc                  : {} palign(8) > MCU1_R5F0_BTCM
    .text	: {} palign(8)		> MCU1_0_DDR_SPACE
    .const   	: {} palign(8) 		> MCU1_0_DDR_SPACE
    .cinit   	: {} palign(8) 		> MCU1_0_DDR_SPACE
    .pinit   	: {} palign(8) 		> MCU1_0_DDR_SPACE
    .bss     	: {} align(4)  		> MCU1_0_DDR_SPACE
    .data    	: {} palign(128) 	> MCU1_0_DDR_SPACE
    .data_buffer: {} palign(128) 	> MCU1_0_DDR_SPACE
    .sysmem  	: {} 			> MCU1_0_DDR_SPACE
    .stack	: {} align(4)		> MCU1_0_DDR_SPACE

    .resource_table : {
        __RESOURCE_TABLE = .;
    } > MCU1_0_EXT_DATA

    .tracebuf   : {}			> MCU1_0_EXT_DATA

    .const.devgroup.MCU_WAKEUP    : {} align(4)      > MCU1_0_DDR_SPACE
    .const.devgroup.MAIN          : {} align(4)      > MCU1_0_DDR_SPACE
    .const.devgroup.DMSC_INTERNAL : {} align(4)      > MCU1_0_DDR_SPACE
    .bss.devgroup.MAIN            : {} align(4)      > MCU1_0_DDR_SPACE
    .bss.devgroup.MCU_WAKEUP      : {} align(4)      > MCU1_0_DDR_SPACE
    .bss.devgroup.DMSC_INTERNAL   : {} align(4)      > MCU1_0_DDR_SPACE
    .boardcfg_data                : {} align(4)      > MCU1_0_DDR_SPACE
    .bss.devgroup*                : {} align(4)      > MCU1_0_DDR_SPACE
    .const.devgroup*              : {} align(4)      > MCU1_0_DDR_SPACE

/*----------------------------------------------------------------------------*/
/* Misc linker settings                                                       */
#if 0
   /* Additional sections settings     */
    McalTextSection : fill=FILL_PATTERN, align=4, load > MCU1_0_DDR_SPACE
    {
        .=align(4);
        __linker_can_text_start = .;
        . += FILL_LENGTH;
        *(CAN_TEXT_SECTION)
        *(CAN_ISR_TEXT_SECTION)
        .=align(4);
        . += FILL_LENGTH;
        __linker_can_text_end = .;

        .=align(4);
        __linker_dio_text_start = .;
        . += FILL_LENGTH;
        *(DIO_TEXT_SECTION)
        .=align(4);
        . += FILL_LENGTH;
        __linker_dio_text_end = .;
    }
    McalConstSection : fill=FILL_PATTERN, align=4, load > MCU1_0_DDR_SPACE
    {
        .=align(4);
        __linker_can_const_start = .;
        . += FILL_LENGTH;
        *(CAN_CONST_8_SECTION)
        *(CAN_CONST_32_SECTION)
        *(CAN_CONFIG_SECTION)
        .=align(4);
        . += FILL_LENGTH;
        __linker_can_const_end = .;

        .=align(4);
        __linker_dio_const_start = .;
        . += FILL_LENGTH;
        *(DIO_CONST_32_SECTION)
        *(DIO_CONST_UNSPECIFIED_SECTION)
        *(DIO_CONFIG_SECTION)
        .=align(4);
        . += FILL_LENGTH;
        __linker_dio_const_end = .;
    }

    McalInitSection : fill=FILL_PATTERN, align=4, load > MCU1_0_DDR_SPACE
    {
        .=align(4);
        __linker_can_init_start = .;
        . += FILL_LENGTH;
        *(CAN_DATA_INIT_8_SECTION)
        .=align(4);
        . += FILL_LENGTH;
        __linker_can_init_end = .;
    }
    McalNoInitSection : fill=FILL_PATTERN, align=4, load > MCU1_0_DDR_SPACE, type = NOINIT
    {
        .=align(4);
        __linker_can_no_init_start = .;
        . += FILL_LENGTH;
        *(CAN_DATA_NO_INIT_UNSPECIFIED_SECTION)
        *(CAN_DATA_NO_INIT_32_SECTION)
        .=align(4);
        . += FILL_LENGTH;
        __linker_can_no_init_end = .;
    }
    /* Example Utility specifics */
    UtilityNoInitSection : align=4, load > MCU1_0_DDR_SPACE, type = NOINIT
    {
        .=align(4);
        __linker_utility_no_init_start = .;
        . += FILL_LENGTH;
        *(EG_TEST_RESULT_32_SECTION)
        .=align(4);
        . += FILL_LENGTH;
        __linker_utility_no_init_end = .;
    }
#endif
} /* end of SECTIONS */
/*-------------------------------- END ---------------------------------------*/

#
# Copyright (c) 2013-2019, Texas Instruments Incorporated
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# *  Redistributions of source code must retain the above copyright
#    notice, this list of conditions and the following disclaimer.
#
# *  Redistributions in binary form must reproduce the above copyright
#    notice, this list of conditions and the following disclaimer in the
#    documentation and/or other materials provided with the distribution.
#
# *  Neither the name of Texas Instruments Incorporated nor the names of
#    its contributors may be used to endorse or promote products derived
#    from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#

# File: env.mk. This file contains all the paths and other ENV variables

#
# Module paths
#

# Destination root directory.
#   - specify the directory where you want to place the object, archive/library,
#     binary and other generated files in a different location than source tree
#   - or leave it blank to place then in the same tree as the source
DEST_ROOT ?= $(pdk_PATH)/ti/binary

# Utilities directory. This is required only if the build machine is Windows.
#   - specify the installation directory of utility which supports POSIX commands
#     (eg: Cygwin installation or MSYS installation).
UTILS_INSTALL_DIR ?= $(utils_PATH)

# Set path separator, etc based on the OS
ifeq ($(OS),Windows_NT)
  PATH_SEPARATOR = ;
  UTILSPATH = $(UTILS_INSTALL_DIR)/
  export SHELL := $(UTILSPATH)sh.exe
else
  # else, assume it is linux
  PATH_SEPARATOR = :
  UTILSPATH = /bin/
endif

ifeq ($(BUILD_OS_TYPE),tirtos)
  # BIOS
  bios_INCLUDE = $(bios_PATH)/packages
  export bios_INCLUDE

  # XDC
  xdc_INCLUDE = $(xdc_PATH)/packages
  export xdc_INCLUDE

  # EDMA
  edma_INCLUDE = $(edma3_lld_PATH)/packages
  export edma_INCLUDE
  # - used to ignore include if component not present
  -include $(edma3_lld_PATH)/packages/component.mk

  # NDK
  ndk_INCLUDE = $(ndk_PATH)/packages
  export ndk_INCLUDE

  # NS
  ns_INCLUDE = $(ns_PATH)/source/
  export ns_INCLUDE

endif

#Below applicable only for TDA devices
# Radar mmwavelink
radarLink_INCLUDE = $(radarLink_PATH) \
                    $(radarLink_PATH)/ti/control/mmwavelink/include \
                    $(radarLink_PATH)/ti/control/mmwavelink/src     \
                    $(radarLink_PATH)/ti/control/mmwavelink
radarFirmware_INCLUDE = $(radarMssFirmware_PATH) $(radarBssFirmware_PATH)   \
                        $(radarLink_PATH)/firmware
export radarLink_INCLUDE
export radarFirmware_INCLUDE

# PDK
pdk_INCLUDE = $(pdk_PATH)

# Add additional pdk include paths if sub-components are in different directories
ifneq ($(PDK_CSL_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CSL_ROOT_PATH)
endif

ifneq ($(PDK_CSL2_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CSL2_ROOT_PATH)
  pdk_INCLUDE += $(PDK_CSL2_ROOT_PATH)/ti/csl/arch/r5
  pdk_INCLUDE += $(PDK_CSL2_ROOT_PATH)/ti/csl
endif

ifneq ($(PDK_SA_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_SA_ROOT_PATH)
endif
ifneq ($(PDK_PM_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PM_ROOT_PATH)
endif
ifneq ($(PDK_PMIC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PMIC_ROOT_PATH)
endif
ifneq ($(PDK_OSAL_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_OSAL_ROOT_PATH)
endif
ifneq ($(PDK_I2C_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_I2C_ROOT_PATH)
endif
ifneq ($(PDK_VPS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_VPS_ROOT_PATH)
endif
ifneq ($(PDK_GPIO_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_GPIO_ROOT_PATH)
endif
ifneq ($(PDK_FATFS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_FATFS_ROOT_PATH)
endif
ifneq ($(PDK_MMCSD_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_MMCSD_ROOT_PATH)
endif
ifneq ($(PDK_PCIE_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PCIE_ROOT_PATH)
endif
ifneq ($(PDK_USB_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_USB_ROOT_PATH)
endif
ifneq ($(PDK_MCASP_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_MCASP_ROOT_PATH)
endif
ifneq ($(PDK_TIMESYNC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_TIMESYNC_ROOT_PATH)
endif
ifneq ($(PDK_MCBSP_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_MCBSP_ROOT_PATH)
endif
ifneq ($(PDK_PROFILING_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PROFILING_ROOT_PATH)
endif
ifneq ($(PDK_TRACE_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_TRACE_ROOT_PATH)
endif
ifneq ($(PDK_PRUSS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PRUSS_ROOT_PATH)
endif
ifneq ($(PDK_NIMU_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_NIMU_ROOT_PATH)
endif
ifneq ($(PDK_NIMU_ICSS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_NIMU_ICSS_ROOT_PATH)
endif
ifneq ($(PDK_ICSS_EMAC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_ICSS_EMAC_ROOT_PATH)
endif
ifneq ($(PDK_EMAC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_EMAC_ROOT_PATH)
endif
ifneq ($(PDK_UART_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_UART_ROOT_PATH)
endif
ifneq ($(PDK_SPI_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_SPI_ROOT_PATH)
endif
ifneq ($(PDK_BOARD_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_BOARD_ROOT_PATH)
endif
ifneq ($(PDK_GPMC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_GPMC_ROOT_PATH)
endif
ifneq ($(PDK_IOLINK_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_IOLINK_ROOT_PATH)
endif
ifneq ($(PDK_BOARD_DIAG_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_BOARD_DIAG_ROOT_PATH)
endif
ifneq ($(PDK_BOARD_UTILS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_BOARD_UTILS_ROOT_PATH)
endif

#Below applicable only for K3 devices
ifneq ($(PDK_UDMA_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_UDMA_ROOT_PATH)
endif
ifneq ($(PDK_ENET_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_ENET_ROOT_PATH)
endif
ifneq ($(PDK_CSIRX_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CSIRX_ROOT_PATH)
endif
ifneq ($(PDK_CSITX_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CSITX_ROOT_PATH)
endif
ifneq ($(PDK_DSS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_DSS_ROOT_PATH)
endif
ifneq ($(PDK_SCICLIENT_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_SCICLIENT_ROOT_PATH)
endif
ifneq ($(PDK_IPC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_IPC_ROOT_PATH)
endif
ifneq ($(PDK_FVID2_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_FVID2_ROOT_PATH)
endif
ifneq ($(PDK_CAL_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CAL_ROOT_PATH)
endif

#Below are used for TDA/DRA SBL
ifneq ($(PDK_STW_LLD_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_STW_LLD_ROOT_PATH)
endif
ifneq ($(PDK_SBL_AUTO_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_SBL_AUTO_ROOT_PATH)
endif
ifneq ($(PDK_NORFLASH_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_NORFLASH_ROOT_PATH)
endif
ifneq ($(PDK_QSPIFLASH_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_QSPIFLASH_ROOT_PATH)
endif

#Below applicable only for TPR12 devices
ifneq ($(PDK_CRC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CRC_ROOT_PATH)
endif
ifneq ($(PDK_EDMA_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_EDMA_ROOT_PATH)
endif
ifneq ($(PDK_MAILBOX_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_MAILBOX_ROOT_PATH)
endif
ifneq ($(PDK_ESM_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_ESM_ROOT_PATH)
endif
ifneq ($(PDK_CAN_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CAN_ROOT_PATH)
endif

export pdk_INCLUDE

include $(pdk_PATH)/ti/build/makerules/component.mk

# Package Relative path and destination directory
PACKAGE_RELPATH = pdk_/packages
PACKAGE_ROOT = $(DEST_ROOT)/package/$(PACKAGE_SELECT)/$(PACKAGE_RELPATH)
export PACKAGE_RELPATH
export PACKAGE_ROOT

#
# Tools paths
#

# Cortex-A8
CODEGEN_PATH_A8 =

# DSP
CODEGEN_PATH_C674 = $(C6X_GEN_INSTALL_PATH)


# Commands commonly used within the make files
RM = $(UTILSPATH)rm -f
MV = $(UTILSPATH)mv
RMDIR = $(UTILSPATH)rm -rf
MKDIR = $(UTILSPATH)mkdir
ECHO = @$(UTILSPATH)echo
CAT	= $(UTILSPATH)cat

#emake provides detailed info for build analysis.
EMAKE = emake --emake-emulation=gmake --emake-gen-subbuild-db=1 --emake-annodetail=waiting

ifeq ($(OS),Windows_NT)
#if XDCTOOLS present use xdctools' gmake, else use the one available in the system
  ifneq ($(xdc_PATH),)
    MAKE = $(xdc_PATH)/gmake
  else
    MAKE = gmake
  endif
else
  MAKE = make
endif

EGREP = $(UTILSPATH)egrep
CP = $(UTILSPATH)cp
ifeq ($(OS),Windows_NT)
  CHMOD = $(UTILSPATH)echo
else
  CHMOD = $(UTILSPATH)chmod
endif

ifeq ($(BUILD_OS_TYPE),freertos)
  ifeq ($(SOC),$(filter $(SOC), am65xx j721e j7200 tpr12 awr294x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
       CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5_freertos.lds
    endif 
  endif
  ifeq ($(SOC),$(filter $(SOC), tpr12 awr294x))
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66_freertos.cmd
    endif
  endif
endif

ifeq ($(BUILD_OS_TYPE),baremetal)
  ifeq ($(SOC),$(filter $(SOC), am65xx j721e am77x j7200 am64x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
        CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5.lds
    endif
  endif
  ifeq ($(SOC),$(filter $(SOC), am65xx am64x))
    ifeq ($(CONFIG_BLD_XDC_a53),)
        CONFIG_BLD_LNK_a53   = $(pdk_PATH)/ti/build/$(SOC)/linker_a53.lds
    endif
  endif
  ifeq ($(SOC),$(filter $(SOC), am64x))
    ifeq ($(CONFIG_BLD_XDC_m4f),)
        CONFIG_BLD_LNK_m4f   = $(pdk_PATH)/ti/build/$(SOC)/linker_m4f.lds
    endif
  endif
  ifeq ($(SOC),$(filter $(SOC), j721e am77x j7200))
    ifeq ($(CONFIG_BLD_XDC_a72),)
        CONFIG_BLD_LNK_a72   = $(pdk_PATH)/ti/build/$(SOC)/linker_a72_mpu1_0.lds
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66.cmd
    endif
    ifeq ($(CONFIG_BLD_XDC_c7x),)
        CONFIG_BLD_LNK_c7x   = $(pdk_PATH)/ti/build/$(SOC)/linker_c7x.lds
    endif
  endif
  ifeq ($(SOC),$(filter $(SOC), tpr12 awr294x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
        CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5.lds
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66_baremetal.cmd
    endif
  endif
endif

ifeq ($(BUILD_OS_TYPE),tirtos)
  #
  # XDC specific ENV variables
  #
  # XDC Config.bld file (required for configuro); Derives from top-level pdk_PATH

  ifeq ($(SOC),$(filter $(SOC), tpr12 awr294x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
        CONFIG_BLD_XDC_r5f   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_r5f.bld
        CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5_sysbios.lds
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_XDC_c66   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_c66.bld
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66.cmd
    endif
  endif

  ifeq ($(SOC),tda2xx)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_c66.bld
    endif
  endif

  ifeq ($(SOC),tda2px)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_c66.bld
    endif
  endif

  ifeq ($(SOC),dra75x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_c66.bld
    endif
  endif

  ifeq ($(SOC),tda2ex)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex_c66.bld
    endif
  endif

  ifeq ($(SOC),dra72x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex_c66.bld
    endif
  endif

  ifeq ($(SOC),tda3xx)
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4   = $(pdk_PATH)/ti/build/tda3xx/config_tda3xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda3xx/config_tda3xx_c66.bld
    endif
  endif

  ifeq ($(SOC),dra78x)
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4   = $(pdk_PATH)/ti/build/tda3xx/config_tda3xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda3xx/config_tda3xx_c66.bld
    endif
  endif

  ifeq ($(SOC),am571x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/am571x/config_am571x_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/am571x/config_am571x.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/am571x/config_am571x_c66.bld
    endif
  endif

  ifeq ($(SOC),am572x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/am572x/config_am572x_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/am572x/config_am572x.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/am572x/config_am572x_c66.bld
    endif
  endif

  ifeq ($(SOC),am574x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/am574x/config_am574x_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/am574x/config_am574x.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/am574x/config_am574x_c66.bld
    endif
  endif

  ifeq ($(SOC),am335x)
    ifeq ($(CONFIG_BLD_XDC_a8),)
     CONFIG_BLD_XDC_a8 = $(pdk_PATH)/ti/build/am335x/config_am335x_a8.bld
    endif
  endif

  ifeq ($(SOC),am437x)
    ifeq ($(CONFIG_BLD_XDC_a9),)
     CONFIG_BLD_XDC_a9 = $(pdk_PATH)/ti/build/am437x/config_am437x_a9.bld
    endif
  endif

  ifeq ($(SOC),k2g)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/k2g/config_k2g_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66 = $(pdk_PATH)/ti/build/k2g/config_k2g_c66.bld
    endif
  endif

#Used linker file

  ifeq ($(SOC),$(filter $(SOC), am65xx j721e am77x j7200 am64x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
        CONFIG_BLD_XDC_r5f   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_r5f.bld
       #CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5_sysbios.lds   
    
   ifeq ($(CORE), mcu1_0)
   SRCS_ASM_COMMON += ipcCopyVecs2Exc.asm 
   CONFIG_BLD_LNK_r5f = /home/ketaki/Desktop/SBL_boot/linker_files/linker_r5f_mcu1_0_btcm_sysbios.lds
   endif 
    ifeq ($(CORE), mcu2_0)
    CONFIG_BLD_LNK_r5f = /home/ketaki/Desktop/SBL_boot/linker_files/linker_r5f_mcu2_0_btcm_sysbios.lds
   endif
    ifeq ($(CORE), mcu2_1)
    CONFIG_BLD_LNK_r5f = /home/ketaki/Desktop/SBL_boot/linker_files/linker_r5f_mcu2_1_btcm_sysbios.lds
   endif	
   endif
  endif

  ifeq ($(SOC),$(filter $(SOC), am65xx am64x))
    ifeq ($(CONFIG_BLD_XDC_a53),)
        CONFIG_BLD_XDC_a53   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_a53.bld
        CONFIG_BLD_LNK_a53   = $(pdk_PATH)/ti/build/$(SOC)/linker_a53.lds
    endif
  endif

  ifeq ($(SOC),$(filter $(SOC), j721e am77x j7200))
    ifeq ($(CONFIG_BLD_XDC_a72),)
        CONFIG_BLD_XDC_a72   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_a72.bld
        CONFIG_BLD_LNK_a72   = $(pdk_PATH)/ti/build/$(SOC)/linker_a72_mpu1_0.lds
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_XDC_c66   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_c66.bld
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66.cmd
    endif
    ifeq ($(CONFIG_BLD_XDC_c7x),)
        CONFIG_BLD_XDC_c7x   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_c7x.bld
        CONFIG_BLD_LNK_c7x   = $(pdk_PATH)/ti/build/$(SOC)/linker_c7x.lds
    endif
  endif

  XDCROOT = $(xdc_PATH)
  XDCTOOLS = $(xdc_PATH)
  BIOSROOT = $(bios_PATH)
  export XDCROOT
  export XDCTOOLS
  export BIOSROOT
endif

CGTOOLS = $(TOOLCHAIN_PATH_M4)
export CGTOOLS

CGTOOLS_DSP = $(CODEGEN_PATH_C674)
export CGTOOLS_DSP

CGTOOLS_A8 = $(TOOLCHAIN_PATH_A8)
export CGTOOLS_A8

CGTOOLS_A9 = $(TOOLCHAIN_PATH_A9)
export CGTOOLS_A9

CGTOOLS_ARM9 = $(TOOLCHAIN_PATH_Arm9)
export CGTOOLS_ARM9

CGTOOLS_A15 = $(TOOLCHAIN_PATH_A15)
export CGTOOLS_A15

CGTOOLS_EVE = $(TOOLCHAIN_PATH_EVE)
export CGTOOLS_EVE

export CGTOOLS_A53 = $(TOOLCHAIN_PATH_A53)
export CGTOOLS_A72 = $(TOOLCHAIN_PATH_A72)

STRIP470 = $(TOOLCHAIN_PATH_M4)/bin/strip470 -p
STRIP6x = $(CODEGEN_PATH_C674)/bin/strip6x -p
STRIP_ALL_ARM = $(CODEGEN_PREFIX)strip -s
STRIP_DEBUG_ARM = $(CODEGEN_PREFIX)strip --strip-debug

# Nothing beyond this point

/* =============================================================================
 *   Copyright (c) Texas Instruments Incorporated 2020
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
var Defaults = xdc.useModule('xdc.runtime.Defaults');
var Diags = xdc.useModule('xdc.runtime.Diags');
var Error = xdc.useModule('xdc.runtime.Error');
var Log = xdc.useModule('xdc.runtime.Log');
var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
var Main = xdc.useModule('xdc.runtime.Main');
var Memory = xdc.useModule('xdc.runtime.Memory')
var System = xdc.useModule('xdc.runtime.System');
var Text = xdc.useModule('xdc.runtime.Text');
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
var Task = xdc.useModule('ti.sysbios.knl.Task');
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
var GateSwi = xdc.useModule('ti.sysbios.gates.GateSwi');

var BIOS = xdc.useModule('ti.sysbios.BIOS');
var Hwi = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Hwi');
var Core = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Core');
var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var SysMin = xdc.useModule('xdc.runtime.SysMin');
/* System stack size (used by ISRs and Swis) */
Program.stack = 0x2000;
var Task = xdc.useModule('ti.sysbios.knl.Task');
Task.defaultStackSize = 0x4000;
Task.common$.namedInstance = true;
Task.common$.namedModule = true;

/* Enable cache */
var Cache = xdc.useModule('ti.sysbios.family.arm.v7r.Cache');
Cache.enableCache = true;

/*
 * Direct CIO to UART
 */
/* System.SupportProxy = SysUart; */
System.SupportProxy = SysMin;
System.extendedFormats += "%f";
/*
 * Program.argSize sets the size of the .args section.
 * The examples don't use command line args so argSize is set to 0.
 */
Program.argSize = 0x0;

/*
 * Uncomment this line to globally disable Asserts.
 * All modules inherit the default from the 'Defaults' module.  You
 * can override these defaults on a per-module basis using Module.common$.
 * Disabling Asserts will save code space and improve runtime performance.
Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;
 */

/*
 * Uncomment this line to keep module names from being loaded on the target.
 * The module name strings are placed in the .const section. Setting this
 * parameter to false will save space in the .const section.  Error and
 * Assert messages will contain an "unknown module" prefix instead
 * of the actual module name.
Defaults.common$.namedModule = false;
 */

/* Create default heap and hook it into Memory */
var heapMemParams = new HeapMem.Params;
heapMemParams.size = 16384*4;
var heap0 = HeapMem.create(heapMemParams);

Memory.defaultHeapInstance = heap0;

/*
 * Minimize exit handler array in System.  The System module includes
 * an array of functions that are registered with System_atexit() to be
 * called by System_exit().
 */
System.maxAtexitHandlers = 4;

/*
 * Uncomment this line to disable the Error print function.
 * We lose error information when this is disabled since the errors are
 * not printed.  Disabling the raiseHook will save some code space if
 * your app is not using System_printf() since the Error_print() function
 * calls System_printf().
Error.raiseHook = null;
 */

/*
 * Uncomment this line to keep Error, Assert, and Log strings from being
 * loaded on the target.  These strings are placed in the .const section.
 * Setting this parameter to false will save space in the .const section.
 * Error, Assert and Log message will print raw ids and args instead of
 * a formatted message.
Text.isLoaded = false;
 */

/*
 * Uncomment this line to disable the output of characters by SysMin
 * when the program exits.  SysMin writes characters to a circular buffer.
 * This buffer can be viewed using the SysMin Output view in ROV.
SysMin.flushAtExit = false;
 */

/*
 * Create and install logger for the whole system
 */
var loggerBufParams = new LoggerBuf.Params();
loggerBufParams.numEntries = 32;
var logger0 = LoggerBuf.create(loggerBufParams);
Defaults.common$.logger = logger0;
Main.common$.diags_INFO = Diags.ALWAYS_ON;

BIOS.libType = BIOS.LibType_Custom;
BIOS.cpuFreq.lo = 1000000000;
BIOS.cpuFreq.hi = 0;

var coreId = java.lang.System.getenv("CORE");

var DMTimer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
DMTimer.checkFrequency = false;
for (var i=0; i < DMTimer.numTimerDevices; i++) {
    DMTimer.intFreqs[i].lo = 19200000;
    DMTimer.intFreqs[i].hi = 0;
}

if(coreId=="mcu1_0")
{
    Core.id = 0;
    /* DM timer cfg */
    Clock.timerId = 1;
}
if(coreId=="mcu1_1")
{
    Core.id = 1;
    /* DM timer cfg */
    Clock.timerId = 2;
}
if(coreId=="mcu2_0")
{
    Core.id = 0;
    Clock.timerId = 0;
    /* DMTimer #12 - in general, address is 0x024x0000 where x is timer # */
    DMTimer.timerSettings[0].baseAddr = 0x024c0000;
    DMTimer.timerSettings[0].intNum = 168;
}
if(coreId=="mcu2_1")
{
    Core.id = 1;
    Clock.timerId = 1;
    /* DMTimer #13 - in general, address is 0x024x0000 where x is timer # */
    DMTimer.timerSettings[1].baseAddr = 0x024d0000;
    DMTimer.timerSettings[1].intNum = 169;
}
if(coreId=="mcu3_0")
{
    Core.id = 0;
    Clock.timerId = 2;
    /* DMTimer #14 - in general, address is 0x024x0000 where x is timer # */
    DMTimer.timerSettings[2].baseAddr = 0x024e0000;
    DMTimer.timerSettings[2].intNum = 170;
}
if(coreId=="mcu3_1")
{
    Core.id = 1;
    Clock.timerId = 3;
    /* DMTimer #15 - in general, address is 0x024x0000 where x is timer # */
    DMTimer.timerSettings[3].baseAddr = 0x024f0000;
    DMTimer.timerSettings[3].intNum = 171;
}

/* Set base address of Vector Interrupt Manager */
if((coreId=="mcu2_0") || (coreId=="mcu2_1") || (coreId=="mcu3_0") || (coreId=="mcu3_1"))
{
    var Hwi = xdc.useModule('ti.sysbios.family.arm.v7r.keystone3.Hwi');
    Hwi.vimBaseAddress = 0x0ff80000;
}

/* Sysbios supports workaround for Silicon issue https://jira.itg.ti.com/browse/K3_OPEN_SI-148
 * Details of silicon issue : https://confluence.itg.ti.com/display/PROCIPDEV/%2310+The+same+interrupt+cannot+be+nested+back-2-back+within+another+interrupt
 * Sysbios Requirement Details: https://jira.itg.ti.com/browse/SYSBIOS-1419
 * Workaround requires use of a resevred dummyIRQ.
 * Using DummyIRQ#383 as per cslr_intr_mss.h it is a reserved interrupt not connected to any
 * peripheral interrupt sources
 */
if((coreId=="mcu1_0") || (coreId=="mcu1_1"))
{
    Hwi.dummyIRQ                   = 383;
}
if((coreId=="mcu2_0") || (coreId=="mcu2_1") || (coreId=="mcu3_0") || (coreId=="mcu3_1"))
{
    Hwi.dummyIRQ                   = 511;
}

var Reset = xdc.useModule("xdc.runtime.Reset");
Reset.fxns[Reset.fxns.length++] = "&ipcCopyVecs2Exc";

/*
 * Initialize MPU and enable it
 *
 * Note: MPU must be enabled and properly configured for caching to work.
 */
xdc.loadCapsule("r5_mpu_ipc.xs");

/* Check if application needs to update with custom configuration options */
/* Caution: This should be at the end of this file after all other common cfg */
var cfgUpdate = java.lang.System.getenv("XDC_CFG_UPDATE")
if ((cfgUpdate != '')&&(cfgUpdate != null))
{
    xdc.print("Loading configuration update " + cfgUpdate);
    xdc.loadCapsule(cfgUpdate);
}

# Makefile for UART unit test app
include $(PDK_INSTALL_PATH)/ti/build/Rules.make


ifeq ($(IS_BAREMETAL),yes)
BUILD_OS_TYPE = baremetal
CFLAGS_OS_DEFINES =
LNKFLAGS_LOCAL_mpu1_0  += --entry Entry
COMP_LIST_COMMON  = $(PDK_COMMON_BAREMETAL_COMP) 
EXTERNAL_INTERFACES =
XDC_CFG_FILE_mpu1_0 =
XDC_CFG_FILE_mcu1_0 =
else
BUILD_OS_TYPE = tirtos
CFLAGS_OS_DEFINES = -DUSE_BIOS
EXTERNAL_INTERFACES = bios xdc
COMP_LIST_COMMON  = $(PDK_COMMON_TIRTOS_COMP) 

ifeq ($(SOC),$(filter $(SOC), j721e j7200 am65xx am64x tpr12 awr294x))
  XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/$(SOC)/sysbios_$(ISA).cfg
else
  XDC_CFG_FILE_mpu1_0 = ./$(SOC)/uartUnitTest_$(ISA).cfg
  #XDC_CFG_FILE_mcu1_0 = ./$(SOC)/uartUnitTest_r5.cfg
  XDC_CFG_FILE_mcu1_0 = $(PDK_INSTALL_PATH)/ti/build/$(SOC)/sysbios_$(ISA)_btcm.cfg 
endif

ifeq ($(SOC),$(filter $(SOC), am64x))
ifeq ($(ISA),$(filter $(ISA), a53))
  LIB_PATHS_DIR=$(BIOS_INSTALL_PATH)/packages/gnu/targets/arm/libs/install-native/aarch64-none-elf/lib/
endif
endif

endif

SRCDIR = . src
INCDIR = . src
# Common source files across all platforms and cores
SRCS_COMMON += main_uart_test.c

# List all the external components/interfaces, whose interface header files
# need to be included for this component
INCLUDE_EXTERNAL_INTERFACES = pdk $(EXTERNAL_INTERFACES)


ifeq ($(BUILD_OS_TYPE), tirtos)
UART_OS_TYPE=
else
UART_OS_TYPE=_Baremetal
endif

# DMA enabled build
ifeq ($(DMA), enable)
    ifeq ($(SMP), enable)
        #Name of the directory created under packages/ti/binary/
        APP_NAME = UART$(UART_OS_TYPE)_DMA_SMP_TestApp
        # Name of the binary if different from the default (APP_NAME)_$(BOARD_$(CORE)_<build_profile>
        LOCAL_APP_NAME =  UART$(UART_OS_TYPE)_DMA_$(BOARD)_$(CORE)_SMP_TestApp
	else
        #Name of the directory created under packages/ti/binary/
        APP_NAME = UART$(UART_OS_TYPE)_DMA_TestApp
        # Name of the binary if different from the default (APP_NAME)_$(BOARD_$(CORE)_<build_profile>
        LOCAL_APP_NAME =  UART$(UART_OS_TYPE)_DMA_$(BOARD)_$(CORE)TestApp
    endif
    COMP_LIST_COMMON := $(filter-out uart,$(COMP_LIST_COMMON))
    COMP_LIST_COMMON   += uart_dma 
    #COMP_LIST_COMMON   += uart_dma_profile 
    CFLAGS_UART_DMA    = -DUART_DMA_ENABLE
else
    ifeq ($(SMP), enable)
        #Name of the directory created under packages/ti/binary/
        APP_NAME = UART$(UART_OS_TYPE)_SMP_TestApp
        # Name of the binary if different from the default (APP_NAME)_$(BOARD_$(CORE)_<build_profile>
        LOCAL_APP_NAME =  UART$(UART_OS_TYPE)_$(BOARD)_$(CORE)_SMP_TestApp
    else
        #Name of the directory created under packages/ti/binary/
        APP_NAME = UART$(UART_OS_TYPE)_TestApp
        # Name of the binary if different from the default (APP_NAME)_$(BOARD_$(CORE)_<build_profile>
        LOCAL_APP_NAME =  UART$(UART_OS_TYPE)_$(BOARD)_$(CORE)TestApp
    endif

    #COMP_LIST_COMMON   += uart_profile
    CFLAGS_UART_DMA    =
endif
# List all the specific components required by the application
#COMP_LIST_COMMON  += profiling

PACKAGE_SRCS_COMMON = .

ifeq ($(SOC),$(filter $(SOC), am64x))
ifeq ($(CORE),$(filter $(CORE), m4f_0))
CONFIG_BLD_LNK_m4f = am64x/uart_linker_m4f.lds
PACKAGE_SRCS_COMMON += $(SOC)
endif
endif

CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(CFLAGS_UART_DMA) $(CFLAGS_OS_DEFINES)

# Include common make files
ifeq ($(MAKERULEDIR), )
#Makerule path not defined, define this and assume relative path from ROOTDIR
  MAKERULEDIR := $(ROOTDIR)/ti/build/makerules
  export MAKERULEDIR
endif
include $(MAKERULEDIR)/common.mk

# OBJs and libraries are built by using rule defined in rules_<target>.mk
#     and need not be explicitly specified here

# Nothing beyond this point

-include Rules.make

MAKE_JOBS ?= 1

all: linux arm-benchmarks am-sysinfo oprofile-example linux-dtbs cryptodev sysfw-image jailhouse ti-img-rogue-driver oob-demo u-boot-spl-j7 ti-img-encode-decode 
clean: linux_clean arm-benchmarks_clean am-sysinfo_clean oprofile-example_clean linux-dtbs_clean cryptodev_clean sysfw-image_clean jailhouse_clean ti-img-rogue-driver_clean oob-demo_clean u-boot-spl-j7_clean ti-img-encode-decode_clean 
install: linux_install arm-benchmarks_install am-sysinfo_install oprofile-example_install linux-dtbs_install cryptodev_install sysfw-image_install jailhouse_install ti-img-rogue-driver_install oob-demo_install u-boot-spl-j7_install ti-img-encode-decode_install 
# Kernel build targets
linux: linux-dtbs
	@echo =================================
	@echo     Building the Linux Kernel
	@echo =================================
	$(MAKE) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) $(DEFCONFIG)
	$(MAKE) -j $(MAKE_JOBS) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE)  Image
	$(MAKE) -j $(MAKE_JOBS) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) modules

linux_install: linux-dtbs_install
	@echo ===================================
	@echo     Installing the Linux Kernel
	@echo ===================================
	@if [ ! -d $(DESTDIR) ] ; then \
		echo "The extracted target filesystem directory doesn't exist."; \
		echo "Please run setup.sh in the SDK's root directory and then try again."; \
		exit 1; \
	fi
	install -d $(DESTDIR)/boot
	install $(LINUXKERNEL_INSTALL_DIR)/arch/arm64/boot/Image $(DESTDIR)/boot
	install $(LINUXKERNEL_INSTALL_DIR)/vmlinux $(DESTDIR)/boot
	install $(LINUXKERNEL_INSTALL_DIR)/System.map $(DESTDIR)/boot
	$(MAKE) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) INSTALL_MOD_PATH=$(DESTDIR) INSTALL_MOD_STRIP=$(INSTALL_MOD_STRIP) modules_install

linux_clean:
	@echo =================================
	@echo     Cleaning the Linux Kernel
	@echo =================================
	$(MAKE) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) mrproper
# arm-benchmarks build targets
arm-benchmarks:
	@echo =============================
	@echo    Building ARM Benchmarks
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*arm-benchmarks*"`; make CC="$(CC)"

arm-benchmarks_clean:
	@echo =============================
	@echo    Cleaning ARM Benchmarks
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*arm-benchmarks*"`; make clean

arm-benchmarks_install:
	@echo ==============================================
	@echo   Installing ARM Benchmarks - Release version
	@echo ==============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*arm-benchmarks*"`; make install

arm-benchmarks_install_debug:
	@echo ============================================
	@echo   Installing ARM Benchmarks - Debug Version
	@echo ============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*arm-benchmarks*"`; make install_debug
# am-sysinfo build targets
am-sysinfo:
	@echo =============================
	@echo    Building AM Sysinfo
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*am-sysinfo*"`; make CC="$(CC)"

am-sysinfo_clean:
	@echo =============================
	@echo    Cleaning AM Sysinfo
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*am-sysinfo*"`; make clean

am-sysinfo_install:
	@echo ===============================================
	@echo     Installing AM Sysinfo - Release version
	@echo ===============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*am-sysinfo*"`; make install

am-sysinfo_install_debug:
	@echo =============================================
	@echo     Installing AM Sysinfo - Debug version
	@echo =============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*am-sysinfo*"`; make install_debug
# oprofile-example build targets
oprofile-example:
	@echo =============================
	@echo    Building OProfile Example
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*oprofile-example*"`; make CC="$(CC)"

oprofile-example_clean:
	@echo =============================
	@echo    Cleaning OProfile Example
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*oprofile-example*"`; make clean

oprofile-example_install:
	@echo =============================================
	@echo     Installing OProfile Example - Debug version
	@echo =============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*oprofile-example*"`; make install
# Kernel DTB build targets
linux-dtbs:
	@echo =====================================
	@echo     Building the Linux Kernel DTBs
	@echo =====================================
	$(MAKE) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) $(DEFCONFIG)
	@for DTB in      ti/k3-j721e-common-proc-board.dtb     ti/k3-j721e-proc-board-tps65917.dtb     ti/k3-j721e-common-proc-board-infotainment.dtbo     ti/k3-j721e-pcie-backplane.dtbo     ti/k3-j721e-common-proc-board-jailhouse.dtbo  	ti/k3-j721e-vision-apps.dtbo 	ti/k3-j721e-pcie-backplane.dtbo ; do \
		$(MAKE) -j $(MAKE_JOBS) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) $$DTB; \
	done

linux-dtbs_install:
	@echo =======================================
	@echo     Installing the Linux Kernel DTBs
	@echo =======================================
	@if [ ! -d $(DESTDIR) ] ; then \
		echo "The extracted target filesystem directory doesn't exist."; \
		echo "Please run setup.sh in the SDK's root directory and then try again."; \
		exit 1; \
	fi
	install -d $(DESTDIR)/boot
	@for DTB in      ti/k3-j721e-common-proc-board.dtb     ti/k3-j721e-proc-board-tps65917.dtb     ti/k3-j721e-common-proc-board-infotainment.dtbo     ti/k3-j721e-pcie-backplane.dtbo     ti/k3-j721e-common-proc-board-jailhouse.dtbo  	ti/k3-j721e-vision-apps.dtbo 	ti/k3-j721e-pcie-backplane.dtbo ; do \
		install -m 0644 $(LINUXKERNEL_INSTALL_DIR)/arch/arm64/boot/dts/$$DTB $(DESTDIR)/boot/; \
	done

linux-dtbs_clean:
	@echo =======================================
	@echo     Cleaning the Linux Kernel DTBs
	@echo =======================================
	@echo "Nothing to do"

cryptodev: linux
	@echo ================================
	@echo      Building cryptodev-linux
	@echo ================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "cryptodev*"`; \
	make ARCH=arm64 KERNEL_DIR=$(LINUXKERNEL_INSTALL_DIR)

cryptodev_clean:
	@echo ================================
	@echo      Cleaning cryptodev-linux
	@echo ================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "cryptodev*"`; \
	make ARCH=arm64 KERNEL_DIR=$(LINUXKERNEL_INSTALL_DIR) clean

cryptodev_install:
	@echo ================================
	@echo      Installing cryptodev-linux
	@echo ================================
	@if [ ! -d $(DESTDIR) ] ; then \
		echo "The extracted target filesystem directory doesn't exist."; \
		echo "Please run setup.sh in the SDK's root directory and then try again."; \
		exit 1; \
	fi
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "cryptodev*"`; \
	make ARCH=arm64  KERNEL_DIR=$(LINUXKERNEL_INSTALL_DIR)  INSTALL_MOD_PATH=$(DESTDIR) PREFIX=$(SDK_PATH_TARGET) INSTALL_MOD_STRIP=$(INSTALL_MOD_STRIP) install
# Define the following to support multple platforms
PLATFORM_TYPE_$(PLATFORM) = gp
PLATFORM_TYPE_am65xx-hs-evm = hs
PLATFORM_TYPE_j7-hs-evm = hs
PLATFORM_TYPE = $(PLATFORM_TYPE_$(PLATFORM))

SYSFW_CONFIG = evm

SYSFW_SOC_$(PLATFORM) = NULL
SYSFW_SOC_am65xx-evm = am65x
SYSFW_SOC_am65xx-hs-evm = am65x
SYSFW_SOC_j7-evm = j721e
SYSFW_SOC_j7-hs-evm = j721e
SYSFW_SOC_j7200-evm = j7200
SYSFW_SOC = $(SYSFW_SOC_$(PLATFORM))

SYSFW_PREFIX_$(PLATFORM) = NULL
SYSFW_PREFIX_am65xx-evm = ti-sci-firmware
SYSFW_PREFIX_am65xx-hs-evm = ti-sci-firmware
SYSFW_PREFIX_j7-evm = ti-fs-firmware
SYSFW_PREFIX_j7-hs-evm = ti-fs-firmware
SYSFW_PREFIX_j7200-evm = ti-fs-firmware
SYSFW_PREFIX = $(SYSFW_PREFIX_$(PLATFORM))

ifeq ($(SYSFW_SOC),j7200)
	SYSFW_BASE = tiboot3
else
	SYSFW_BASE = $(SYSFW_PREFIX)-$(SYSFW_SOC)-$(PLATFORM_TYPE)
endif

SYSFW_MAKEARGS_common = SYSFW_DL_URL="" SYSFW_HS_DL_URL="" SYSFW_HS_INNER_CERT_DL_URL="" \
                        SYSFW_PATH=$(TI_SDK_PATH)/board-support/prebuilt-images/$(SYSFW_BASE).bin \
                        SOC=$(SYSFW_SOC) CONFIG=$(SYSFW_CONFIG)

SYSFW_MAKEARGS_gp = 
SYSFW_MAKEARGS_hs = HS=1 SYSFW_HS_PATH=$(TI_SDK_PATH)/board-support/prebuilt-images/$(SYSFW_BASE)-enc.bin \
                    SYSFW_HS_INNER_CERT_PATH=$(TI_SDK_PATH)/board-support/prebuilt-images/$(SYSFW_BASE)-cert.bin

SYSFW_MAKEARGS = $(SYSFW_MAKEARGS_common) $(SYSFW_MAKEARGS_$(PLATFORM_TYPE))

# Depend on linux-dtbs for the dtc utility
sysfw-image: linux-dtbs
	@echo =============================
	@echo    Building SYSFW Image
	@echo =============================
	@cd board-support; cd `find . -maxdepth 1 -type d -name "*k3-image*"`; \
		make $(SYSFW_MAKEARGS) CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) PATH=$(PATH):$(LINUXKERNEL_INSTALL_DIR)/scripts/dtc SOC=$(SYSFW_SOC)

sysfw-image_clean:
	@echo =============================
	@echo    Cleaning SYSFW Image
	@echo =============================
	@cd board-support; cd `find . -maxdepth 1 -type d -name "*k3-image*"`; make clean SOC=$(SYSFW_SOC)

sysfw-image_install:
	@echo =============================
	@echo   Installing SYSFW Image
	@echo =============================
	@echo "Nothing to do"
# jailhouse module
JH_ARCH = "arm64"
JH_PLATFORM = "k3"

jailhouse_config:
	@echo =====================================
	@echo      Configuring jailhouse
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	echo "#define CONFIG_TRACE_ERROR    1" >> include/jailhouse/config.h

jailhouse: linux jailhouse_config
	@echo =====================================
	@echo      Building jailhouse
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	make ARCH=$(JH_ARCH) KDIR=${LINUXKERNEL_INSTALL_DIR}

jailhouse_clean:
	@echo =====================================
	@echo      Cleaning jailhouse
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	make ARCH=$(JH_ARCH) KDIR=${LINUXKERNEL_INSTALL_DIR} clean

jailhouse_distclean: jailhouse_clean
	@echo =====================================
	@echo      Distclean jailhouse
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	rm -vf ./hypervisor/include/jailhouse/config.h

jailhouse_install:
	@echo ================================
	@echo      Installing jailhouse
	@echo ================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	make ARCH=$(JH_ARCH) KDIR=${LINUXKERNEL_INSTALL_DIR} DESTDIR=$(DESTDIR) INSTALL_MOD_STRIP=$(INSTALL_MOD_STRIP) prefix=/usr install


# ti-img-rogue-driver
ti-img-rogue-driver: linux
	@echo =====================================
	@echo     Building ti-img-rogue-driver
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-rogue-driver*" -type d`; \
	make ARCH=arm64 KERNELDIR=${LINUXKERNEL_INSTALL_DIR} RGX_BVNC="22.104.208.318" BUILD=release PVR_BUILD_DIR=j721e_linux WINDOW_SYSTEM=wayland

ti-img-rogue-driver_clean:
	@echo ====================================
	@echo     Cleaning ti-img-rogue-driver
	@echo ====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-rogue-driver*" -type d`; \
	make ARCH=arm64 KERNELDIR=${LINUXKERNEL_INSTALL_DIR} RGX_BVNC="22.104.208.318" BUILD=release PVR_BUILD_DIR=j721e_linux WINDOW_SYSTEM=wayland clean

ti-img-rogue-driver_install:
	@echo ====================================
	@echo     Installing ti-img-rogue-driver
	@echo ====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-rogue-driver*" -type d`; \
	cd binary_j721e_linux_wayland_release/target_aarch64/kbuild; \
	make -C ${LINUXKERNEL_INSTALL_DIR} INSTALL_MOD_PATH=${DESTDIR} INSTALL_MOD_STRIP=${INSTALL_MOD_STRIP} M=`pwd` modules_install

oob-demo:


oob-demo_clean:


oob-demo_install:
	@echo =============================
	@echo Updating oob-demo wallpaper
	@echo =============================
	sed -i 's%background-image.*%background-image=/usr/share/demo/j7-evm-p0-wallpaper.jpg%' $(DESTDIR)/etc/weston.ini


# u-boot build targets
u-boot-spl-j7: u-boot
u-boot-spl-j7_clean: u-boot_clean
u-boot-spl-j7_install: u-boot_install

UBOOT_SYSFW=$(TI_SDK_PATH)/board-support/prebuilt-images/sysfw.bin

ifeq ($(PLATFORM),j7-evm)
	UBOOT_A72_BUILD_DIR=$(TI_SDK_PATH)/board-support/u-boot_build/a72
	UBOOT_R5_BUILD_DIR=$(TI_SDK_PATH)/board-support/u-boot_build/r5
	UBOOT_ATF=$(TI_SDK_PATH)/board-support/prebuilt-images/bl31.bin
	UBOOT_TEE=$(TI_SDK_PATH)/board-support/prebuilt-images/bl32.bin
	#UBOOT_DM=$(TI_SDK_PATH)/board-support/prebuilt-images/ipc_echo_testb_mcu1_0_release_strip.xer5f
	#UBOOT_DM=/home/ketaki/Downloads/UART_j721e_evm_mcu1_0TestApp_release_strip.xer5f
        UBOOT_DM=/home/ketaki/ti-processor-sdk-rtos-j721e-evm-07_03_00_07/pdk_jacinto_07_03_00_29/packages/ti/binary/UART_TestApp/bin/j721e_evm/UART_j721e_evm_mcu1_0TestApp_release_strip.xer5f
else
	UBOOT_A72_BUILD_DIR=$(TI_SDK_PATH)/board-support/u-boot_hs_build/a72
	UBOOT_R5_BUILD_DIR=$(TI_SDK_PATH)/board-support/u-boot_hs_build/r5
	UBOOT_ATF=$(TI_SDK_PATH)/board-support/prebuilt-images/bl31.bin.signed
	UBOOT_TEE=$(TI_SDK_PATH)/board-support/prebuilt-images/bl32.bin.signed
	UBOOT_DM=$(TI_SDK_PATH)/board-support/prebuilt-images/ipc_echo_testb_mcu1_0_release_strip.xer5f.signed
endif

u-boot: u-boot-a72 u-boot-r5
u-boot_clean: u-boot-a72_clean u-boot-r5_clean

u-boot-a72:
	@echo ===================================
	@echo    Building U-boot for A72
	@echo ===================================
	$(MAKE) -j $(MAKE_JOBS) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE) \
		 $(UBOOT_MACHINE) O=$(UBOOT_A72_BUILD_DIR)
	$(MAKE) -j $(MAKE_JOBS) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE) \
		CONFIG_MKIMAGE_DTC_PATH=$(UBOOT_A72_BUILD_DIR)/scripts/dtc/dtc \
		ATF=$(UBOOT_ATF) TEE=$(UBOOT_TEE) DM=$(UBOOT_DM) \
		O=$(UBOOT_A72_BUILD_DIR)

u-boot-a72_clean:
	@echo ===================================
	@echo    Cleaining U-boot for A72
	@echo ===================================
	$(MAKE) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE) \
		O=$(UBOOT_A72_BUILD_DIR) distclean
	@rm -rf $(UBOOT_A72_BUILD_DIR)


u-boot-r5:
	@echo ===================================
	@echo    Building U-boot for R5
	@echo ===================================
	$(MAKE) -j $(MAKE_JOBS) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) \
		 $(UBOOT_MACHINE_R5) O=$(UBOOT_R5_BUILD_DIR)
	$(MAKE) -j $(MAKE_JOBS) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) \
		O=$(UBOOT_R5_BUILD_DIR)

u-boot-r5_clean:
	@echo ===================================
	@echo    Cleaining U-boot for R5
	@echo ===================================
	$(MAKE) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) \
		O=$(UBOOT_R5_BUILD_DIR) distclean
	@rm -rf $(UBOOT_R5_BUILD_DIR)

u-boot_install:
	@echo ===================================
	@echo    Installing U-boot
	@echo ===================================
	@echo "Nothing to do"


# ti-img-encode-decode
ti-img-encode-decode: linux
	@echo =====================================
	@echo     Building ti-img-encode-decode
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-encode-decode*" -type d`; \
	cd linux/decoder; \
	make ARCH=arm64 KPATH=${LINUXKERNEL_INSTALL_DIR} all; \
	cd ../encoder; \
	make ARCH=arm64 KPATH=${LINUXKERNEL_INSTALL_DIR} all

ti-img-encode-decode_clean:
	@echo ====================================
	@echo     Cleaning ti-img-encode-decode
	@echo ====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-encode-decode*" -type d`; \
	cd linux/decoder; \
	make ARCH=arm64 KPATH=${LINUXKERNEL_INSTALL_DIR} clean; \
	cd ../encoder; \
	make ARCH=arm64 KPATH=${LINUXKERNEL_INSTALL_DIR} clean

ti-img-encode-decode_install:
	@echo ====================================
	@echo     Installing ti-img-encode-decode
	@echo ====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-encode-decode*" -type d`; \
	cd linux/decoder; \
	make -C ${LINUXKERNEL_INSTALL_DIR} INSTALL_MOD_PATH=${DESTDIR} INSTALL_MOD_STRIP=${INSTALL_MOD_STRIP} M=`pwd` modules_install; \
	cd ../encoder; \
	make -C ${LINUXKERNEL_INSTALL_DIR} INSTALL_MOD_PATH=${DESTDIR} INSTALL_MOD_STRIP=${INSTALL_MOD_STRIP} M=`pwd` modules_install

;
;  Copyright (c) 2020, Texas Instruments Incorporated
;  All rights reserved.
; 
;  Redistribution and use in source and binary forms, with or without
;  modification, are permitted provided that the following conditions
;  are met:
; 
;  *  Redistributions of source code must retain the above copyright
;     notice, this list of conditions and the following disclaimer.
; 
;  *  Redistributions in binary form must reproduce the above copyright
;     notice, this list of conditions and the following disclaimer in the
;     documentation and/or other materials provided with the distribution.
; 
;  *  Neither the name of Texas Instruments Incorporated nor the names of
;     its contributors may be used to endorse or promote products derived
;     from this software without specific prior written permission.
; 
;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
;  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
;  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
;  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
;  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
;  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
;  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
;  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
;  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
;
; ======== ipcCopyVecs2Exc.asm ========
; Copies sysbios defined vector to Exception Handler area
;
    .text
    .sect   ".ipcCopyVecsToExc"
;==============================================================================
;   void ipcCopyVecs2Exc( void )
;==============================================================================
    .global ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors

    .global ipcCopyVecs2Exc
ipcCopyVecs2Exc:
        .asmfunc
        movw    r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
        movt    r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
        mov     r1, #0                  ; Exeception Handler address
        mov	r2, #64			; 64 bytes
loop:
        ldr	r3, [r0], #4
        str     r3, [r1], #4
        subs    r2, r2, #4
        bgt     loop
exit:
        bx      lr
        .endasmfunc

        .end

;
;  Copyright (c) 2020, Texas Instruments Incorporated
;  All rights reserved.
; 
;  Redistribution and use in source and binary forms, with or without
;  modification, are permitted provided that the following conditions
;  are met:
; 
;  *  Redistributions of source code must retain the above copyright
;     notice, this list of conditions and the following disclaimer.
; 
;  *  Redistributions in binary form must reproduce the above copyright
;     notice, this list of conditions and the following disclaimer in the
;     documentation and/or other materials provided with the distribution.
; 
;  *  Neither the name of Texas Instruments Incorporated nor the names of
;     its contributors may be used to endorse or promote products derived
;     from this software without specific prior written permission.
; 
;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
;  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
;  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
;  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
;  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
;  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
;  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
;  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
;  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
;
; ======== utilsCopyVecs2ATcm.asm ========
; Copies sysbios defined vector to ATM area
;
    .text
    .sect   ".utilsCopyVecsToAtcm"
;==============================================================================
;   void utilsCopyVecs2ATcm( void )
;==============================================================================
    .global ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors

    .global utilsCopyVecs2ATcm
utilsCopyVecs2ATcm:
        .asmfunc
;        mrc     p15, #0, r0, c9, c1, #1 ; read ATCM Region Register
;        tst     r0, #1
;        beq     exit                    ; do nothing if ATCM disabled

        movw    r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
        movt    r0, ti_sysbios_family_arm_v7r_keystone3_Hwi_vectors
        mov     r1, #0                  ; ATCM address
        mov	r2, #64			; 256 bytes
loop:
        ldr	r3, [r0], #4
        str     r3, [r1], #4
        subs    r2, r2, #4
        bgt     loop
exit:
        bx      lr
        .endasmfunc

        .end

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
 */

/dts-v1/;

#include "k3-j721e-som-p0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/sound/ti-mcasp.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
	};

	gpio_keys: gpio-keys {
		compatible = "gpio-keys";
		autorepeat;
		pinctrl-names = "default";
		pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>;

		sw10: sw10 {
			label = "GPIO Key USER1";
			linux,code = <BTN_0>;
			gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>;
		};

		sw11: sw11 {
			label = "GPIO Key USER2";
			linux,code = <BTN_1>;
			gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
		};
	};

	evm_12v0: fixedregulator-evm12v0 {
		/* main supply */
		compatible = "regulator-fixed";
		regulator-name = "evm_12v0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_3v3: fixedregulator-vsys3v3 {
		/* Output of LMS140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	vsys_5v0: fixedregulator-vsys5v0 {
		/* Output of LM5140 */
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&evm_12v0>;
		regulator-always-on;
		regulator-boot-on;
	};

	/* Used for 48KHz family */
	pll4: pll4_fixed {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <1179648000>;
	};

	/* Used for 44.1KHz family */
	pll15: pll15_fixed {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <1083801600>;
	};

	sound0: sound@0 {
		compatible = "ti,j721e-cpb-audio";
		ti,model = "j721e-cpb-analog";

		ti,cpb-mcasp = <&mcasp10>;
		ti,cpb-codec = <&pcm3168a_1>;

		clocks = <&pll4>, <&pll15>,
			 <&k3_clks 184 1>,
			 <&k3_clks 184 2>, <&k3_clks 184 4>,
			 <&k3_clks 157 371>,
			 <&k3_clks 157 400>, <&k3_clks 157 401>;
		clock-names = "pll4", "pll15",
			      "cpb-mcasp",
			      "cpb-mcasp-48000", "cpb-mcasp-44100",
			      "audio-refclk2",
			      "audio-refclk2-48000", "audio-refclk2-44100";
	};

	vdd_mmc1: fixedregulator-sd {
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		vin-supply = <&vsys_3v3>;
		gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
	};

	vdd_sd_dv_alt: gpio-regulator-TLV71033 {
		compatible = "regulator-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&vdd_sd_dv_alt_pins_default>;
		regulator-name = "tlv71033";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		vin-supply = <&vsys_5v0>;
		gpios = <&main_gpio0 117 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x0
			  3300000 0x1>;
	};

	cpsw9g_virt_mac: main_r5fss_cpsw9g_virt_mac0 {
		compatible = "ti,j721e-cpsw-virt-mac";
		dma-coherent;
		ti,psil-base = <0x4a00>;
		ti,remote-name = "mpu_1_0_ethswitch-device-0";

		dmas = <&main_udmap 0xca00>,
		       <&main_udmap 0xca01>,
		       <&main_udmap 0xca02>,
		       <&main_udmap 0xca03>,
		       <&main_udmap 0xca04>,
		       <&main_udmap 0xca05>,
		       <&main_udmap 0xca06>,
		       <&main_udmap 0xca07>,
		       <&main_udmap 0x4a00>;
		dma-names = "tx0", "tx1", "tx2", "tx3",
			    "tx4", "tx5", "tx6", "tx7",
			    "rx";

		virt_emac_port {
			ti,label = "virt-port";
			/* local-mac-address = [0 0 0 0 0 0]; */
		};
	};

	dp0: connector {
		compatible = "dp-connector";
		label = "DP0";

		port {
			dp_connector_in: endpoint {
				remote-endpoint = <&dp_bridge_output>;
			};
		};
	};

	clk_ov5640_fixed: ov5640-xclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};
};

&main_pmx0 {
	sw10_button_pins_default: sw10_button_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */
		>;
	};

	dp0_pins_default: dp0_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */
		>;
	};

	main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */
		>;
	};

	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
			J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */
			J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */
		>;
	};

	main_i2c2_pins_default: main-i2c2-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1c8, PIN_INPUT_PULLUP, 2) /* (AB5) SPI0_CLK.I2C2_SCL */
			J721E_IOPAD(0x1cc, PIN_INPUT_PULLUP, 2) /* (AA1) SPI0_D0.I2C2_SDA */
		>;
	};

	main_i2c3_pins_default: main-i2c3-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */
			J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */
		>;
	};

	main_i2c6_pins_default: main-i2c6-pins-default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */
			J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */
		>;
	};

	mcasp10_pins_default: mcasp10_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x158, PIN_OUTPUT_PULLDOWN, 12) /* (U23) RGMII5_TX_CTL.MCASP10_ACLKX */
			J721E_IOPAD(0x15c, PIN_OUTPUT_PULLDOWN, 12) /* (U26) RGMII5_RX_CTL.MCASP10_AFSX */
			J721E_IOPAD(0x160, PIN_OUTPUT_PULLDOWN, 12) /* (V28) RGMII5_TD3.MCASP10_AXR0 */
			J721E_IOPAD(0x164, PIN_OUTPUT_PULLDOWN, 12) /* (V29) RGMII5_TD2.MCASP10_AXR1 */
			J721E_IOPAD(0x170, PIN_OUTPUT_PULLDOWN, 12) /* (U29) RGMII5_TXC.MCASP10_AXR2 */
			J721E_IOPAD(0x174, PIN_OUTPUT_PULLDOWN, 12) /* (U25) RGMII5_RXC.MCASP10_AXR3 */
			J721E_IOPAD(0x198, PIN_INPUT_PULLDOWN, 12) /* (V25) RGMII6_TD1.MCASP10_AXR4 */
			J721E_IOPAD(0x19c, PIN_INPUT_PULLDOWN, 12) /* (W27) RGMII6_TD0.MCASP10_AXR5 */
			J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 12) /* (W29) RGMII6_TXC.MCASP10_AXR6 */
		>;
	};

	audi_ext_refclk2_pins_default: audi_ext_refclk2_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1a4, PIN_OUTPUT, 3) /* (W26) RGMII6_RXC.AUDIO_EXT_REFCLK2 */
		>;
	};

	main_mmc1_pins_default: main_mmc1_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
			J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
			J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
			J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
			J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
			J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
			J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
			J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
			J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
		>;
	};

	vdd_sd_dv_alt_pins_default: vdd_sd_dv_alt_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x1d8, PIN_INPUT, 7) /* (W4) SPI1_CS1.GPIO0_117 */
		>;
	};

	main_usbss0_pins_default: main_usbss0_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
			J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
		>;
	};

	main_usbss1_pins_default: main_usbss1_pins_default {
		pinctrl-single,pins = <
			J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
		>;
	};
};

&wkup_pmx0 {
	sw11_button_pins_default: sw11_button_pins_default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */
		>;
	};

	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
			J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
			J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
			J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
			J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
			J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
			J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
		>;
	};
};

&wkup_pmx0 {
	mcu_cpsw_pins_default: mcu_cpsw_pins_default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
			J721E_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
			J721E_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
			J721E_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
			J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
			J721E_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
			J721E_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
			J721E_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
			J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
			J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
			J721E_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
			J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
		>;
	};

	mcu_mdio_pins_default: mcu_mdio1_pins_default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* MCU_MDIO0_MDC */
			J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_MDIO0_MDIO */
		>;
	};

	mcu_mcan0_pins_default: mcu-mcan0-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xac, PIN_INPUT, 0) /* (C29) MCU_MCAN0_RX */
			J721E_WKUP_IOPAD(0xa8, PIN_OUTPUT, 0) /* (D29) MCU_MCAN0_TX */
		>;
	};

	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 7) /* (F26) WKUP_GPIO0_0 */
			J721E_WKUP_IOPAD(0x98, PIN_INPUT, 7) /* (E28) MCU_SPI0_D1.WKUP_GPIO0_54 */
		>;
	};

	mcu_mcan1_pins_default: mcu-mcan1-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xc4, PIN_INPUT, 0) /* (G24) WKUP_GPIO0_5.MCU_MCAN1_RX */
			J721E_WKUP_IOPAD(0xc0, PIN_OUTPUT, 0) /* (G25) WKUP_GPIO0_4.MCU_MCAN1_TX */
		>;
	};

	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default {
		pinctrl-single,pins = <
			J721E_WKUP_IOPAD(0xb8, PIN_INPUT, 7) /* (F28) WKUP_GPIO0_2 */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "disabled";
};

&mcu_uart0 {
	/* UART not brought out */
	status = "disabled";
};


&main_uart0 {
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

&main_uart3 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart5 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart6 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart7 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart8 {
	/* UART not brought out */
	status = "disabled";
};

&main_uart9 {
	/* UART not brought out */
	status = "disabled";
};

&main_gpio2 {
	status = "disabled";
};

&main_gpio3 {
	status = "disabled";
};

&main_gpio4 {
	status = "disabled";
};

&main_gpio5 {
	status = "disabled";
};

&main_gpio6 {
	status = "disabled";
};

&main_gpio7 {
	status = "disabled";
};

&wkup_gpio1 {
	status = "disabled";
};

&mailbox0_cluster0 {
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster1 {
	interrupts = <432>;

	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster2 {
	interrupts = <428>;

	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster3 {
	interrupts = <424>;

	mbox_c66_0: mbox-c66-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};

	mbox_c66_1: mbox-c66-1 {
		ti,mbox-rx = <2 0 0>;
		ti,mbox-tx = <3 0 0>;
	};
};

&mailbox0_cluster4 {
	interrupts = <420>;

	mbox_c71_0: mbox-c71-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster5 {
	status = "disabled";
};

&mailbox0_cluster6 {
	status = "disabled";
};

&mailbox0_cluster7 {
	status = "disabled";
};

&mailbox0_cluster8 {
	status = "disabled";
};

&mailbox0_cluster9 {
	status = "disabled";
};

&mailbox0_cluster10 {
	status = "disabled";
};

&mailbox0_cluster11 {
	status = "disabled";
};

&mcu_r5fss0_core0 {
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};

&mcu_r5fss0_core1 {
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
};

&main_r5fss0_core0 {
	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
};

&main_r5fss0_core1 {
	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
};

&main_r5fss1_core0 {
	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
};

&main_r5fss1_core1 {
	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
};

&c66_0 {
	mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
};

&c66_1 {
	mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
};

&c71_0 {
	mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
};

&ospi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;

	flash@0{
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		spi-max-frequency = <40000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <2>;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&tscadc1 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&dss {
	status = "ok";
};

&dss_ports {
	#address-cells = <1>;
	#size-cells = <0>;

	port@0 {
		reg = <0>;

		dpi_out_real0: endpoint {
			remote-endpoint = <&dp_bridge_input>;
		};
	};
};

&mhdp {
	status = "ok";
	pinctrl-names = "default";
	pinctrl-0 = <&dp0_pins_default>;
};

&dp0_ports {
	#address-cells = <1>;
	#size-cells = <0>;

	port@0 {
		reg = <0>;
		dp_bridge_input: endpoint {
			remote-endpoint = <&dpi_out_real0>;
		};
	};

	port@1 {
		reg = <1>;
		dp_bridge_output: endpoint {
			remote-endpoint = <&dp_connector_in>;
		};
	};
};

&main_i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

	exp1: gpio@20 {
		compatible = "ti,tca6416";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	exp2: gpio@22 {
		compatible = "ti,tca6424";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;

		p08 {
			/* P10 - PM_I2C_CTRL_OE */
			gpio-hog;
			gpios = <8 GPIO_ACTIVE_HIGH>;
			output-high;
			line-name = "CTRL_PM_I2C_OE";
		};

		p09 {
			/* P11 - MCASP/TRACE_MUX_S0 */
			gpio-hog;
			gpios = <9 GPIO_ACTIVE_HIGH>;
			output-low;
			line-name = "MCASP/TRACE_MUX_S0";
		};

		p10 {
			/* P12 - MCASP/TRACE_MUX_S1 */
			gpio-hog;
			gpios = <10 GPIO_ACTIVE_HIGH>;
			output-high;
			line-name = "MCASP/TRACE_MUX_S1";
		};
	};
};

&main_i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;

	ina226@40 {
		compatible = "ti,ina226";
		reg = <0x40>;
		shunt-resistor = <10000>;
	};

	ina226@41 {
		compatible = "ti,ina226";
		reg = <0x41>;
		shunt-resistor = <10000>;
	};

	ina226@42 {
		compatible = "ti,ina226";
		reg = <0x42>;
		shunt-resistor = <10000>;
	};

	ina226@43 {
		compatible = "ti,ina226";
		reg = <0x43>;
		shunt-resistor = <10000>;
	};

	ina226@44 {
		compatible = "ti,ina226";
		reg = <0x44>;
		shunt-resistor = <10000>;
	};

	ina226@45 {
		compatible = "ti,ina226";
		reg = <0x45>;
		shunt-resistor = <5000>;
	};

	ina226@46 {
		compatible = "ti,ina226";
		reg = <0x46>;
		shunt-resistor = <10000>;
	};

	ina226@47 {
		compatible = "ti,ina226";
		reg = <0x47>;
		shunt-resistor = <10000>;
	};

	ina226@48 {
		compatible = "ti,ina226";
		reg = <0x48>;
		shunt-resistor = <10000>;
	};

	ina226@49 {
		compatible = "ti,ina226";
		reg = <0x49>;
		shunt-resistor = <10000>;
	};

	ina226@4a {
		compatible = "ti,ina226";
		reg = <0x4a>;
		shunt-resistor = <10000>;
	};

	ina226@4b {
		compatible = "ti,ina226";
		reg = <0x4b>;
		shunt-resistor = <10000>;
	};

	ina226@4c {
		compatible = "ti,ina226";
		reg = <0x4c>;
		shunt-resistor = <10000>;
	};

	ina226@4d {
		compatible = "ti,ina226";
		reg = <0x4d>;
		shunt-resistor = <10000>;
	};

	ina226@4e {
		compatible = "ti,ina226";
		reg = <0x4e>;
		shunt-resistor = <10000>;
	};

	ina226@4f {
		compatible = "ti,ina226";
		reg = <0x4f>;
		shunt-resistor = <10000>;
	};
};

&main_i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;

	exp4: gpio@20 {
		compatible = "ti,tca6408";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&main_i2c1_exp4_pins_default>;
		interrupt-parent = <&main_gpio1>;
		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;

		p0 {
			/* P0 - DP0_PWR_SW_EN */
			gpio-hog;
			gpios = <0 GPIO_ACTIVE_HIGH>;
			output-high;
			line-name = "DP0_PWR_SW_EN";
		};
	};
};

&k3_clks {
	/* Confiure AUDIO_EXT_REFCLK2 pin as output */
	pinctrl-names = "default";
	pinctrl-0 = <&audi_ext_refclk2_pins_default>;
};

&main_i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c3_pins_default>;
	clock-frequency = <400000>;

	exp3: gpio@20 {
		compatible = "ti,tca6408";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	pcm3168a_1: audio-codec@44 {
		compatible = "ti,pcm3168a";
		reg = <0x44>;

		#sound-dai-cells = <1>;

		reset-gpios = <&exp3 0 GPIO_ACTIVE_LOW>;

		/* C_AUDIO_REFCLK2 -> RGMII6_RXC (W26) */
		clocks = <&k3_clks 157 371>;
		clock-names = "scki";

		/* HSDIV3_16FFT_MAIN_4_HSDIVOUT2_CLK -> REFCLK2 */
		assigned-clocks = <&k3_clks 157 371>;
		assigned-clock-parents = <&k3_clks 157 400>;
		assigned-clock-rates = <24576000>; /* for 48KHz */

		VDD1-supply = <&vsys_3v3>;
		VDD2-supply = <&vsys_3v3>;
		VCCAD1-supply = <&vsys_5v0>;
		VCCAD2-supply = <&vsys_5v0>;
		VCCDA1-supply = <&vsys_5v0>;
		VCCDA2-supply = <&vsys_5v0>;
	};
};

&main_i2c6 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c6_pins_default>;
	clock-frequency = <400000>;

	exp5: gpio@20 {
		compatible = "ti,tca6408";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	ov5640: camera@3c {
		compatible = "ovti,ov5640";
		reg = <0x3c>;

		clocks = <&clk_ov5640_fixed>;
		clock-names = "xclk";
		reset-gpios = <&exp5 0 GPIO_ACTIVE_LOW>;

		port {
			csi2_cam0: endpoint {
				remote-endpoint = <&csi2rx0_in_sensor>;
				clock-lanes = <0>;
				data-lanes = <1 2>;
			};
		};
	};
};

&mcasp10 {
	#sound-dai-cells = <0>;

	pinctrl-names = "default";
	pinctrl-0 = <&mcasp10_pins_default>;

	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	auxclk-fs-ratio = <256>;

	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */
		1 1 1 1
		2 2 2 0
	>;
	tx-num-evt = <0>;
	rx-num-evt = <0>;

	status = "okay";
};

&mcu_cpsw {
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
};

&davinci_mdio {
	phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

&cpsw_port1 {
	phy-mode = "rgmii-rxid";
	phy-handle = <&phy0>;
};

&main_sdhci0 {
	/* eMMC */
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&main_sdhci1 {
	/* SD/MMC */
	vmmc-supply = <&vdd_mmc1>;
	vqmmc-supply = <&vdd_sd_dv_alt>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	disable-wp;
};

&main_sdhci2 {
	/* Unused */
	status = "disabled";
};

&serdes0 {
	serdes0_pcie_link: link@0 {
		reg = <0>;
		cdns,num-lanes = <1>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz0 1>;
	};
};

&serdes1 {
	serdes1_pcie_link: link@0 {
		reg = <0>;
		cdns,num-lanes = <2>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>;
	};
};

&serdes2 {
	serdes2_pcie_link: link@0 {
		reg = <0>;
		cdns,num-lanes = <2>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_PCIE>;
		resets = <&serdes_wiz2 1>, <&serdes_wiz2 2>;
	};
};

&pcie0_rc {
	reset-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>;
	phys = <&serdes0_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <1>;
};

&pcie1_rc {
	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
	phys = <&serdes1_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <2>;
};

&pcie2_rc {
	reset-gpios = <&exp2 20 GPIO_ACTIVE_HIGH>;
	phys = <&serdes2_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <2>;
};

&pcie0_ep {
	phys = <&serdes0_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <1>;
	status = "disabled";
};

&pcie1_ep {
	phys = <&serdes1_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <2>;
	status = "disabled";
};

&pcie2_ep {
	phys = <&serdes2_pcie_link>;
	phy-names = "pcie_phy";
	num-lanes = <2>;
	status = "disabled";
};

&pcie3_rc {
	status = "disabled";
};

&pcie3_ep {
	status = "disabled";
};

&usb_serdes_mux {
	idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
};

&serdes_ln_ctrl {
	idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
		      <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
		      <SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>,
		      <SERDES3_LANE0_USB3_0_SWAP>, <SERDES3_LANE1_USB3_0>,
		      <SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>;
};

&serdes_wiz3 {
	typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
	typec-dir-debounce-ms = <700>;	/* TUSB321, tCCB_DEFAULT 133 ms */
};

&serdes3 {
	serdes3_usb_link: link@0 {
		reg = <0>;
		cdns,num-lanes = <2>;
		#phy-cells = <0>;
		cdns,phy-type = <PHY_TYPE_USB3>;
		resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
	};
};

&usbss0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_usbss0_pins_default>;
	ti,vbus-divider;
};

&usb0 {
	dr_mode = "otg";
	maximum-speed = "super-speed";
	phys = <&serdes3_usb_link>;
	phy-names = "cdns3,usb3-phy";
};

&usbss1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_usbss1_pins_default>;
	ti,usb2-only;
};

&usb1 {
	dr_mode = "host";
	maximum-speed = "high-speed";
};

/* uart2 assigned to cpsw9g eth-switch fw running on remote CPU core */
&main_uart2 {
	status = "disabled";
};

&mcu_mcan0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mcan0_pins_default &mcu_mcan0_gpio_pins_default>;
	stb-gpios = <&wkup_gpio0 54 GPIO_ACTIVE_HIGH>;
	en-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&mcu_mcan1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_mcan1_pins_default &mcu_mcan1_gpio_pins_default>;
	stb-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_LOW>;
	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&main_mcan0 {
	status = "disabled";
};

&main_mcan1 {
	status = "disabled";
};

&main_mcan2 {
	status = "disabled";
};

&main_mcan3 {
	status = "disabled";
};

&main_mcan4 {
	status = "disabled";
};

&main_mcan5 {
	status = "disabled";
};

&main_mcan6 {
	status = "disabled";
};

&main_mcan7 {
	status = "disabled";
};

&main_mcan8 {
	status = "disabled";
};

&main_mcan9 {
	status = "disabled";
};

&main_mcan10 {
	status = "disabled";
};

&main_mcan11 {
	status = "disabled";
};

&main_mcan12 {
	status = "disabled";
};

&main_mcan13 {
	status = "disabled";
};

&csi2_0 {
	csi2rx0_in_sensor: endpoint {
		remote-endpoint = <&csi2_cam0>;
		bus-type = <4>; /* CSI2 DPHY. */
		clock-lanes = <0>;
		data-lanes = <1 2>;
	};
};

-include Rules.make

MAKE_JOBS ?= 1

all: linux arm-benchmarks am-sysinfo oprofile-example linux-dtbs cryptodev sysfw-image jailhouse ti-img-rogue-driver oob-demo u-boot-spl-j7 ti-img-encode-decode 
clean: linux_clean arm-benchmarks_clean am-sysinfo_clean oprofile-example_clean linux-dtbs_clean cryptodev_clean sysfw-image_clean jailhouse_clean ti-img-rogue-driver_clean oob-demo_clean u-boot-spl-j7_clean ti-img-encode-decode_clean 
install: linux_install arm-benchmarks_install am-sysinfo_install oprofile-example_install linux-dtbs_install cryptodev_install sysfw-image_install jailhouse_install ti-img-rogue-driver_install oob-demo_install u-boot-spl-j7_install ti-img-encode-decode_install 
# Kernel build targets
linux: linux-dtbs
	@echo =================================
	@echo     Building the Linux Kernel
	@echo =================================
	$(MAKE) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) $(DEFCONFIG)
	$(MAKE) -j $(MAKE_JOBS) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE)  Image
	$(MAKE) -j $(MAKE_JOBS) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) modules

linux_install: linux-dtbs_install
	@echo ===================================
	@echo     Installing the Linux Kernel
	@echo ===================================
	@if [ ! -d $(DESTDIR) ] ; then \
		echo "The extracted target filesystem directory doesn't exist."; \
		echo "Please run setup.sh in the SDK's root directory and then try again."; \
		exit 1; \
	fi
	install -d $(DESTDIR)/boot
	install $(LINUXKERNEL_INSTALL_DIR)/arch/arm64/boot/Image $(DESTDIR)/boot
	install $(LINUXKERNEL_INSTALL_DIR)/vmlinux $(DESTDIR)/boot
	install $(LINUXKERNEL_INSTALL_DIR)/System.map $(DESTDIR)/boot
	$(MAKE) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) INSTALL_MOD_PATH=$(DESTDIR) INSTALL_MOD_STRIP=$(INSTALL_MOD_STRIP) modules_install

linux_clean:
	@echo =================================
	@echo     Cleaning the Linux Kernel
	@echo =================================
	$(MAKE) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) mrproper
# arm-benchmarks build targets
arm-benchmarks:
	@echo =============================
	@echo    Building ARM Benchmarks
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*arm-benchmarks*"`; make CC="$(CC)"

arm-benchmarks_clean:
	@echo =============================
	@echo    Cleaning ARM Benchmarks
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*arm-benchmarks*"`; make clean

arm-benchmarks_install:
	@echo ==============================================
	@echo   Installing ARM Benchmarks - Release version
	@echo ==============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*arm-benchmarks*"`; make install

arm-benchmarks_install_debug:
	@echo ============================================
	@echo   Installing ARM Benchmarks - Debug Version
	@echo ============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*arm-benchmarks*"`; make install_debug
# am-sysinfo build targets
am-sysinfo:
	@echo =============================
	@echo    Building AM Sysinfo
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*am-sysinfo*"`; make CC="$(CC)"

am-sysinfo_clean:
	@echo =============================
	@echo    Cleaning AM Sysinfo
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*am-sysinfo*"`; make clean

am-sysinfo_install:
	@echo ===============================================
	@echo     Installing AM Sysinfo - Release version
	@echo ===============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*am-sysinfo*"`; make install

am-sysinfo_install_debug:
	@echo =============================================
	@echo     Installing AM Sysinfo - Debug version
	@echo =============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*am-sysinfo*"`; make install_debug
# oprofile-example build targets
oprofile-example:
	@echo =============================
	@echo    Building OProfile Example
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*oprofile-example*"`; make CC="$(CC)"

oprofile-example_clean:
	@echo =============================
	@echo    Cleaning OProfile Example
	@echo =============================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*oprofile-example*"`; make clean

oprofile-example_install:
	@echo =============================================
	@echo     Installing OProfile Example - Debug version
	@echo =============================================
	@cd example-applications; cd `find . -maxdepth 1 -type d -name "*oprofile-example*"`; make install
# Kernel DTB build targets
linux-dtbs:
	@echo =====================================
	@echo     Building the Linux Kernel DTBs
	@echo =====================================
	$(MAKE) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) $(DEFCONFIG)
	@for DTB in      ti/k3-j721e-common-proc-board.dtb     ti/k3-j721e-proc-board-tps65917.dtb     ti/k3-j721e-common-proc-board-infotainment.dtbo     ti/k3-j721e-pcie-backplane.dtbo     ti/k3-j721e-common-proc-board-jailhouse.dtbo  	ti/k3-j721e-vision-apps.dtbo 	ti/k3-j721e-pcie-backplane.dtbo ; do \
		$(MAKE) -j $(MAKE_JOBS) -C $(LINUXKERNEL_INSTALL_DIR) ARCH=arm64 CROSS_COMPILE=$(CROSS_COMPILE) $$DTB; \
	done

linux-dtbs_install:
	@echo =======================================
	@echo     Installing the Linux Kernel DTBs
	@echo =======================================
	@if [ ! -d $(DESTDIR) ] ; then \
		echo "The extracted target filesystem directory doesn't exist."; \
		echo "Please run setup.sh in the SDK's root directory and then try again."; \
		exit 1; \
	fi
	install -d $(DESTDIR)/boot
	@for DTB in      ti/k3-j721e-common-proc-board.dtb     ti/k3-j721e-proc-board-tps65917.dtb     ti/k3-j721e-common-proc-board-infotainment.dtbo     ti/k3-j721e-pcie-backplane.dtbo     ti/k3-j721e-common-proc-board-jailhouse.dtbo  	ti/k3-j721e-vision-apps.dtbo 	ti/k3-j721e-pcie-backplane.dtbo ; do \
		install -m 0644 $(LINUXKERNEL_INSTALL_DIR)/arch/arm64/boot/dts/$$DTB $(DESTDIR)/boot/; \
	done

linux-dtbs_clean:
	@echo =======================================
	@echo     Cleaning the Linux Kernel DTBs
	@echo =======================================
	@echo "Nothing to do"

cryptodev: linux
	@echo ================================
	@echo      Building cryptodev-linux
	@echo ================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "cryptodev*"`; \
	make ARCH=arm64 KERNEL_DIR=$(LINUXKERNEL_INSTALL_DIR)

cryptodev_clean:
	@echo ================================
	@echo      Cleaning cryptodev-linux
	@echo ================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "cryptodev*"`; \
	make ARCH=arm64 KERNEL_DIR=$(LINUXKERNEL_INSTALL_DIR) clean

cryptodev_install:
	@echo ================================
	@echo      Installing cryptodev-linux
	@echo ================================
	@if [ ! -d $(DESTDIR) ] ; then \
		echo "The extracted target filesystem directory doesn't exist."; \
		echo "Please run setup.sh in the SDK's root directory and then try again."; \
		exit 1; \
	fi
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "cryptodev*"`; \
	make ARCH=arm64  KERNEL_DIR=$(LINUXKERNEL_INSTALL_DIR)  INSTALL_MOD_PATH=$(DESTDIR) PREFIX=$(SDK_PATH_TARGET) INSTALL_MOD_STRIP=$(INSTALL_MOD_STRIP) install
# Define the following to support multple platforms
PLATFORM_TYPE_$(PLATFORM) = gp
PLATFORM_TYPE_am65xx-hs-evm = hs
PLATFORM_TYPE_j7-hs-evm = hs
PLATFORM_TYPE = $(PLATFORM_TYPE_$(PLATFORM))

SYSFW_CONFIG = evm

SYSFW_SOC_$(PLATFORM) = NULL
SYSFW_SOC_am65xx-evm = am65x
SYSFW_SOC_am65xx-hs-evm = am65x
SYSFW_SOC_j7-evm = j721e
SYSFW_SOC_j7-hs-evm = j721e
SYSFW_SOC_j7200-evm = j7200
SYSFW_SOC = $(SYSFW_SOC_$(PLATFORM))

SYSFW_PREFIX_$(PLATFORM) = NULL
SYSFW_PREFIX_am65xx-evm = ti-sci-firmware
SYSFW_PREFIX_am65xx-hs-evm = ti-sci-firmware
SYSFW_PREFIX_j7-evm = ti-fs-firmware
SYSFW_PREFIX_j7-hs-evm = ti-fs-firmware
SYSFW_PREFIX_j7200-evm = ti-fs-firmware
SYSFW_PREFIX = $(SYSFW_PREFIX_$(PLATFORM))

ifeq ($(SYSFW_SOC),j7200)
	SYSFW_BASE = tiboot3
else
	SYSFW_BASE = $(SYSFW_PREFIX)-$(SYSFW_SOC)-$(PLATFORM_TYPE)
endif

SYSFW_MAKEARGS_common = SYSFW_DL_URL="" SYSFW_HS_DL_URL="" SYSFW_HS_INNER_CERT_DL_URL="" \
                        SYSFW_PATH=$(TI_SDK_PATH)/board-support/prebuilt-images/$(SYSFW_BASE).bin \
                        SOC=$(SYSFW_SOC) CONFIG=$(SYSFW_CONFIG)

SYSFW_MAKEARGS_gp = 
SYSFW_MAKEARGS_hs = HS=1 SYSFW_HS_PATH=$(TI_SDK_PATH)/board-support/prebuilt-images/$(SYSFW_BASE)-enc.bin \
                    SYSFW_HS_INNER_CERT_PATH=$(TI_SDK_PATH)/board-support/prebuilt-images/$(SYSFW_BASE)-cert.bin

SYSFW_MAKEARGS = $(SYSFW_MAKEARGS_common) $(SYSFW_MAKEARGS_$(PLATFORM_TYPE))

# Depend on linux-dtbs for the dtc utility
sysfw-image: linux-dtbs
	@echo =============================
	@echo    Building SYSFW Image
	@echo =============================
	@cd board-support; cd `find . -maxdepth 1 -type d -name "*k3-image*"`; \
		make $(SYSFW_MAKEARGS) CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) PATH=$(PATH):$(LINUXKERNEL_INSTALL_DIR)/scripts/dtc SOC=$(SYSFW_SOC)

sysfw-image_clean:
	@echo =============================
	@echo    Cleaning SYSFW Image
	@echo =============================
	@cd board-support; cd `find . -maxdepth 1 -type d -name "*k3-image*"`; make clean SOC=$(SYSFW_SOC)

sysfw-image_install:
	@echo =============================
	@echo   Installing SYSFW Image
	@echo =============================
	@echo "Nothing to do"
# jailhouse module
JH_ARCH = "arm64"
JH_PLATFORM = "k3"

jailhouse_config:
	@echo =====================================
	@echo      Configuring jailhouse
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	echo "#define CONFIG_TRACE_ERROR    1" >> include/jailhouse/config.h

jailhouse: linux jailhouse_config
	@echo =====================================
	@echo      Building jailhouse
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	make ARCH=$(JH_ARCH) KDIR=${LINUXKERNEL_INSTALL_DIR}

jailhouse_clean:
	@echo =====================================
	@echo      Cleaning jailhouse
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	make ARCH=$(JH_ARCH) KDIR=${LINUXKERNEL_INSTALL_DIR} clean

jailhouse_distclean: jailhouse_clean
	@echo =====================================
	@echo      Distclean jailhouse
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	rm -vf ./hypervisor/include/jailhouse/config.h

jailhouse_install:
	@echo ================================
	@echo      Installing jailhouse
	@echo ================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -name "jailhouse*" -type d`; \
	make ARCH=$(JH_ARCH) KDIR=${LINUXKERNEL_INSTALL_DIR} DESTDIR=$(DESTDIR) INSTALL_MOD_STRIP=$(INSTALL_MOD_STRIP) prefix=/usr install


# ti-img-rogue-driver
ti-img-rogue-driver: linux
	@echo =====================================
	@echo     Building ti-img-rogue-driver
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-rogue-driver*" -type d`; \
	make ARCH=arm64 KERNELDIR=${LINUXKERNEL_INSTALL_DIR} RGX_BVNC="22.104.208.318" BUILD=release PVR_BUILD_DIR=j721e_linux WINDOW_SYSTEM=wayland

ti-img-rogue-driver_clean:
	@echo ====================================
	@echo     Cleaning ti-img-rogue-driver
	@echo ====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-rogue-driver*" -type d`; \
	make ARCH=arm64 KERNELDIR=${LINUXKERNEL_INSTALL_DIR} RGX_BVNC="22.104.208.318" BUILD=release PVR_BUILD_DIR=j721e_linux WINDOW_SYSTEM=wayland clean

ti-img-rogue-driver_install:
	@echo ====================================
	@echo     Installing ti-img-rogue-driver
	@echo ====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-rogue-driver*" -type d`; \
	cd binary_j721e_linux_wayland_release/target_aarch64/kbuild; \
	make -C ${LINUXKERNEL_INSTALL_DIR} INSTALL_MOD_PATH=${DESTDIR} INSTALL_MOD_STRIP=${INSTALL_MOD_STRIP} M=`pwd` modules_install

oob-demo:


oob-demo_clean:


oob-demo_install:
	@echo =============================
	@echo Updating oob-demo wallpaper
	@echo =============================
	sed -i 's%background-image.*%background-image=/usr/share/demo/j7-evm-p0-wallpaper.jpg%' $(DESTDIR)/etc/weston.ini


# u-boot build targets
u-boot-spl-j7: u-boot
u-boot-spl-j7_clean: u-boot_clean
u-boot-spl-j7_install: u-boot_install

UBOOT_SYSFW=$(TI_SDK_PATH)/board-support/prebuilt-images/sysfw.bin

ifeq ($(PLATFORM),j7-evm)
	UBOOT_A72_BUILD_DIR=$(TI_SDK_PATH)/board-support/u-boot_build/a72
	UBOOT_R5_BUILD_DIR=$(TI_SDK_PATH)/board-support/u-boot_build/r5
	UBOOT_ATF=$(TI_SDK_PATH)/board-support/prebuilt-images/bl31.bin
	UBOOT_TEE=$(TI_SDK_PATH)/board-support/prebuilt-images/bl32.bin
	#UBOOT_DM=$(TI_SDK_PATH)/board-support/prebuilt-images/ipc_echo_testb_mcu1_0_release_strip.xer5f
	#UBOOT_DM=/home/ketaki/Downloads/UART_j721e_evm_mcu1_0TestApp_release_strip.xer5f
        UBOOT_DM=/home/ketaki/ti-processor-sdk-rtos-j721e-evm-07_03_00_07/pdk_jacinto_07_03_00_29/packages/ti/binary/UART_TestApp/bin/j721e_evm/UART_j721e_evm_mcu1_0TestApp_release_strip.xer5f
else
	UBOOT_A72_BUILD_DIR=$(TI_SDK_PATH)/board-support/u-boot_hs_build/a72
	UBOOT_R5_BUILD_DIR=$(TI_SDK_PATH)/board-support/u-boot_hs_build/r5
	UBOOT_ATF=$(TI_SDK_PATH)/board-support/prebuilt-images/bl31.bin.signed
	UBOOT_TEE=$(TI_SDK_PATH)/board-support/prebuilt-images/bl32.bin.signed
	UBOOT_DM=$(TI_SDK_PATH)/board-support/prebuilt-images/ipc_echo_testb_mcu1_0_release_strip.xer5f.signed
endif

u-boot: u-boot-a72 u-boot-r5
u-boot_clean: u-boot-a72_clean u-boot-r5_clean

u-boot-a72:
	@echo ===================================
	@echo    Building U-boot for A72
	@echo ===================================
	$(MAKE) -j $(MAKE_JOBS) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE) \
		 $(UBOOT_MACHINE) O=$(UBOOT_A72_BUILD_DIR)
	$(MAKE) -j $(MAKE_JOBS) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE) \
		CONFIG_MKIMAGE_DTC_PATH=$(UBOOT_A72_BUILD_DIR)/scripts/dtc/dtc \
		ATF=$(UBOOT_ATF) TEE=$(UBOOT_TEE) DM=$(UBOOT_DM) \
		O=$(UBOOT_A72_BUILD_DIR)

u-boot-a72_clean:
	@echo ===================================
	@echo    Cleaining U-boot for A72
	@echo ===================================
	$(MAKE) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE) \
		O=$(UBOOT_A72_BUILD_DIR) distclean
	@rm -rf $(UBOOT_A72_BUILD_DIR)


u-boot-r5:
	@echo ===================================
	@echo    Building U-boot for R5
	@echo ===================================
	$(MAKE) -j $(MAKE_JOBS) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) \
		 $(UBOOT_MACHINE_R5) O=$(UBOOT_R5_BUILD_DIR)
	$(MAKE) -j $(MAKE_JOBS) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) \
		O=$(UBOOT_R5_BUILD_DIR)

u-boot-r5_clean:
	@echo ===================================
	@echo    Cleaining U-boot for R5
	@echo ===================================
	$(MAKE) -C $(TI_SDK_PATH)/board-support/u-boot-* CROSS_COMPILE=$(CROSS_COMPILE_ARMV7) \
		O=$(UBOOT_R5_BUILD_DIR) distclean
	@rm -rf $(UBOOT_R5_BUILD_DIR)

u-boot_install:
	@echo ===================================
	@echo    Installing U-boot
	@echo ===================================
	@echo "Nothing to do"


# ti-img-encode-decode
ti-img-encode-decode: linux
	@echo =====================================
	@echo     Building ti-img-encode-decode
	@echo =====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-encode-decode*" -type d`; \
	cd linux/decoder; \
	make ARCH=arm64 KPATH=${LINUXKERNEL_INSTALL_DIR} all; \
	cd ../encoder; \
	make ARCH=arm64 KPATH=${LINUXKERNEL_INSTALL_DIR} all

ti-img-encode-decode_clean:
	@echo ====================================
	@echo     Cleaning ti-img-encode-decode
	@echo ====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-encode-decode*" -type d`; \
	cd linux/decoder; \
	make ARCH=arm64 KPATH=${LINUXKERNEL_INSTALL_DIR} clean; \
	cd ../encoder; \
	make ARCH=arm64 KPATH=${LINUXKERNEL_INSTALL_DIR} clean

ti-img-encode-decode_install:
	@echo ====================================
	@echo     Installing ti-img-encode-decode
	@echo ====================================
	@cd board-support/extra-drivers; \
	cd `find . -maxdepth 1 -type d -name "ti-img-encode-decode*" -type d`; \
	cd linux/decoder; \
	make -C ${LINUXKERNEL_INSTALL_DIR} INSTALL_MOD_PATH=${DESTDIR} INSTALL_MOD_STRIP=${INSTALL_MOD_STRIP} M=`pwd` modules_install; \
	cd ../encoder; \
	make -C ${LINUXKERNEL_INSTALL_DIR} INSTALL_MOD_PATH=${DESTDIR} INSTALL_MOD_STRIP=${INSTALL_MOD_STRIP} M=`pwd` modules_install

#
# Copyright (c) 2013-2019, Texas Instruments Incorporated
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# *  Redistributions of source code must retain the above copyright
#    notice, this list of conditions and the following disclaimer.
#
# *  Redistributions in binary form must reproduce the above copyright
#    notice, this list of conditions and the following disclaimer in the
#    documentation and/or other materials provided with the distribution.
#
# *  Neither the name of Texas Instruments Incorporated nor the names of
#    its contributors may be used to endorse or promote products derived
#    from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#

# File: env.mk. This file contains all the paths and other ENV variables

#
# Module paths
#

# Destination root directory.
#   - specify the directory where you want to place the object, archive/library,
#     binary and other generated files in a different location than source tree
#   - or leave it blank to place then in the same tree as the source
DEST_ROOT ?= $(pdk_PATH)/ti/binary

# Utilities directory. This is required only if the build machine is Windows.
#   - specify the installation directory of utility which supports POSIX commands
#     (eg: Cygwin installation or MSYS installation).
UTILS_INSTALL_DIR ?= $(utils_PATH)

# Set path separator, etc based on the OS
ifeq ($(OS),Windows_NT)
  PATH_SEPARATOR = ;
  UTILSPATH = $(UTILS_INSTALL_DIR)/
  export SHELL := $(UTILSPATH)sh.exe
else
  # else, assume it is linux
  PATH_SEPARATOR = :
  UTILSPATH = /bin/
endif

ifeq ($(BUILD_OS_TYPE),tirtos)
  # BIOS
  bios_INCLUDE = $(bios_PATH)/packages
  export bios_INCLUDE

  # XDC
  xdc_INCLUDE = $(xdc_PATH)/packages
  export xdc_INCLUDE

  # EDMA
  edma_INCLUDE = $(edma3_lld_PATH)/packages
  export edma_INCLUDE
  # - used to ignore include if component not present
  -include $(edma3_lld_PATH)/packages/component.mk

  # NDK
  ndk_INCLUDE = $(ndk_PATH)/packages
  export ndk_INCLUDE

  # NS
  ns_INCLUDE = $(ns_PATH)/source/
  export ns_INCLUDE

endif

#Below applicable only for TDA devices
# Radar mmwavelink
radarLink_INCLUDE = $(radarLink_PATH) \
                    $(radarLink_PATH)/ti/control/mmwavelink/include \
                    $(radarLink_PATH)/ti/control/mmwavelink/src     \
                    $(radarLink_PATH)/ti/control/mmwavelink
radarFirmware_INCLUDE = $(radarMssFirmware_PATH) $(radarBssFirmware_PATH)   \
                        $(radarLink_PATH)/firmware
export radarLink_INCLUDE
export radarFirmware_INCLUDE

# PDK
pdk_INCLUDE = $(pdk_PATH)

# Add additional pdk include paths if sub-components are in different directories
ifneq ($(PDK_CSL_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CSL_ROOT_PATH)
endif

ifneq ($(PDK_CSL2_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CSL2_ROOT_PATH)
  pdk_INCLUDE += $(PDK_CSL2_ROOT_PATH)/ti/csl/arch/r5
  pdk_INCLUDE += $(PDK_CSL2_ROOT_PATH)/ti/csl
endif

ifneq ($(PDK_SA_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_SA_ROOT_PATH)
endif
ifneq ($(PDK_PM_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PM_ROOT_PATH)
endif
ifneq ($(PDK_PMIC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PMIC_ROOT_PATH)
endif
ifneq ($(PDK_OSAL_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_OSAL_ROOT_PATH)
endif
ifneq ($(PDK_I2C_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_I2C_ROOT_PATH)
endif
ifneq ($(PDK_VPS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_VPS_ROOT_PATH)
endif
ifneq ($(PDK_GPIO_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_GPIO_ROOT_PATH)
endif
ifneq ($(PDK_FATFS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_FATFS_ROOT_PATH)
endif
ifneq ($(PDK_MMCSD_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_MMCSD_ROOT_PATH)
endif
ifneq ($(PDK_PCIE_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PCIE_ROOT_PATH)
endif
ifneq ($(PDK_USB_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_USB_ROOT_PATH)
endif
ifneq ($(PDK_MCASP_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_MCASP_ROOT_PATH)
endif
ifneq ($(PDK_TIMESYNC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_TIMESYNC_ROOT_PATH)
endif
ifneq ($(PDK_MCBSP_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_MCBSP_ROOT_PATH)
endif
ifneq ($(PDK_PROFILING_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PROFILING_ROOT_PATH)
endif
ifneq ($(PDK_TRACE_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_TRACE_ROOT_PATH)
endif
ifneq ($(PDK_PRUSS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_PRUSS_ROOT_PATH)
endif
ifneq ($(PDK_NIMU_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_NIMU_ROOT_PATH)
endif
ifneq ($(PDK_NIMU_ICSS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_NIMU_ICSS_ROOT_PATH)
endif
ifneq ($(PDK_ICSS_EMAC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_ICSS_EMAC_ROOT_PATH)
endif
ifneq ($(PDK_EMAC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_EMAC_ROOT_PATH)
endif
ifneq ($(PDK_UART_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_UART_ROOT_PATH)
endif
ifneq ($(PDK_SPI_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_SPI_ROOT_PATH)
endif
ifneq ($(PDK_BOARD_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_BOARD_ROOT_PATH)
endif
ifneq ($(PDK_GPMC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_GPMC_ROOT_PATH)
endif
ifneq ($(PDK_IOLINK_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_IOLINK_ROOT_PATH)
endif
ifneq ($(PDK_BOARD_DIAG_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_BOARD_DIAG_ROOT_PATH)
endif
ifneq ($(PDK_BOARD_UTILS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_BOARD_UTILS_ROOT_PATH)
endif

#Below applicable only for K3 devices
ifneq ($(PDK_UDMA_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_UDMA_ROOT_PATH)
endif
ifneq ($(PDK_ENET_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_ENET_ROOT_PATH)
endif
ifneq ($(PDK_CSIRX_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CSIRX_ROOT_PATH)
endif
ifneq ($(PDK_CSITX_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CSITX_ROOT_PATH)
endif
ifneq ($(PDK_DSS_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_DSS_ROOT_PATH)
endif
ifneq ($(PDK_SCICLIENT_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_SCICLIENT_ROOT_PATH)
endif
ifneq ($(PDK_IPC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_IPC_ROOT_PATH)
endif
ifneq ($(PDK_FVID2_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_FVID2_ROOT_PATH)
endif
ifneq ($(PDK_CAL_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CAL_ROOT_PATH)
endif

#Below are used for TDA/DRA SBL
ifneq ($(PDK_STW_LLD_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_STW_LLD_ROOT_PATH)
endif
ifneq ($(PDK_SBL_AUTO_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_SBL_AUTO_ROOT_PATH)
endif
ifneq ($(PDK_NORFLASH_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_NORFLASH_ROOT_PATH)
endif
ifneq ($(PDK_QSPIFLASH_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_QSPIFLASH_ROOT_PATH)
endif

#Below applicable only for TPR12 devices
ifneq ($(PDK_CRC_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CRC_ROOT_PATH)
endif
ifneq ($(PDK_EDMA_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_EDMA_ROOT_PATH)
endif
ifneq ($(PDK_MAILBOX_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_MAILBOX_ROOT_PATH)
endif
ifneq ($(PDK_ESM_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_ESM_ROOT_PATH)
endif
ifneq ($(PDK_CAN_ROOT_PATH), $(pdk_PATH))
  pdk_INCLUDE += $(PDK_CAN_ROOT_PATH)
endif

export pdk_INCLUDE

include $(pdk_PATH)/ti/build/makerules/component.mk

# Package Relative path and destination directory
PACKAGE_RELPATH = pdk_/packages
PACKAGE_ROOT = $(DEST_ROOT)/package/$(PACKAGE_SELECT)/$(PACKAGE_RELPATH)
export PACKAGE_RELPATH
export PACKAGE_ROOT

#
# Tools paths
#

# Cortex-A8
CODEGEN_PATH_A8 =

# DSP
CODEGEN_PATH_C674 = $(C6X_GEN_INSTALL_PATH)


# Commands commonly used within the make files
RM = $(UTILSPATH)rm -f
MV = $(UTILSPATH)mv
RMDIR = $(UTILSPATH)rm -rf
MKDIR = $(UTILSPATH)mkdir
ECHO = @$(UTILSPATH)echo
CAT	= $(UTILSPATH)cat

#emake provides detailed info for build analysis.
EMAKE = emake --emake-emulation=gmake --emake-gen-subbuild-db=1 --emake-annodetail=waiting

ifeq ($(OS),Windows_NT)
#if XDCTOOLS present use xdctools' gmake, else use the one available in the system
  ifneq ($(xdc_PATH),)
    MAKE = $(xdc_PATH)/gmake
  else
    MAKE = gmake
  endif
else
  MAKE = make
endif

EGREP = $(UTILSPATH)egrep
CP = $(UTILSPATH)cp
ifeq ($(OS),Windows_NT)
  CHMOD = $(UTILSPATH)echo
else
  CHMOD = $(UTILSPATH)chmod
endif

ifeq ($(BUILD_OS_TYPE),freertos)
  ifeq ($(SOC),$(filter $(SOC), am65xx j721e j7200 tpr12 awr294x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
       CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5_freertos.lds
    endif 
  endif
  ifeq ($(SOC),$(filter $(SOC), tpr12 awr294x))
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66_freertos.cmd
    endif
  endif
endif

ifeq ($(BUILD_OS_TYPE),baremetal)
  ifeq ($(SOC),$(filter $(SOC), am65xx j721e am77x j7200 am64x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
        CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5.lds
    endif
  endif
  ifeq ($(SOC),$(filter $(SOC), am65xx am64x))
    ifeq ($(CONFIG_BLD_XDC_a53),)
        CONFIG_BLD_LNK_a53   = $(pdk_PATH)/ti/build/$(SOC)/linker_a53.lds
    endif
  endif
  ifeq ($(SOC),$(filter $(SOC), am64x))
    ifeq ($(CONFIG_BLD_XDC_m4f),)
        CONFIG_BLD_LNK_m4f   = $(pdk_PATH)/ti/build/$(SOC)/linker_m4f.lds
    endif
  endif
  ifeq ($(SOC),$(filter $(SOC), j721e am77x j7200))
    ifeq ($(CONFIG_BLD_XDC_a72),)
        CONFIG_BLD_LNK_a72   = $(pdk_PATH)/ti/build/$(SOC)/linker_a72_mpu1_0.lds
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66.cmd
    endif
    ifeq ($(CONFIG_BLD_XDC_c7x),)
        CONFIG_BLD_LNK_c7x   = $(pdk_PATH)/ti/build/$(SOC)/linker_c7x.lds
    endif
  endif
  ifeq ($(SOC),$(filter $(SOC), tpr12 awr294x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
        CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5.lds
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66_baremetal.cmd
    endif
  endif
endif

ifeq ($(BUILD_OS_TYPE),tirtos)
  #
  # XDC specific ENV variables
  #
  # XDC Config.bld file (required for configuro); Derives from top-level pdk_PATH

  ifeq ($(SOC),$(filter $(SOC), tpr12 awr294x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
        CONFIG_BLD_XDC_r5f   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_r5f.bld
        CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5_sysbios.lds
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_XDC_c66   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_c66.bld
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66.cmd
    endif
  endif

  ifeq ($(SOC),tda2xx)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_c66.bld
    endif
  endif

  ifeq ($(SOC),tda2px)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_c66.bld
    endif
  endif

  ifeq ($(SOC),dra75x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2xx/config_tda2xx_c66.bld
    endif
  endif

  ifeq ($(SOC),tda2ex)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex_c66.bld
    endif
  endif

  ifeq ($(SOC),dra72x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda2ex/config_tda2ex_c66.bld
    endif
  endif

  ifeq ($(SOC),tda3xx)
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4   = $(pdk_PATH)/ti/build/tda3xx/config_tda3xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda3xx/config_tda3xx_c66.bld
    endif
  endif

  ifeq ($(SOC),dra78x)
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4   = $(pdk_PATH)/ti/build/tda3xx/config_tda3xx.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/tda3xx/config_tda3xx_c66.bld
    endif
  endif

  ifeq ($(SOC),am571x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/am571x/config_am571x_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/am571x/config_am571x.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/am571x/config_am571x_c66.bld
    endif
  endif

  ifeq ($(SOC),am572x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/am572x/config_am572x_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/am572x/config_am572x.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/am572x/config_am572x_c66.bld
    endif
  endif

  ifeq ($(SOC),am574x)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/am574x/config_am574x_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_m4),)
        CONFIG_BLD_XDC_m4     = $(pdk_PATH)/ti/build/am574x/config_am574x.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66     = $(pdk_PATH)/ti/build/am574x/config_am574x_c66.bld
    endif
  endif

  ifeq ($(SOC),am335x)
    ifeq ($(CONFIG_BLD_XDC_a8),)
     CONFIG_BLD_XDC_a8 = $(pdk_PATH)/ti/build/am335x/config_am335x_a8.bld
    endif
  endif

  ifeq ($(SOC),am437x)
    ifeq ($(CONFIG_BLD_XDC_a9),)
     CONFIG_BLD_XDC_a9 = $(pdk_PATH)/ti/build/am437x/config_am437x_a9.bld
    endif
  endif

  ifeq ($(SOC),k2g)
    ifeq ($(CONFIG_BLD_XDC_a15),)
     CONFIG_BLD_XDC_a15 = $(pdk_PATH)/ti/build/k2g/config_k2g_a15.bld
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
      CONFIG_BLD_XDC_c66 = $(pdk_PATH)/ti/build/k2g/config_k2g_c66.bld
    endif
  endif

#Used linker file

  ifeq ($(SOC),$(filter $(SOC), am65xx j721e am77x j7200 am64x))
    ifeq ($(CONFIG_BLD_XDC_r5f),)
        CONFIG_BLD_XDC_r5f   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_r5f.bld
       #CONFIG_BLD_LNK_r5f   = $(pdk_PATH)/ti/build/$(SOC)/linker_r5_sysbios.lds   
    
   ifeq ($(CORE), mcu1_0)

   CONFIG_BLD_LNK_r5f = /home/ketaki/Desktop/SBL_boot/linker_files/linker_r5f_mcu1_0_btcm_sysbios.lds
   endif 
    ifeq ($(CORE), mcu2_0)
    CONFIG_BLD_LNK_r5f = /home/ketaki/Desktop/SBL_boot/linker_files/linker_r5f_mcu2_0_btcm_sysbios.lds
   endif
    ifeq ($(CORE), mcu2_1)
    CONFIG_BLD_LNK_r5f = /home/ketaki/Desktop/SBL_boot/linker_files/linker_r5f_mcu2_1_btcm_sysbios.lds
   endif	
   endif
  endif

  ifeq ($(SOC),$(filter $(SOC), am65xx am64x))
    ifeq ($(CONFIG_BLD_XDC_a53),)
        CONFIG_BLD_XDC_a53   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_a53.bld
        CONFIG_BLD_LNK_a53   = $(pdk_PATH)/ti/build/$(SOC)/linker_a53.lds
    endif
  endif

  ifeq ($(SOC),$(filter $(SOC), j721e am77x j7200))
    ifeq ($(CONFIG_BLD_XDC_a72),)
        CONFIG_BLD_XDC_a72   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_a72.bld
        CONFIG_BLD_LNK_a72   = $(pdk_PATH)/ti/build/$(SOC)/linker_a72_mpu1_0.lds
    endif
    ifeq ($(CONFIG_BLD_XDC_c66),)
        CONFIG_BLD_XDC_c66   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_c66.bld
        CONFIG_BLD_LNK_c66   = $(pdk_PATH)/ti/build/$(SOC)/linker_c66.cmd
    endif
    ifeq ($(CONFIG_BLD_XDC_c7x),)
        CONFIG_BLD_XDC_c7x   = $(pdk_PATH)/ti/build/$(SOC)/config_$(SOC)_c7x.bld
        CONFIG_BLD_LNK_c7x   = $(pdk_PATH)/ti/build/$(SOC)/linker_c7x.lds
    endif
  endif

  XDCROOT = $(xdc_PATH)
  XDCTOOLS = $(xdc_PATH)
  BIOSROOT = $(bios_PATH)
  export XDCROOT
  export XDCTOOLS
  export BIOSROOT
endif

CGTOOLS = $(TOOLCHAIN_PATH_M4)
export CGTOOLS

CGTOOLS_DSP = $(CODEGEN_PATH_C674)
export CGTOOLS_DSP

CGTOOLS_A8 = $(TOOLCHAIN_PATH_A8)
export CGTOOLS_A8

CGTOOLS_A9 = $(TOOLCHAIN_PATH_A9)
export CGTOOLS_A9

CGTOOLS_ARM9 = $(TOOLCHAIN_PATH_Arm9)
export CGTOOLS_ARM9

CGTOOLS_A15 = $(TOOLCHAIN_PATH_A15)
export CGTOOLS_A15

CGTOOLS_EVE = $(TOOLCHAIN_PATH_EVE)
export CGTOOLS_EVE

export CGTOOLS_A53 = $(TOOLCHAIN_PATH_A53)
export CGTOOLS_A72 = $(TOOLCHAIN_PATH_A72)

STRIP470 = $(TOOLCHAIN_PATH_M4)/bin/strip470 -p
STRIP6x = $(CODEGEN_PATH_C674)/bin/strip6x -p
STRIP_ALL_ARM = $(CODEGEN_PREFIX)strip -s
STRIP_DEBUG_ARM = $(CODEGEN_PREFIX)strip --strip-debug

# Nothing beyond this point