DRA821U: xSPI boot mode setting for J7200XSOMXEVM

Hi,

Masaki Soga said:

• If you set the switch according to the document "5.1.3.5. xSPI Boot Mode (J7200 ES1.0 version)", is the access to OPSI done in Octal?
• Are BOOTMODEs 4 and 5 valid?

Yes,

Masaki Soga said:

Where is this OSPI access setting valid? SBL? SYSFW? User app?

I am not understanding the question here, can you please elaborate?

Regards,
Parth

Hi,

Parth Nagpal said:

masaki soga said:

Where is this OSPI access setting valid? SBL? SYSFW? User app?

I am not understanding the question here, can you please elaborate?

1. Who is reading the Bootmode settings and when?
2. When does the Bootmode setting take effect?
   Before loading the SBL? After loading the SBL?
3. How long is the Bootmode setting valid?

Hi Masaki,

Please refer to the section 4.2.3 Boot Process Flow of the TRM for details.

Regards,
Parth

Hi, Parth

Parth Nagpal said:

Please refer to the section 4.2.3 Boot Process Flow of the TRM for details.

Are you saying that the BOOTMODE pin is being read by the DMSC ROM?

I have a follow-up question

1. Is it correct that DMSC is reading OSPI Flash with SPI-STR/OCTAL-DTR according to BOOTMODE pin during xSPI operation?
2. Will DMSC still work if I change the OSPI Flash?

Hi Masaki,

What is your use case here? Can you please share a little more details on this?

Regards,
Parth

Hi, Parth

I am trying to create a new board using the DRA821U.
At that time, I'm thinking of booting from OSPI Flash.

The new board changes OSPI Flash.
I'm concerned that DMSC will work properly in this case.

I would like to boot from OSPI Flash as soon as possible.
At this time, we believe that it is optimal for DMSC to be able to read the SBL with Octal-DTR.
Will the Primary Boot Mode Config Pins 4 and 5 work if I change from the OSPI Flash S28HS512TGABHM010 installed in the EVM?
At least I don't think the 0xEE Read Command in Primary Boot Mode Config Pins 5 will work.
(Because 0xEE is a unique command of S28HS512TGABHM010)

I am asking because I do not know which command is used when DMSC reads with Octal-DTR.
Will the settings work effectively even if the OSPI Flash is changed?

Hi Masaki,

Please have a look at the FAQ https://e2e.ti.com/support/processors-group/processors/f/processors-forum/946418/faq-tda4vm-is-there-a-guide-to-choosing-the-right-ospi-flash-parts-that-are-supported-on-jacinto-7?

This should help with your queries.

Regards,
Parth

Hi Parth

I checked the URL you gave me.

> Requirements for the flash
> For a flash to be supported in Linux and U-Boot, the below requirements should be met:
Is it correct that this is the same when the DRA821U is started (DMSC ROM)?

Hi,

Masaki Soga said:

Will the Primary Boot Mode Config Pins 4 and 5 work if I change from the OSPI Flash S28HS512TGABHM010 installed in the EVM?
At least I don't think the 0xEE Read Command in Primary Boot Mode Config Pins 5 will work.

Please refer to the section 4.3.5 OSPI Boot Device Configuration and section 4.3.8 xSPI Boot Device Configuration. The J7200 evm comes with S28HS512TGABHM010 which is complaint with JEDEC xSPI standards so the boot mode config settings described in documentations corresponds to section 4.3.8. Now if you are planning to use any other flash which is not complaint with xSPI standards you need to use the boot mode setting according to the section 4.3.5.

Regards,
Parth

Hi, Parth

Is there any problem as long as it supports JEDEC Standard xSPI (eXpanded SPI)?

Hi Masaki,

No I don't think there should be any problem

Regards,
Parth

Hi, Parth

please let me check again

>>Octal SPI flash memories support various protocols, and the OSPI boot mode of the device only supports a
>>specific protocol defined below.
>>JESD251 and JESD216D, refer to Section 4.3.8.

Not compliant with JESD251 and JESD216D?