IPC uses HW mailboxes. Which ones are used, and which ones are still available ?
Hello,
J7 platforms have 12 HW mailbox instances. i.e 12x 16 HW mailbox queues.
Hardware mailbox is primarily used to provide an interrupt event notification with a small 32-bit payload.Each mailbox consists of 16 uni-directional HW queue interfacing with max 4 communication users.
Total Number of Processors = 12 (6 R5Fs + 3 DSPs + 2 MPU A72 cores and an optional second C7x).
There are not enough interrupts among all different clusters (12 * 4 = 48) to separate the interrupts between a pair of processors (12 * 11 / 2 = 66).
The Mailbox FIFOs themselves are enough. We have 192 (12 * 16 ) FIFOS and we only need 132 ((12 * 11) for duplex communication.
All RTOS uses only 1 interrupt for Rx, and no interrupt for Tx(indicates "-1"). An RTOS processor requires 11 other Rx queues.
Linux Mailbox core framework requires interrupts for Tx as well to run the Tx state machine, so as such the two FIFOs for Rx and Tx to a remote processor has to use 2 FIFOS with 2 user interrupts for each processor.
A User Interrupt on Linux is multiplexed for both Rx and Tx to a particular processor.
Clusters 0 to 4 are dedicated for communication with hosts running Linux on A72_VM0 and optionally A72_VM1. 5 Clusters for 10 other non-A72 processors.
| A72-vm0 | main-r5f0 | main-r5f1 | main-r5f2 | main-r5f3 | mcu-r5f0 | mcu-r5f1 | c66x0 | c66x1 | C7x-0 | A72-vm1 | C7x-1 | |
| A72-vm0 | RX -> c1, u0, q0 TX -> c1, u0, q1 |
RX -> c1, u0, q2 TX -> c1, u0, q3 |
RX -> c2, u0, q0 TX -> c2, u0, q1 |
RX -> c2, u0, q2 TX -> c2, u0, q3 |
RX -> c0, u0, q0 TX -> c0, u0, q1 |
RX -> c0, u0, q2 TX -> c0, u0, q3 |
RX -> c3, u0, q0 TX -> c3, u0, q1 |
RX -> c3, u0, q2 TX -> c3, u0, q3 |
RX -> c4, u0, q0 TX -> c4, u0, q1 |
RX -> c0, u0, q10 TX -> c0, u0, q11 |
RX -> c4, u0, q2 TX -> c4, u0, q3 |
|
| main-r5f0 | RX -> c1, u1, q1 TX -> c1, u1, q0 |
RX -> c1, u1, q4 TX -> c1, u1, q5 |
RX -> c5, u0, q0 TX -> c6, -1, q0 |
RX -> c5, u0, q1 TX -> c6, -1, q8 |
RX -> c5, u0, q2 TX -> c7, -1, q0 |
RX -> c5, u0, q3 TX -> c7, -1, q8 |
RX -> c5, u1, q4 TX -> c8, -1, q0 |
RX -> c5, u1, q5 TX -> c8, -1, q8 |
RX -> c5, u1, q6 TX -> c9, -1, q0 |
RX -> c1, u1, q7 TX -> c1, u1, q6 |
RX -> c5, u1, q7 TX -> c9, -1, q8 |
|
| main-r5f1 | RX -> c1, u2, q3 TX -> c1, u2, q2 |
RX -> c1, u2, q5 TX -> c1, u2, q4 |
RX -> c5, u2, q8 TX -> c6, -1, q1 |
RX -> c5, u2, q9 TX -> c6, -1, q9 |
RX -> c5, u2, q10 TX -> c7, -1, q1 |
RX -> c5, u2, q11 TX -> c7, -1, q9 |
RX -> c5, u3, q12 TX -> c8, -1, q1 |
RX -> c5, u3, q13 TX -> c8, -1, q9 |
RX -> c5, u3, q14 TX -> c9, -1, q1 |
RX -> c1, u2, q9 TX -> c1, u2, q8 |
RX -> c5, u3, q15 TX -> c9, -1, q9 |
|
| main-r5f2 | RX -> c2, u1, q1 TX -> c2, u1, q0 |
RX -> c6, u0, q0 TX -> c5, -1, q0 |
RX -> c6, u0, q1 TX -> c5, -1, q8 |
RX -> c2, u1, q4 TX -> c2, u1, q5 |
RX -> c6, u0, q2 TX -> c7, -1, q2 |
RX -> c6, u0, q3 TX -> c7, -1, q10 |
RX -> c6, u1, q4 TX -> c8, -1, q2 |
RX -> c6, u1, q5 TX -> c8, -1, q10 |
RX -> c6, u1, q6 TX -> c9, -1, q2 |
RX -> c2, u1, q7 TX -> c2, u1, q6 |
RX -> c6, u1, q7 TX -> c9, -1, q10 |
|
| main-r5f3 | RX -> c2, u2, q3 TX -> c2, u2, q2 |
RX -> c6, u2, q8 TX -> c5, -1, q1 |
RX -> c6, u2, q9 TX -> c5, -1, q9 |
RX -> c2, u2, q5 TX -> c2, u2, q4 |
RX -> c6, u2, q10 TX -> c7, -1, q3 |
RX -> c6, u2, q11 TX -> c7, -1, q11 |
RX -> c6, u3, q12 TX -> c8, -1, q3 |
RX -> c6, u3, q13 TX -> c8, -1, q11 |
RX -> c6, u3, q14 TX -> c9, -1, q3 |
RX -> c2, u2, q9 TX -> c2, u2, q8 |
RX -> c6, u3, q15 TX -> c9, -1, q11 |
|
| mcu-r5f0 | RX -> c0, u1, q1 TX -> c0, u1, q0 |
RX -> c7, u0, q0 TX -> c5, -1, q2 |
RX -> c7, u0, q1 TX -> c5, -1, q10 |
RX -> c7, u0, q2 TX -> c6, -1, q2 |
RX -> c7, u0, q3 TX -> c6, -1, q10 |
RX -> c0, u1, q4 TX -> c0, u1, q5 |
RX -> c7, u1, q4 TX -> c8, -1, q4 |
RX -> c7, u1, q5 TX -> c8, -1, q12 |
RX -> c7, u1, q6 TX -> c9, -1, q4 |
RX -> c0, u1, q7 TX -> c0, u1, q6 |
RX -> c7, u1, q7 TX -> c9, -1, q12 |
|
| mcu-r5f1 | RX -> c0, u2, q3 TX -> c0, u2, q2 |
RX -> c7, u2, q8 TX -> c5, -1, q3 |
RX -> c7, u2, q9 TX -> c5, -1, q11 |
RX -> c7, u2, q10 TX -> c6, -1, q3 |
RX -> c7, u2, q11 TX -> c6, -1, q11 |
RX -> c0, u2, q5 TX -> c0, u2, q4 |
RX -> c7, u3, q12 TX -> c8, -1, q5 |
RX -> c7, u3, q13 TX -> c8, -1, q13 |
RX -> c7, u3, q14 TX -> c9, -1, q5 |
RX -> c0, u2, q9 TX -> c0, u2, q8 |
RX -> c7, u3, q15 TX -> c9, -1, q13 |
|
| C66x-0 | RX -> c3, u1, q1 TX -> c3, u1, q0 |
RX -> c8, u0, q0 TX -> c5, -1, q4 |
RX -> c8, u0, q1 TX -> c5, -1, q12 |
RX -> c8, u0, q2 TX -> c6, -1, q4 |
RX -> c8, u0, q3 TX -> c6, -1, q12 |
RX -> c8, u1, q4 TX -> c7, -1, q4 |
RX -> c8, u1, q5 TX -> c7, -1, q12 |
RX -> c3, u1, q4 TX -> c3, u1, q5 |
RX -> c8, u1, q6 TX -> c9, -1, q6 |
RX -> c3, u1, q7 TX -> c3, u1, q6 |
RX -> c8, u1, q7 TX -> c9, -1, q14 |
|
| C66x-1 | RX -> c3, u2, q3 TX -> c3, u2, q2 |
RX -> c8, u2, q8 TX -> c5, -1, q5 |
RX -> c8, u2, q9 TX -> c5, -1, q13 |
RX -> c8, u2, q10 TX -> c6, -1, q5 |
RX -> c8, u2, q11 TX -> c6, -1, q13 |
RX -> c8, u3, q12 TX -> c7, -1, q5 |
RX -> c8, u3, q13 TX -> c7, -1, q13 |
RX -> c3, u2, q5 TX -> c3, u2, q4 |
RX -> c8, u3, q14 TX -> c9, -1, q7 |
RX -> c3, u2, q9 TX -> c3, u2, q8 |
RX -> c8, u3, q15 TX -> c9, -1, q15 |
|
| C7x-0 | RX -> c4, u1, q1 TX -> c4, u1, q0 |
RX -> c9, u0, q0 TX -> c5, -1, q6 |
RX -> c9, u0, q1 TX -> c5, -1, q14 |
RX -> c9, u0, q2 TX -> c6, -1, q6 |
RX -> c9, u0, q3 TX -> c6, -1, q14 |
RX -> c9, u1, q4 TX -> c7, -1, q6 |
RX -> c9, u1, q5 TX -> c7, -1, q14 |
RX -> c9, u1, q6 TX -> c8, -1, q6 |
RX -> c9, u1, q7 TX -> c8, -1, q14 |
RX -> c4, u1, q7 TX -> c4, u1, q6 |
RX -> c4, u1, q4 TX -> c4, u1, q5 |
|
| A72-vm1 | RX -> c0, u3, q11 TX -> c0, u3, q10 |
RX -> c1, u3, q6 TX -> c1, u3, q7 |
RX -> c1, u3, q8 TX -> c1, u3, q9 |
RX -> c2, u3, q6 TX -> c2, u3, q7 |
RX -> c2, u3, q8 TX -> c2, u3, q9 |
RX -> c0, u3, q6 TX -> c0, u3, q7 |
RX -> c0, u3, q8 TX -> c0, u3, q9 |
RX -> c3, u3, q6 TX -> c3, u3, q7 |
RX -> c3, u3, q8 TX -> c3, u3, q9 |
RX -> c4, u3, q6 TX -> c4, u3, q7 |
RX -> c4, u3, q8 TX -> c4, u3, q9 |
|
| C7x-1 | RX -> c4, u2, q3 TX -> c4, u2, q2 |
RX -> c9, u2, q8 TX -> c5, -1, q7 |
RX -> c9, u2, q9 TX -> c5, -1, q15 |
RX -> c9, u2, q10 TX -> c6, -1, q7 |
RX -> c9, u2, q11 TX -> c6, -1, q15 |
RX -> c9, u3, q12 TX -> c7, -1, q7 |
RX -> c9, u3, q13 TX -> c7, -1, q15 |
RX -> c9, u3, q14 TX -> c8, -1, q7 |
RX -> c9, u3, q15 TX -> c8, -1, q15 |
RX -> c4, u2, q5 TX -> c4, u2, q4 |
RX -> c4, u2, q9 TX -> c4, u2, q8 |
Example:RX -> c1, u1, q1 stands for Rx interrupt cluster 1 User1 and Q1 Mailbox Queue
We have 2 free Clusters, Cluster 10 and 11 for any new additions.
Regards
Tarun Mukesh
