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TDA4AL-Q1: Regarding MCU SPI slave mode configuration issues

Part Number: TDA4AL-Q1

Dear Experts,

I am looking to configure MCU SPI0 and MCU SPI1 in Slave Mode for communication with other master control devices.

I have already added mcu_spi0 and mcu_spi1 with the "spi-slave" setting in the device tree source (DTS) file.

From the documentation, I understand that enabling DMA is required for using SPI Slave mode.

I have attempted to consult the PSI-L table but am unsure about which set to configure.

Could you please provide the comprehensive configuration method for MCU_SPI0 and MCU_SPI1 when set as slaves?

Thank you for your time and assistance. I am eagerly anticipating your expert advice.

This is our dtsi setting:

&mcu_spi1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcu_spi1_pins_default>;
	spi-slave;
	#address-cells = <0>;
	dmas = <&mcu_udmap 0xf200>, <&mcu_udmap 0x7200>;
	dma-names = "tx0", "rx0";

	slave {
		spi-max-frequency = <24000000>;
		compatible = "rohm,dh2228fv";
	};
};

Best regards,

  • Hello,

    Which SDK version are you using ?

    Regards

    Tarun Mukesh

  • Hi,

    The Linux SDK version we used is  08.06.01.02.

    Please help it.

    Thanks.

  • Hi,

    I have already added mcu_spi0 and mcu_spi1 with the "spi-slave" setting in the device tree source (DTS) file.

    • Are you using TI EVM or a custom board?
    • Which is the master?
    • Also there is an app note: https://www.ti.com/lit/pdf/sprad26
      That describes the procedure for Linux SPI slave tested on EVM board.

    - Keerthy

  • Hi Keerthy,

    We are using a custom board. TDA4 connects 2 SPIs (mcu_spi0 and mcu_spi1) with another SoC, TDA4 is the slave.

    My question is, could mcu_spi0 and mcu_spi1 allow tda4 to be set as slave?

    How to set it?

    The document says:

    • SPI slave mode is supported only with DMA enabled.

    The second question is, how to find the dma tx/rx id of mcu_spi0 and mcu_spi1 ?

    Regards

    Luc

  • Hi Luc,

    So MCU_MCSPI1 we need to make sure that on custom board the pins are brought out to connect as slave.

    mcu_spi0

    It is possible to connect it as slave.

    The second question is, how to find the dma tx/rx id of mcu_spi0 and mcu_spi1 ?

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/dma/ti/k3-psil-j721s2.c?h=linux-6.1.y

    So your code:

    dmas = <&mcu_udmap 0xf200>, <&mcu_udmap 0x7200>;
    dma-names = "tx0", "rx0";

    This looks correct for MCU_MCSPI1.

    You will need to correctly configure the pinmux as well. Refer the app note:

    Also there is an app note: https://www.ti.com/lit/pdf/sprad26

    You will need to set pinmux correctly based on your board.

    - Keerthy

  • Luc is my customer.

    Additional suggestion, check correct pinmux mode , address as below.

    example, MCU_SPI1,

    0x4301C0C0

    0x4301C0C4

    0x4301C0C8

    0x4301C0CC (cs0)

  • Hi,

    I have modified dtsi as below:

    &mcu_spi1 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_spi1_pins_default>;
    	spi-slave;
    	dmas = <&mcu_udmap 0xf200>, <&mcu_udmap 0x7200>;
    	dma-names = "tx0", "rx0";
    
    	slave@0 {
    		spi-max-frequency = <24000000>;
    		reg = <0>;
    		compatible = "rohm,dh2228fv";
    	};
    };
    
    &wkup_pmx0 {
    	mcu_spi1_pins_default: mcu-spi1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (D26) MCU_SPI1_CLK */
    			J721S2_WKUP_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (C27) MCU_SPI1_CS0 */
    			J721S2_WKUP_IOPAD(0x0c4, PIN_INPUT, 0) /* (E24) MCU_SPI1_D0 */
    			J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 0) /* (C28) MCU_SPI1_D1 */
    		>;
    	};
    };
    

    And added the UDMA of PSIL for MCU_SPI1 in k3-psil-j721s2.c:

    When I run spidev_test, it would stuck and cannot leave with [Ctrl+c].

    Could you please help to check whether my modifications are correct or not ?

    Thanks.

  • Hi,

    Please make all pins as input and try:

    mcu_spi1_pins_default: mcu-spi1-pins-default {
    pinctrl-single,pins = <
    J721S2_WKUP_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (D26) MCU_SPI1_CLK */
    J721S2_WKUP_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (C27) MCU_SPI1_CS0 */
    J721S2_WKUP_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (E24) MCU_SPI1_D0 */
    J721S2_WKUP_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (C28) MCU_SPI1_D1 */
    >;

    - Keerthy

  • Hi, Keerthy:

    I modified all pins as input or output, and the symptom is not improved.

    The spidev_test command still stuck and cannot exit with [Ctrl+C].

    Thanks.

  • Hi,

    Apologies. I mean:

    &wkup_pmx0 {
    	mcu_spi1_pins_default: mcu-spi1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 0) /* (D26) MCU_SPI1_CLK */
    			J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (C27) MCU_SPI1_CS0 */
    			J721S2_WKUP_IOPAD(0x0c4, PIN_INPUT, 0) /* (E24) MCU_SPI1_D0 */
    			J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 0) /* (C28) MCU_SPI1_D1 */
    		>;
    	};
    };

    Can you probe the clock signal? Are you getting the SPI_CLK?

    Are you trying this on TI EVM or a custom board?

    - Keerthy

  • Hi, Keerthy:

    1. We used custom board, not TI EVM.

    2. I measured the MCU_SPI1_CS0, MCU_SPI1_CLK and MCU_SPI1_D0. Please refer to below pictures.

    The spidev_test still stuck and cannot exit with [Ctrl+C].

    I added some debug message and from the log, it stuck in wait_for_completion_interruptible() when calling omap2_mcspi_rx_dma().

    root@j721s2-evm:~# ./spidev_test -D /dev/spidev3.0 -v -s 1000000 -p "12345678" -H
    [  136.028132] spidev spi3.0: speed_hz = 48000000
    [  136.032586] spidev spi3.0: omap2_mcspi_setup_transfer 2
    [  136.037814] spidev spi3.0: setup: speed 48000000, sample trailing edge, clk normal
    [  136.045394] spidev spi3.0: speed_hz = 48000000
    [  136.049832] spidev spi3.0: omap2_mcspi_setup_transfer 2
    [  136.055051] spidev spi3.0: setup: speed 48000000, sample trailing edge, clk normal
    [  136.062612] spidev spi3.0: speed_hz = 1000000
    [  136.066962] spidev spi3.0: omap2_mcspi_setup_transfer 2
    [  136.072179] spidev spi3.0: setup: speed 1000000, sample trailing edge, clk normal
    spi mode: 0x1
    bits per word: 8
    [  136.079838] omap2_mcspi_can_dma
    max speed: 1000000 Hz (1000 kHz)
    [  136.085826] omap2_mcspi_transfer_one
    [  136.092309] spidev spi3.0: speed_hz = 1000000
    [  136.096657] spidev spi3.0: omap2_mcspi_setup_transfer 2
    [  136.101876] spidev spi3.0: setup: speed 1000000, sample trailing edge, clk normal
    [  136.109345] omap2_mcspi_can_dma
    [  136.112473] omap2_mcspi_can_dma
    [  136.115607] omap2_mcspi_txrx_dma
    [  136.118848] omap2_mcspi_rx_dma
    [  136.121914] mcspi_wait_for_completion enter
    [  136.126090] mcspi_wait_for_completion, slave
    

     

    Please help us to clarify this issue.

    Thanks.

  • Hi,

    The same is true for the mcu_spi0 as well?

    Did you try that one as well?

    Best Regards,

    Keerthy 

  • Hi, Keerthy:

    1. Yes, I got the same result for the mcu_spi0 when configuring it as slave.

    But when mcu_spi0 was configured as master, it can work well.

    2. The dtsi configurations of mcu_spi1 were as below:

    &mcu_spi1 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_spi1_pins_default>;
    	spi-slave;
    	dmas = <&mcu_udmap 0xf200>, <&mcu_udmap 0x7200>;
    	dma-names = "tx0", "rx0";
    
    	slave@0 {
    		spi-max-frequency = <24000000>;
    		reg = <0>;
    		compatible = "rohm,dh2228fv";
    	};
    };
    
    &wkup_pmx0 {
    	mcu_spi1_pins_default: mcu-spi1-pins-default {
    		pinctrl-single,pins = <
    			J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 0) /* (D26) MCU_SPI1_CLK */
    			J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (C27) MCU_SPI1_CS0 */
    			J721S2_WKUP_IOPAD(0x0c4, PIN_INPUT, 0) /* (E24) MCU_SPI1_D0 */
    			J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 0) /* (C28) MCU_SPI1_D1 */
    		>;
    	};
    };
    

    3. I run devmen2 command to read the values for MCU_SPI1_CLK/MCU_SPI1_CS0/MCU_SPI1_D0/MCU_SPI1_D1.

    root@j721s2-evm:~# devmem2 0x4301c0c0
    /dev/mem opened.
    Memory mapped at address 0xffff802c3000.
    Read at address  0x4301C0C0 (0xffff802c30c0): 0x00050000
    
    root@j721s2-evm:~# devmem2 0x4301c0cc
    /dev/mem opened.
    Memory mapped at address 0xffff88220000.
    Read at address  0x4301C0CC (0xffff882200cc): 0x00050000
    
    root@j721s2-evm:~# devmem2 0x4301c0c4
    /dev/mem opened.
    Memory mapped at address 0xffff8b9e5000.
    Read at address  0x4301C0C4 (0xffff8b9e50c4): 0x00050000
    
    root@j721s2-evm:~# devmem2 0x4301c0c8
    /dev/mem opened.
    Memory mapped at address 0xffff9407f000.
    Read at address  0x4301C0C8 (0xffff9407f0c8): 0x00050000
    

    4. For the mcu_spi1, the device node is spi3.0 in Linux.

    root@j721s2-evm:~# ls -al /sys/class/spi*
    /sys/class/spi_master:
    total 0
    drwxr-xr-x  2 root root 0 Oct 20 05:26 .
    drwxr-xr-x 69 root root 0 Oct 20 05:26 ..
    lrwxrwxrwx  1 root root 0 Oct 20 05:26 spi0 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/47000000.syscon/47040000.spi/spi_master/spi0
    lrwxrwxrwx  1 root root 0 Oct 20 05:26 spi1 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/47000000.syscon/47050000.spi/spi_master/spi1
    
    /sys/class/spi_slave:
    total 0
    drwxr-xr-x  2 root root 0 Oct 20 05:26 .
    drwxr-xr-x 69 root root 0 Oct 20 05:26 ..
    lrwxrwxrwx  1 root root 0 Oct 20 05:26 spi2 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/40300000.spi/spi_slave/spi2
    lrwxrwxrwx  1 root root 0 Oct 20 05:26 spi3 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/40310000.spi/spi_slave/spi3
    
    /sys/class/spidev:
    total 0
    drwxr-xr-x  2 root root 0 Oct 20 05:26 .
    drwxr-xr-x 69 root root 0 Oct 20 05:26 ..
    lrwxrwxrwx  1 root root 0 Oct 20 05:26 spidev2.0 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/40300000.spi/spi_slave/spi2/spi2.0/spidev/spidev2.0
    lrwxrwxrwx  1 root root 0 Oct 20 05:26 spidev3.0 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/40310000.spi/spi_slave/spi3/spi3.0/spidev/spidev3.0

    	mcu_spi0: spi@40300000 {
    		compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
    		reg = <0x00 0x040300000 0x00 0x400>;
    		interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		power-domains = <&k3_pds 347 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 347 0>;
    	};
    
    	mcu_spi1: spi@40310000 {
    		compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
    		reg = <0x00 0x040310000 0x00 0x400>;
    		interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>;
    		#address-cells = <1>;
    		#size-cells = <0>;
    		power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
    		clocks = <&k3_clks 348 0>;
    	};
    

    5. I cannot configured mcu_spi1 to master to test because of the device connecting with mcu_spi1 is master mode only.

    Thanks.

  • Hi, Keerthy

    Already discussion with customer, lets' me summarize discussion (MCU_SPI1).

    Check 1 :  Find something different in PADCONFIG

    Pin define 

    D26, MCU_SPI1_CLK -> 0x4301C0C0 , (WKUP_PADCONFIG_48)

    E24, MCU_SPI1_D0 -> 0x4301C0C4 , (WKUP_PADCONFIG_49)

    C28, MCU_SPI1_D1 -> 0x4301C0C8 , (WKUP_PADCONFIG_50)

    C27, MCU_SPI1_CS0 -> 0x4301C0CC , (WKUP_PADCONFIG_51)

    So we try to dump register setting as below.

    root@j721s2-evm:~# devmem2 0x4301c0c4
    /dev/mem opened.
    Memory mapped at address 0xffff8b9e5000.
    Read at address 0x4301C0C4 (0xffff8b9e50c4): 0x00050000
    
    root@j721s2-evm:~# devmem2 0x4301c0c0
    /dev/mem opened.
    Memory mapped at address 0xffff802c3000.
    Read at address 0x4301C0C0 (0xffff802c30c0): 0x00050000
    
    root@j721s2-evm:~# devmem2 0x4301c0c8
    /dev/mem opened.
    Memory mapped at address 0xffff9407f000.
    Read at address 0x4301C0C8 (0xffff9407f0c8): 0x00050000
    
    root@j721s2-evm:~# devmem2 0x4301c0cc
    /dev/mem opened.
    Memory mapped at address 0xffff88220000.
    Read at address 0x4301C0CC (0xffff882200cc): 0x00050000

    Pin mode is correct for D26, E24, C28, C27, but one of "PADCONFIG5x_RXACTIVE" (bit 18)  for  MCU_SPI1_D0 or MCU_SPI1_D1 should be wrong

    for example, if we let MCU_SPI1_D0 as MISO, the return value should be 0x00010000

    Do you agree? 

    Check 2 : Check Hardware & Schematic

    We let MCU_SPI1 or MCU_SPI0 works as master mode, it's ok. 

    so I think it is not hardware issue, the only problem is why MCU_SPI1 does not work in "slaver mode"?

    Check 3: How do we make sure MCU_SPIx working mode

    As title description, How do we make sure MCU_SPI1 or MCU_SPI0 works in slaver mode?

    Dump register is fine, need your suggestion.

    Check 4: Already check MCU_SPI1 address

    I think device node is correct, log message as below.

    modprobe spidev
    root@j721s2-evm:~# ls -al /sys/class/spi*
    /sys/class/spi_master:
    total 0
    drwxr-xr-x 2 root root 0 Oct 20 05:26 .
    drwxr-xr-x 69 root root 0 Oct 20 05:26 ..
    lrwxrwxrwx 1 root root 0 Oct 20 05:26 spi0 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/47000000.syscon/47040000.s
    lrwxrwxrwx 1 root root 0 Oct 20 05:26 spi1 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/47000000.syscon/47050000.s
    /sys/class/spi_slave:
    total 0
    drwxr-xr-x 2 root root 0 Oct 20 05:26 .
    drwxr-xr-x 69 root root 0 Oct 20 05:26 ..
    lrwxrwxrwx 1 root root 0 Oct 20 05:26 spi2 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/40300000.spi/spi_slave/spi
    lrwxrwxrwx 1 root root 0 Oct 20 05:26 spi3 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/40310000.spi/spi_slave/spi
    
    /sys/class/spidev:
    total 0
    drwxr-xr-x 2 root root 0 Oct 20 05:26 .
    drwxr-xr-x 69 root root 0 Oct 20 05:26 ..
    lrwxrwxrwx 1 root root 0 Oct 20 05:26 spidev2.0 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/40300000.spi/spi_slav
    lrwxrwxrwx 1 root root 0 Oct 20 05:26 spidev3.0 -> ../../devices/platform/bus@100000/bus@100000:bus@28380000/40310000.spi/spi_slav

    Mapping

    mcu_spi0: spi@40300000 {
    compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
    reg = <0x00 0x040300000 0x00 0x400>;
    interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
    #address-cells = <1>;
    #size-cells = <0>;
    power-domains = <&k3_pds 347 TI_SCI_PD_EXCLUSIVE>;
    clocks = <&k3_clks 347 0>;
    };
    mcu_spi1: spi@40310000 {
    compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
    reg = <0x00 0x040310000 0x00 0x400>;
    interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>;
    #address-cells = <1>;
    #size-cells = <0>;
    power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
    clocks = <&k3_clks 348 0>;
    };

    Check 5: Need check UDMA value

    dmas = <&mcu_udmap 0xf200>, <&mcu_udmap 0x7200>;
    dma-names = "tx0", "rx0";

    Why mcu_udmap = 0xf200?

    &mcu_spi1 {
    	status = "okay";
    	pinctrl-names = "default";
    	pinctrl-0 = <&mcu_spi1_pins_default>;
    	spi-slave;
    	dmas = <&mcu_udmap 0xf200>, <&mcu_udmap 0x7200>;
    	dma-names = "tx0", "rx0";
    
    	slave@0 {
    		spi-max-frequency = <24000000>;
    		reg = <0>;
    		compatible = "rohm,dh2228fv";
    	};
    };

    Many Thanks

    Gibbs

  • Pin mode is correct for D26, E24, C28, C27, but one of "PADCONFIG5x_RXACTIVE" (bit 18)  for  MCU_SPI1_D0 or MCU_SPI1_D1 should be wrong

    for example, if we let MCU_SPI1_D0 as MISO, the return value should be 0x00010000

    Should be okay. RX_ACTIVE can be for both.

    There are some default connections.

    Please take a look at the post here: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1276068/tda4vh-q1-j784s4xg01evm-internal-spi/4839600#4839600

    We will need to configure some more bits for MCU_MCSPI1 for external use. Let me know if that helps.

    - Keerthy

  • Thanks Keerthy,

    I will track customer's feed back.

    Let's me make a conclusion, If you want to use MCU_SPI1 or MCU_SPI0 for slaver mode, you need :

    1) Follow previous discussion, check "pad config mode"  setting, it should be mode 0

    2) MCU_SPI1 "internal connect" to main domain MCPSI3 by default, so you need to set external pad pinout, check as below

    (This check just for MCU_SPI1 only)

    * MCU_SPI1_CTRL[SPI1_LINKDIS] --> 40F0 4060h, bit 0 = 1;

    * MCU_SPI1_CLKSEL[MSTR_LB_CLKSEL]  --> 4300 8114h, bit 16 = 1

    * SPI3_CLKSEL[MSTR_LB_CLKSEL]  --> 0010 819Ch, bit 16 = 1

    * MCSPI_MODULCTRL --> 4031 0128h, bit 2 = 0

    3) Check Reg MCSPI_MODULCTRL bit 2, it tells you setting in Master/Slaver mode

    4) Check Reg MCSPI_SYST bit8~10, it sets D0 or D1 data direction. (MOSI/MISO)

    5) Check Reg MCSPI_CH0CONF  --> Assume CH0 only

    6) Check Reg MCSPI_CH0CTRL

    7) Check Reg MCSPI_TX0 --> TX data buffer

    8) Check Reg MCSPI_RX0 --> RX data buffer

    9) Check Reg MCSPI_CH1CONF

    Gibbs

  • Hi, Gibbs:

    I set the 0x40f04060 to 0x1 and MCU_SPI1 can receive data from the connected Master.

    But for other registers, they seems don't meet the settings.

    * MCU_SPI1_CLKSEL[MSTR_LB_CLKSEL]  --> 4300 8114h, bit 16 = 1

    * SPI3_CLKSEL[MSTR_LB_CLKSEL]  --> 0010 819Ch, bit 16 = 1

    * MCSPI_MODULCTRL --> 4031 0128h, bit 2 = 0

    Should we need to configure them to meet your descriptions ?

    Thanks.

  • Hi, Keerthy:

    Yes, the link helped.

    I referred the example code of mcusw to disconnect the connectivity of MCU_MCSPI1 and MCSPI3 by setting 0x40f04060.

    >> mcusw/mcal_drv/mcal/examples/Spi/mcspi_app/soc/j721s2/mcu1_0/McspiApp_Startup.c

    But now, we got another issue for receiving message.

    We can got correct message for previous nine times, after ten, the message would corrupt.

    We would like to know whether other registers need to be configured or not.

    Thanks.

  • Hello,

    Regarding the disconnect of MCU_MCSPI1 and MCSPI3 whatever register you changed is sufficient.

    You can also see this in another E2E answered

     https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1299960/sk-tda4vm-mcspi3-spi3_d1/4935867?tisearch=e2e-sitesearch&keymatch=MCU_SPI1_CLKSEL#4935867 

    But what caused your problem can be a different issue but not related to this configuration one.I request you to Please raise another E2E if you have problem and it persists as this E2E description is completely different.

    Regards

    Tarun Mukesh