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Original question:

AM6442: Operating Frequency on Tap mode of OSPI

AM6442: Training for Timing Adjustment on OSPI SDR in PHY mode

Hideaki Matsumoto
Expert 8750 points
Part Number: AM6442

Hi,

Since OSPI has to be operated at SDR 50MHz or less in the case of Tap mode according to the answer at the following thread, the customer modified the software to use the PHY mode with SDR 100MHz.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1306988/am6442-operating-frequency-on-tap-mode-of-ospi/4966207#4966207

Could you tell them more about the following?

Q1:  When using SDR in PHY mode, is the training mandatory required for timing adjustment?

Q2:  Is it possible to adjust(fix) the delay values of Tx and Rx by manual(setting registers) to align the phase of CLK and data without training?

Q3:  If training is always required, when would it be performed ?

(Is there a possibility that training will be automatically performed by temperature change other than at startup?)

Q4:  What is the difference between an internal PHY loopback and an internal pad loopback ?

 

Thanks and regards,

Hideaki

  • 0
    TI__Guru**** 168594 points

    Hello Hideaki

    Thank you for the query.

    I am assigning to the expert.

     

    Hideaki Matsumoto said:

    Q4:  What is the difference between an internal PHY loopback and an internal pad loopback ?

     

    It's subtle, but "Internal Loopback" and "Internal Pad Loopback" are two different clocking modes. Internal Loopback just uses the internal reference clock to sample data, where as the Internal Pad Loopback option will route a loopback clock directly into DQS/LBCLK to be used as a slightly shifted sampling clock. If there was a trace hooked while using Internal Pad Loopback this may cause signal integrity issues, as while the routing may not go out of the chip it will go through some circuitry that can be potentially affected by a trace on the LBCLK pin.

    Regards,

    Sreenivasa

  • +1 in reply to Kallikuppa Sreenivasa
    TI__Expert 4445 points

    Greetings Hideaki,

    Q1: Yes, mandatory because this is the simplest method to ensure timing correctness when adjusting. 

    Q2: No, a given TX and RX delay value is not guaranteed to work across all parts (SoC and flash). For robust operation, training is required.

    Q3: Usually customers train in their SBL and then use the IP as intended for their usecase. You will need to check with the software team for what is done in the SDK, but I do not believe anything is done automatically outside of startup.

    Q4: See Sreenivasa's answer above.

    Sincerely,

    Lucas