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TDA4VH-Q1: safe shutdown

Shine
Genius 13655 points
Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH, TDA4VM

Hello Champs,

1. what is the direct instruction for SOC to safely power down (ie, something like echo 1>/proc/path/to/safe_shutdown_interface)?

2. After the SOC core or SOC domain is safely powered down, the code on the SOC domain is no longer able to run. At this point, how does the MCU domain know if the SOC domain has been safely powered off?

3. Customer wants to now whether Linux/rtos runs on a hypervisor or directly on bare hardware in the TDA4VH-Q1 system architecture.

Is there a ready-made document that can clearly explain this argument，or could you please provide an architecture document for this argument?

Thanks
Regards
Shine

  • 0
    TI__Guru* 77014 points

    Hi Shine

    Shine said:
    1. what is the direct instruction for SOC to safely power down (ie, something like echo 1>/proc/path/to/safe_shutdown_interface)?

    SoC low power modes like MCU only mode, Suspend to RAM etc. are not supported in the SDK today for TDA4VH.

    Remoteproc shutdown and restart is supported from Linux remoteproc driver but the firmwares today are not supporting this.

    Is the intent for this going to a lower power state and then coming back to full functionality upon a wakeup?

    Shine said:
    2. After the SOC core or SOC domain is safely powered down, the code on the SOC domain is no longer able to run. At this point, how does the MCU domain know if the SOC domain has been safely powered off?

    There are Sciclient APIs which help here, but again as I mentioned the SDK today doesn't support the SoC low power modes.

    Shine said:
    3. Customer wants to now whether Linux/rtos runs on a hypervisor or directly on bare hardware in the TDA4VH-Q1 system architecture.

    The TDA4VH supports high level OS (HLOS) like Linux/QNX on the Arm Cortex A cores and FreeRTOS/SafeRTOS on the R5F cores. Baremetal is not supported in the SDK.

    Regards

    Karan

  • 0 in reply to Karan Saxena
    TI__Genius 13655 points

    Hello Karan,

    Thank you very much for your great support. 

    Below is customer's reply.

    1. Yes, our original intention was that the SOC domain could be safely powered off while the MCU domain could maintain operation, and the MCU could obtain the status of whether the SOC was safely powered off to save power consumption.

    2. However, if the SDK does not support it, perhaps our upper level applications also need to make corresponding adjustments.Do you have any recommended solutions for our original intention?Is this issue not supported by the SDK, or is it impossible to achieve in hardware design?


    3. No, you misunderstood my meaning. What I meant was whether there is still a hypervisor software layer between HLOS(that is, Linux, RTOS) and bare metal.

    Thanks
    Regards
    Shine

  • 0 in reply to Shine
    TI__Guru* 77014 points

    Hi Shine

    Shine said:

    1. Yes, our original intention was that the SOC domain could be safely powered off while the MCU domain could maintain operation, and the MCU could obtain the status of whether the SOC was safely powered off to save power consumption.

    2. However, if the SDK does not support it, perhaps our upper level applications also need to make corresponding adjustments.Do you have any recommended solutions for our original intention?Is this issue not supported by the SDK, or is it impossible to achieve in hardware design?

    The hardware design allows you to support MCU only mode i.e. where only the MCU domain is operational and the MAIN domain is powered off to save power. This is supported in the TDA4VM SDK, see here. It is just not supported in the TDA4VH SDK today. Plan for the same is in SDK10.0 coming in 15 July 2024.

    Shine said:

    3. No, you misunderstood my meaning. What I meant was whether there is still a hypervisor software layer between HLOS(that is, Linux, RTOS) and bare metal.

    Why do you need a hypervisor between RTOS and Linux? Linux is running on the Arm Cortex A cores whereas the RTOS is running on the R5Fs. Do you plan to run some flavor of RTOS also on the A72 cores along with Linux? QNX however has an offering with QNX hypervisor, but for example, some kind of Jailhose demo is not there in the SDK today.

    Regards

    Karan

  • 0 in reply to Karan Saxena
    TI__Genius 13655 points

    Hello Karan,

    Thank you very much.

    1. Customer read the description and it says that the TP134 pin will change its voltage from 1.8v to 0v when switching from active state to mcu only state.
    Is there a register in MCU to indicate the status of TP134 pin? If so, can we read the status of the register directly?

    2. Customer understands that there is no hypervisor software abstraction layer between HLOS and bareMetal in TI software framework. Some companies may insert an additional software abstraction layer between HLOS and bare metal to monitor HLOS. OK, so they're done with this problem.

    Thanks
    Regards
    Shine

  • +1 in reply to Shine
    TI__Guru* 77014 points

    Hi Shine

    Shine said:
    1. Customer read the description and it says that the TP134 pin will change its voltage from 1.8v to 0v when switching from active state to mcu only state.
    Is there a register in MCU to indicate the status of TP134 pin? If so, can we read the status of the register directly?

    These are not mapped to any register but are just test points reflecting the state of the H_MCU_PORz and H_SOC_PORz signals in the SoC on the TDA4VM EVM. These test points will differ when you are running things on a custom board.

    • TP133 → H_MCU_PORz
    • TP134 → H_SOC_PORz

    Regards

    Karan

  • 0 in reply to Karan Saxena
    TI__Genius 13655 points

    Hello Karan,

    Thank you very much.

    Below is the customer's reply.

    Ok, and there's another problem needs to be confirmed, is there a software interface for shutting down SoC domain only?

    That's to say, an interface like(ie, echo 1 > /proc/path/to/shut_down_soc or something else), which only shuts down SoC domain, and it does not shut down the SoC domain and the MCU domain together in the same time.

    More specifically, what are the software interfaces of shutdown SoC only and shutdown SoC and MCU at the same time?

    1. what's the software interface to shutdown the SoC domain only?
    2. what's the software interface to shutdown the SoC domain and MCU domain at the same time?


    Thanks
    Regards
    Shine

  • 0 in reply to Karan Saxena
    Expert 1290 points

    When we only turned off the SoC domain, then the entire chip enters mcu only mode.
    After entering the mcu only state, starting the SOC at this time requires exiting the mcu only mode, which indeed requires a operations sequence to ensure the correct result.
    So it indeed need the SDK of correct versions to support the mcu only mode.
    but, all our need is 2 software power-off interfaces, and entering mcu only mode and exit it.


    I just mean that, Could it be made into a separate patch which does the support of this function?

  • 0 in reply to zheng.tianqiang
    TI__Genius 9180 points

    Since there is no activity for more than 6 months, will close the ticket. Please submit a new ticket if there is still issues.

    Br, Tommy