On AM62x SK schematic Page 16, what is the purpose of C361 between DDR_VERFCA and VDD_DDR4, is it necessary or helps to stability DDR_VREFCA?
In app notes: AM64x/AM243x DDR Board Design and Layout Guidelines page 12, only mentioned to add 0.1uf near to VERFCA pin.
2.10 VREF Routing JEDEC defines two reference voltages that are used with DDR4 memory interfaces. These are VREFDQ and VREFCA. VREFDQ is the reference voltage used for the data group nets during reads and writes. VREFCA is the reference voltage used for command and address inputs to the SDRAMs. DDR4 SDRAMs generate their own VREFDQ internally. Similarly, the processor's DDR4 PHY generates its own VREFDQ internally. The VREFCA reference voltage must be generated on the board and propagated to all of the SDRAMs. VREFCA is intended to be 50% of the DDR4 power supply voltage and is typically generated with the DDR4 VTT power supply. It should be routed as a nominal 20-mil wide trace with 0.1-μF bypass capacitors near each device connection. Narrowing the VREF trace is allowed to accommodate routing congestion for short lengths near endpoints.
