Hello team,
In any vision-app (e.g. tidl_od_cam) we have display node which transfers the final ISP output to Display Port to render it further on a display screen.
As per our understanding, display port / display node is implemented and running on R5F core. (correct us if we are wrong)
Another topic is we have graphics utility to print/overlay the CPU statistics (cpu-load, DDR usage, etc..) at the bottom rows of application output on to the screen.
as per our understanding graphics is handled via OpenGL running on A72 core.
If we disable the display node and keep the graphics active, we still can see the CPU statistics only on the screen (with no rendered output from application)
Our query is like, looking at above scenario, is it the case that the same DP port is independently controlled by display node (from R5F) and openGL (from A72) ?
If yes, how ?