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Original question:

TDA4VM: Backup for smooth power off

TDA4VM: GPIOs - MCU and wakeup domain

sai mukhesh
Prodigy 170 points
Part Number: TDA4VM

Hi TI team,

When we were checking over the technical reference manual below are our understanding and queries 

1. Over the tech ref manual found that there is a additional core available over the wakeup domain which is a bit confusing. Can you please make it clear whether there is a seperate core (rF5 core) for the wakeup domain or whether the complete wakeup domain is controlled by the 2x RF5 cores available over the MCU domain?

2. Currently there are a set of WKUP_GPIOs and could not find any specific GPIOs related to the MCU domain. whether the wakeup gpios can be accessed by the MCU domain?

  • 0
    TI__Mastermind 34750 points

    Hi,

    sai mukhesh said:
    2. Currently there are a set of WKUP_GPIOs and could not find any specific GPIOs related to the MCU domain. whether the wakeup gpios can be accessed by the MCU domain?

    Yes, the MCU R5F cores can access the WKUP_GPIOs. Section 3.3.1 of revision C of the TRM shows possible end point connections between different logic blocks. Specifically table 3-22 shows which cores can access the WKUP_GPIOs. 

    sai mukhesh said:
    1. Over the tech ref manual found that there is a additional core available over the wakeup domain which is a bit confusing. Can you please make it clear whether there is a seperate core (rF5 core) for the wakeup domain or whether the complete wakeup domain is controlled by the 2x RF5 cores available over the MCU domain?

    I am not sure whether I understand the question correctly, but the wake-up domain has an M3 core. Please see section 1.5 of the TRM for a block diagram of the wake-up domain.

    Regards,
    Kevin