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Original question:

PROCESSOR-SDK-J721S2: File Missing in the J721S2 PDK

PROCESSOR-SDK-J721S2: Vision Apps initialization is failing for J721S2 QNX boot via OSPI boot

Chaithra B V
Prodigy 80 points
Part Number: PROCESSOR-SDK-J721S2
Other Parts Discussed in Thread: UNIFLASH

Hi Team TI,

I am working on flashing J721S2 target from QNX Via OSPI.

I am able to flash QNX via OSPI but, Once after target boots up and I have try to initialize the vision apps application, Its failing and I am not able to see any Logs related to it.

But, Same build I have flashed for SD Card in that, J721S2 Target booting fine and vision apps is also initializing well.

I am referring the below mentioned links to run vision_apps :-

Build Instruction QNX+RTOS Mode:- https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j721s2/09_01_00_06/exports/docs/vision_apps/docs/user_guide/BUILD_INSTRUCTIONS.html

Run Instruction QNX_RTOS Mode :- https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j721s2/09_01_00_06/exports/docs/vision_apps/docs/user_guide/RUN_INSTRUCTIONS.html

Please suggest and help me over to resolve this issue.

Thank you,

Chaithra BV

  • 0
    TI__Guru* 75806 points

    Hi Chaithra,

    Chaithra B V said:
    Once after target boots up and I have try to initialize the vision apps application, Its failing and I am not able to see any Logs related to it.

    Could you please share the logs here for the SD boot and OSPI boot case?

    Are you using SBL or SPL bootloaders here?

    Regards,

    Nikhil

  • 0 in reply to Nikhil Dasan
    Prodigy 80 points

    Hi Nikhil,

    I have attached bootlogs for SD Card's (A72 and R5 Cores) and OSPI Flash commands with boot log.

    SD_R5_boot_logs.txt 
    Welcome to minicom 2.8

OPTIONS: I18n 
Port /dev/ttyUSB1, 11:56:08

Press CTRL-A Z for help on special keys

SBL Revision: 01.00.10.01 (Jan 11 2024 - 12:35:08)
TIFS  ver: 9.1.2--v09.01.02 (Kool Koala)
Starting Sciserver..... PASSED

MCU R5F App started at 0 usecs
Loading BootImage

 BootApp_MMCBootImageLate: fp 0x 0x41c12300, fileName is 0:/lateapp1

 Called SBL_MulticoreImageParse, status = 0
BootImage completed, status = 0
SBL_SlaveCoreBoot completed for Core ID#10, Entry point is 0x0
SBL_SlaveCoreBoot completed for Core ID#11, Entry point is 0x0
Loading BootImage

 BootApp_MMCBootImageLate: fp 0x 0x41c12300, fileName is 0:/lateapp2

 Called SBL_MulticoreImageParse, status = 0
BootImage completed, status = 0
SBL_SlaveCoreBoot completed for Core ID#18, Entry point is 0xb0200000
SBL_SlaveCoreBoot completed for Core ID#19, Entry point is 0xb6200000
Loading BootImage

 BootApp_MMCBootImageLate: fp 0x 0x41c12300, fileName is 0:/atf_optee.appimage

 Called SBL_MulticoreImageParse, status = 0

 BootApp_MMCBootImageLate: fp 0x 0x41c12300, fileName is 0:/ifs_qnx.appimage

 Called SBL_MulticoreImageParse, status = 0
BootImage completed, status = 0
SBL_SlaveCoreBoot completed for Core ID#0, Entry point is 0x70000000
Boot App: Started at 27 usec
Boot App: Total Num booted cores = 5
Boot App: Booted Core ID #10 at 604625 usecs
Boot App: Booted Core ID #11 at 606046 usecs
Boot App: Booted Core ID #18 at 527747 usecs
Boot App: Booted Core ID #19 at 534004 usecs
Boot App: Booted Core ID #0 at 1238149 usecs

MCU Boot Task started at 27 usecs and finished at 1254060 usecs
    SD_A72_boot_logs.txt 
    Welcome to minicom 2.8

OPTIONS: I18n 
Port /dev/ttyUSB2, 14:56:40

Press CTRL-A Z for help on special keys

NOTICE:  BL31: v2.8(release):v2.8-226-g2fcd408bb
NOTICE:  BL31: Built : 12:46:02, Jan  9 2024
ERROR:   GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader
MMU: 16-bit ASID 44-bit PA TCR_EL1=b5183519
ARM GIC-500 r1p1, arch v3.0 detected
gic_v3_lpi_add_entry for vectors 8192 -> 8447, Ok
gic_v3_lpi_add_entry for vectors 8448 -> 65535, Ok
No SPI intrinfo. Add default entry for 32 -> 991 vectors, Ok
LPI config table #1 @ 000000008000f000, callout vaddr: ffffff8040251000
aarch64_cpuspeed: core speed 2000
cpu0: MPIDR=80000000
cpu0: MIDR=411fd080 Cortex-A72 r1p0
cpu0: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT
cpu0: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1
cpu0: L1 Icache 48K linesz=64 set/way=256/3
cpu0: L1 Dcache 32K linesz=64 set/way=256/2
cpu0: L2 Unified 1024K linesz=64 set/way=1024/16
Enabling ITS 0
ITS queue at 0000000080020000, num slots: 256
Issue MAPC/SYNC/INVALL commands for ICID 0
update CWRITER to 0x00000060
Waiting for all commands to be processed ... Done in 1 tries
Enable LPIs in GICR_CTLR @ 0000000001900000 for CPU0
Display set to A72
Total Available L3 cache (MSMC SRAM): 4194304 bytes
Loading IFS...decompressing...done
ERROR:   GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader
aarch64_cpuspeed: core speed 2000
cpu1: MPIDR=80000001
cpu1: MIDR=411fd080 Cortex-A72 r1p0
cpu1: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT
cpu1: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1
cpu1: L1 Icache 48K linesz=64 set/way=256/3
cpu1: L1 Dcache 32K linesz=64 set/way=256/2
cpu1: L2 Unified 1024K linesz=64 set/way=1024/16
ITS 0 already Enabled
ITS queue at 0000000080020000, num slots: 256
Issue MAPC/SYNC/INVALL commands for ICID 1
update CWRITER to 0x000000c0
Waiting for all commands to be processed ... Done in 1 tries
Enable LPIs in GICR_CTLR @ 0000000001920000 for CPU1

System page at phys:0000000080023000 user:ffffff8040275000 kern:ffffff8040272000
Starting next program at vffffff8060087300
All ClockCycles offsets within tolerance
Welcome to QNX Neutrino 7.1.0 on the TI J7 TDA4VMeco EVM Board!!
Starting random service ...
start serial driver
Setting OS clock from RTC
Starting MMC/SD memory card driver... eMMC
Starting MMC/SD memory card driver... SD
Starting XHCI driver
Path=0 - am65x
 target=0 lun=0     Direct-Access(0) - SDMMC: G1M15L Rev: 1.0
Setting environment variables...
done..
Mounting the sd ..
Looking for user script to run: /ti_fs/scripts/user.sh
Running user script...
user.sh called...
Setting additional environment variables...
Starting tisci-mgr..
Initializing sciclient in interupt mode
Starting shmemallocator..
Starting tiipc-mgr..
Starting tiudma-mgr..
Starting ti-vpu-codec-mgr
Starting VPU Codec resource manager...
Resource Manager loop starting
Start screen..
screen started with dss_on_r5 configuration..
Starting sshd
Starting Flash driver...
done...
J721S2-EVM@QNX:/# s28hx_ident: Calibration failed

J721S2-EVM@QNX:/# ls
bin      dev      lib      root     ti_fs    usr
boot     etc      proc     sbin     tmp      var
J721S2-EVM@QNX:/# cd ti_fs/vision_apps/
J721S2-EVM@QNX:/ti_fs/vision_apps# ./vision_apps_init.sh 
J721S2-EVM@QNX:/ti_fs/vision_apps# [MCU2_0]      0.999312 s: CIO: Init ... Done !!!
[MCU2_0]      0.999357 s: ### CPU Frequency = 1000000000 Hz
[MCU2_0]      0.999381 s: CPU is running FreeRTOS
[MCU2_0]      0.999396 s: APP: Init ... !!!
[MCU2_0]      0.999426 s: SCICLIENT: Init ... !!!
[MCU2_0]      0.999533 s: SCICLIENT: DMSC FW version [9.1.2--v09.01.02 (Kool Koala)]
[MCU2_0]      0.999561 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_0]      0.999579 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]      0.999598 s: SCICLIENT: Init ... Done !!!
[MCU2_0]      0.999614 s: UDMA: Init ... !!!
[MCU2_0]      1.000307 s: UDMA: Init ... Done !!!
[MCU2_0]      1.000337 s: UDMA: Init for CSITX/CSIRX ... !!!
[MCU2_0]      1.000725 s: UDMA: Init for CSITX/CSIRX ... Done !!!
[MCU2_0]      1.000752 s: MEM: Init ... !!!
[MCU2_0]      1.000773 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ b9000000 of size 16777216 bytes !!!
[MCU2_0]      1.000815 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 60000000 of size 524288 bytes !!!
[MCU2_0]      1.000848 s: MEM: Init ... Done !!!
[MCU2_0]      1.000863 s: IPC: Init ... !!!
[MCU2_0]      1.000889 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_0]      1.003808 s: IPC: Init ... Done !!!
[MCU2_0]      1.003840 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_0]      5.594661 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_0]      5.594686 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]      5.595135 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]      5.595167 s: FVID2: Init ... !!!
[MCU2_0]      5.595205 s: FVID2: Init ... Done !!!
[MCU2_0]      5.595223 s: SCICLIENT: Sciclient_pmSetModuleState module=219 state=2
[MCU2_0]      5.595276 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      5.595308 s: DSS: Init ... !!!
[MCU2_0]      5.595325 s: DSS: Display type is eDP !!!
[MCU2_0]      5.595341 s: DSS: M2M Path is enabled !!!
[MCU2_0]      5.595359 s: DSS: SoC init ... !!!
[MCU2_0]      5.595373 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]      5.595436 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      5.595457 s: SCICLIENT: Sciclient_pmSetModuleState module=365 state=2
[MCU2_0]      5.595502 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      5.595522 s: SCICLIENT: Sciclient_pmSetModuleState module=156 state=2
[MCU2_0]      5.595620 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      5.595641 s: SCICLIENT: Sciclient_pmSetModuleState module=365 state=2
[MCU2_0]      5.595720 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      5.595740 s: SCICLIENT: Sciclient_pmSetModuleState module=156 state=2
[MCU2_0]      5.595820 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      5.595840 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=0
[MCU2_0]      5.595982 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      5.596005 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=158 clk=3 freq=148500000
[MCU2_0]      5.596171 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]      5.596197 s: SCICLIENT: Sciclient_pmModuleClkRequest module=158 clk=3 state=2 flag=2
[MCU2_0]      5.596359 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]      5.596380 s: SCICLIENT: Sciclient_pmSetModuleState module=158 state=2
[MCU2_0]      5.596540 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      5.596560 s: DSS: SoC init ... Done !!!
[MCU2_0]      5.596577 s: DSS: Board init ... !!!
[MCU2_0]      5.596592 s: DSS: Turning on DP_PWR pin for eDP adapters ... !!!
[MCU2_0]      6.142177 s: DSS: Turning on DP_PWR pin for eDP adapters ... Done!!!
[MCU2_0]      6.142209 s: DSS: Board init ... Done !!!
[MCU2_0]      6.217220 s: DSS: Init ... Done !!!
[MCU2_0]      6.217263 s: VHWA: VPAC Init ... !!!
[MCU2_0]      6.217281 s: SCICLIENT: Sciclient_pmSetModuleState module=361 state=2
[MCU2_0]      6.217379 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.217403 s: VHWA: LDC Init ... !!!
[MCU2_0]      6.218916 s: VHWA: LDC Init ... Done !!!
[MCU2_0]      6.218943 s: VHWA: MSC Init ... !!!
[MCU2_0]      6.224380 s: VHWA: MSC Init ... Done !!!
[MCU2_0]      6.224406 s: VHWA: NF Init ... !!!
[MCU2_0]      6.225166 s: VHWA: NF Init ... Done !!!
[MCU2_0]      6.225191 s: VHWA: VISS Init ... !!!
[MCU2_0]      6.230209 s: VHWA: VISS Init ... Done !!!
[MCU2_0]      6.230246 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]      6.230275 s:  VX_ZONE_INIT:Enabled
[MCU2_0]      6.230292 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]      6.230309 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]      6.231249 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-0 
[MCU2_0]      6.231347 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_NF 
[MCU2_0]      6.231444 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_LDC1 
[MCU2_0]      6.231529 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC1 
[MCU2_0]      6.231619 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_MSC2 
[MCU2_0]      6.231748 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target VPAC_VISS1 
[MCU2_0]      6.231849 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE1 
[MCU2_0]      6.231942 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE2 
[MCU2_0]      6.232031 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY1 
[MCU2_0]      6.232118 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DISPLAY2 
[MCU2_0]      6.232220 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX 
[MCU2_0]      6.232328 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE3 
[MCU2_0]      6.232422 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE4 
[MCU2_0]      6.232527 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE5 
[MCU2_0]      6.232628 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE6 
[MCU2_0]      6.232734 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE7 
[MCU2_0]      6.232825 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CAPTURE8 
[MCU2_0]      6.232911 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M1 
[MCU2_0]      6.233000 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M2 
[MCU2_0]      6.233086 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M3 
[MCU2_0]      6.233171 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DSS_M2M4 
[MCU2_0]      6.233262 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target CSITX2 
[MCU2_0]      6.233295 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_0]      6.233318 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]      6.240007 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]      6.240041 s: CSI2RX: Init ... !!!
[MCU2_0]      6.240056 s: SCICLIENT: Sciclient_pmSetModuleState module=136 state=2
[MCU2_0]      6.240114 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240138 s: SCICLIENT: Sciclient_pmSetModuleState module=38 state=2
[MCU2_0]      6.240183 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240205 s: SCICLIENT: Sciclient_pmSetModuleState module=39 state=2
[MCU2_0]      6.240248 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240268 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2
[MCU2_0]      6.240312 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240331 s: SCICLIENT: Sciclient_pmSetModuleState module=153 state=2
[MCU2_0]      6.240374 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240493 s: CSI2RX: Init ... Done !!!
[MCU2_0]      6.240513 s: CSI2TX: Init ... !!!
[MCU2_0]      6.240528 s: SCICLIENT: Sciclient_pmSetModuleState module=136 state=2
[MCU2_0]      6.240573 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240593 s: SCICLIENT: Sciclient_pmSetModuleState module=40 state=2
[MCU2_0]      6.240635 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240654 s: SCICLIENT: Sciclient_pmSetModuleState module=41 state=2
[MCU2_0]      6.240696 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240715 s: SCICLIENT: Sciclient_pmSetModuleState module=363 state=2
[MCU2_0]      6.240759 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240778 s: SCICLIENT: Sciclient_pmSetModuleState module=364 state=2
[MCU2_0]      6.240821 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      6.240841 s: Unlocked MMR to program CSITX DPHY register ... !!!
[MCU2_0]      6.240864 s: Locked MMR after programming CSITX DPHY register ... !!!
[MCU2_0]      6.240925 s: CSI2TX: Init ... Done !!!
[MCU2_0]      6.240943 s: ISS: Init ... !!!
[MCU2_0]      6.240958 s: IssSensor_Init: Test point 1
[MCU2_0]      6.240978 s: IssSensor_Init: Test point 2
[MCU2_0]      6.240995 s: Found sensor IMX390-UB953_D3 at location 0 
[MCU2_0]      6.241018 s: Found sensor AR0233-UB953_MARS at location 1 
[MCU2_0]      6.241040 s: Found sensor AR0820-UB953_LI at location 2 
[MCU2_0]      6.241061 s: Found sensor UB9xxx_RAW12_TESTPATTERN at location 3 
[MCU2_0]      6.241083 s: Found sensor UB96x_UYVY_TESTPATTERN at location 4 
[MCU2_0]      6.241106 s: Found sensor GW_AR0233_UYVY at location 5 
[MCU2_0]      6.241126 s: Found sensor OX03F10_UB953 at location 6 
[MCU2_0]      6.241145 s: IssSensor_Init: Test point 3
[MCU2_0]      6.241161 s: IssSensor_Init ... Done !!!
[MCU2_0]      6.241220 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]      6.241240 s: ISS: Init ... Done !!!
[MCU2_0]      6.241258 s: VISS REMOTE SERVICE: Init ... !!!
[MCU2_0]      6.241300 s: VISS REMOTE SERVICE: Init ... Done !!!
[MCU2_0]      6.241320 s: UDMA Copy: Init ... !!!
[MCU2_0]      6.242092 s: UDMA Copy: Init ... Done !!!
[MCU2_0]      6.242145 s: APP: Init ... Done !!!
[MCU2_0]      6.242166 s: APP: Run ... !!!
[MCU2_0]      6.242187 s: IPC: Starting echo test ...
[MCU2_0]      6.242685 s: APP: Run ... Done !!!
[MCU2_0]      6.243229 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[.] 
[MCU2_0]      6.243283 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C7X_1[P] C7X_2[P] 
[MCU2_0]      6.243323 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C7X_1[P] C7X_2[P] 
[MCU2_1]      1.048356 s: CIO: Init ... Done !!!
[MCU2_1]      1.048405 s: ### CPU Frequency = 1000000000 Hz
[MCU2_1]      1.048429 s: CPU is running FreeRTOS
[MCU2_1]      1.048445 s: APP: Init ... !!!
[MCU2_1]      1.048476 s: SCICLIENT: Init ... !!!
[MCU2_1]      1.048583 s: SCICLIENT: DMSC FW version [9.1.2--v09.01.02 (Kool Koala)]
[MCU2_1]      1.048610 s: SCICLIENT: DMSC FW revision 0x9  
[MCU2_1]      1.048629 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_1]      1.048650 s: SCICLIENT: Init ... Done !!!
[MCU2_1]      1.048667 s: UDMA: Init ... !!!
[MCU2_1]      1.049425 s: UDMA: Init ... Done !!!
[MCU2_1]      1.049451 s: MEM: Init ... !!!
[MCU2_1]      1.049473 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ ba000000 of size 16777216 bytes !!!
[MCU2_1]      1.049515 s: MEM: Init ... Done !!!
[MCU2_1]      1.049531 s: IPC: Init ... !!!
[MCU2_1]      1.049559 s: IPC: 5 CPUs participating in IPC !!!
[MCU2_1]      1.052424 s: IPC: Init ... Done !!!
[MCU2_1]      1.052457 s: APP: Syncing with 4 CPUs ... !!!
[MCU2_1]      5.594661 s: APP: Syncing with 4 CPUs ... Done !!!
[MCU2_1]      5.594683 s: REMOTE_SERVICE: Init ... !!!
[MCU2_1]      5.595127 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_1]      5.595156 s: FVID2: Init ... !!!
[MCU2_1]      5.595186 s: FVID2: Init ... Done !!!
[MCU2_1]      5.595205 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]      5.595220 s: SCICLIENT: Sciclient_pmSetModuleState module=58 state=2
[MCU2_1]      5.595318 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]      5.595342 s: SCICLIENT: Sciclient_pmSetModuleState module=62 state=2
[MCU2_1]      5.595391 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]      5.595411 s: VHWA: DOF Init ... !!!
[MCU2_1]      5.598736 s: VHWA: DOF Init ... Done !!!
[MCU2_1]      5.598772 s: VHWA: SDE Init ... !!!
[MCU2_1]      5.599885 s: VHWA: SDE Init ... Done !!!
[MCU2_1]      5.599914 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]      5.599942 s:  VX_ZONE_INIT:Enabled
[MCU2_1]      5.599959 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]      5.599975 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]      5.600913 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target MCU2-1 
[MCU2_1]      5.601004 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_SDE 
[MCU2_1]      5.601086 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:66] Added target DMPAC_DOF 
[MCU2_1]      5.601119 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[MCU2_1]      5.601141 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]      5.601277 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]      5.601301 s: UDMA Copy: Init ... !!!
[MCU2_1]      5.602080 s: UDMA Copy: Init ... Done !!!
[MCU2_1]      5.602115 s: APP: Init ... Done !!!
[MCU2_1]      5.602134 s: APP: Run ... !!!
[MCU2_1]      5.602149 s: IPC: Starting echo test ...
[MCU2_1]      5.602656 s: APP: Run ... Done !!!
[MCU2_1]      5.603087 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[.] 
[MCU2_1]      5.603140 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C7X_1[P] C7X_2[P] 
[MCU2_1]      6.243163 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C7X_1[P] C7X_2[P] 
[C7x_1 ]      5.525329 s: CIO: Init ... Done !!!
[C7x_1 ]      5.525344 s: ### CPU Frequency = 1000000000 Hz
[C7x_1 ]      5.525355 s: CPU is running FreeRTOS
[C7x_1 ]      5.525363 s: APP: Init ... !!!
[C7x_1 ]      5.525370 s: SCICLIENT: Init ... !!!
[C7x_1 ]      5.525466 s: SCICLIENT: DMSC FW version [9.1.2--v09.01.02 (Kool Koala)]
[C7x_1 ]      5.525480 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_1 ]      5.525490 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_1 ]      5.525501 s: SCICLIENT: Init ... Done !!!
[C7x_1 ]      5.525511 s: UDMA: Init ... !!!
[C7x_1 ]      5.526218 s: UDMA: Init ... Done !!!
[C7x_1 ]      5.526229 s: MEM: Init ... !!!
[C7x_1 ]      5.526240 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 117000000 of size 268435456 bytes !!!
[C7x_1 ]      5.526267 s: MEM: Init ... Done !!!
[C7x_1 ]      5.526278 s: IPC: Init ... !!!
[C7x_1 ]      5.526291 s: IPC: 5 CPUs participating in IPC !!!
[C7x_1 ]      5.527787 s: IPC: Init ... Done !!!
[C7x_1 ]      5.527802 s: APP: Syncing with 4 CPUs ... !!!
[C7x_1 ]      5.594662 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_1 ]      5.594674 s: REMOTE_SERVICE: Init ... !!!
[C7x_1 ]      5.594858 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_1 ]      5.594880 s:  VX_ZONE_INIT:Enabled
[C7x_1 ]      5.594891 s:  VX_ZONE_ERROR:Enabled
[C7x_1 ]      5.594901 s:  VX_ZONE_WARNING:Enabled
[C7x_1 ]      5.595095 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1 
[C7x_1 ]      5.595162 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_2 
[C7x_1 ]      5.595224 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_3 
[C7x_1 ]      5.595294 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_4 
[C7x_1 ]      5.595360 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_5 
[C7x_1 ]      5.595429 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_6 
[C7x_1 ]      5.595496 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_7 
[C7x_1 ]      5.595562 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP_C7-1_PRI_8 
[C7x_1 ]      5.595586 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_1 ]      5.595598 s: APP: OpenVX Target kernel init ... !!!
[C7x_1 ]      5.595748 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_1 ]      5.595762 s: APP: Init ... Done !!!
[C7x_1 ]      5.595771 s: APP: Run ... !!!
[C7x_1 ]      5.595779 s: IPC: Starting echo test ...
[C7x_1 ]      5.595885 s: APP: Run ... Done !!!
[C7x_1 ]      5.597191 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[s] C7X_2[P] 
[C7x_1 ]      5.603010 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_1 ]      6.243132 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[s] C7X_2[P] 
[C7x_2 ]      5.592000 s: CIO: Init ... Done !!!
[C7x_2 ]      5.592014 s: ### CPU Frequency = 1000000000 Hz
[C7x_2 ]      5.592026 s: CPU is running FreeRTOS
[C7x_2 ]      5.592035 s: APP: Init ... !!!
[C7x_2 ]      5.592043 s: SCICLIENT: Init ... !!!
[C7x_2 ]      5.592140 s: SCICLIENT: DMSC FW version [9.1.2--v09.01.02 (Kool Koala)]
[C7x_2 ]      5.592154 s: SCICLIENT: DMSC FW revision 0x9  
[C7x_2 ]      5.592165 s: SCICLIENT: DMSC FW ABI revision 3.1
[C7x_2 ]      5.592176 s: SCICLIENT: Init ... Done !!!
[C7x_2 ]      5.592185 s: UDMA: Init ... !!!
[C7x_2 ]      5.592891 s: UDMA: Init ... Done !!!
[C7x_2 ]      5.592903 s: MEM: Init ... !!!
[C7x_2 ]      5.592914 s: MEM: Created heap (DDR_LOCAL_MEM, id=0, flags=0x00000004) @ 127000000 of size 16777216 bytes !!!
[C7x_2 ]      5.592942 s: MEM: Init ... Done !!!
[C7x_2 ]      5.592953 s: IPC: Init ... !!!
[C7x_2 ]      5.592970 s: IPC: 5 CPUs participating in IPC !!!
[C7x_2 ]      5.594632 s: IPC: Init ... Done !!!
[C7x_2 ]      5.594647 s: APP: Syncing with 4 CPUs ... !!!
[C7x_2 ]      5.594660 s: APP: Syncing with 4 CPUs ... Done !!!
[C7x_2 ]      5.594671 s: REMOTE_SERVICE: Init ... !!!
[C7x_2 ]      5.594831 s: REMOTE_SERVICE: Init ... Done !!!
[C7x_2 ]      5.594873 s:  VX_ZONE_INIT:Enabled
[C7x_2 ]      5.594884 s:  VX_ZONE_ERROR:Enabled
[C7x_2 ]      5.594894 s:  VX_ZONE_WARNING:Enabled
[C7x_2 ]      5.595422 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:59] Added target DSP-1 
[C7x_2 ]      5.595446 s:  VX_ZONE_INIT:[tivxInitLocal:130] Initialization Done !!!
[C7x_2 ]      5.595458 s: APP: OpenVX Target kernel init ... !!!
[C7x_2 ]      5.595772 s: APP: OpenVX Target kernel init ... Done !!!
[C7x_2 ]      5.595788 s: UDMA Copy: Init ... !!!
[C7x_2 ]      5.596795 s: UDMA Copy: Init ... Done !!!
[C7x_2 ]      5.596808 s: APP: Init ... Done !!!
[C7x_2 ]      5.596816 s: APP: Run ... !!!
[C7x_2 ]      5.596824 s: IPC: Starting echo test ...
[C7x_2 ]      5.596954 s: APP: Run ... Done !!!
[C7x_2 ]      5.597196 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C7X_1[P] C7X_2[s] 
[C7x_2 ]      5.603021 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C7X_1[P] C7X_2[s] 
[C7x_2 ]      6.243149 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C7X_1[P] C7X_2[s] 

J721S2-EVM@QNX:/ti_fs/vision_apps#
    R5_OSPI.txt 
    Starting Sciserver..... PASSED                                                                                                          
                                                                                                                                        
MCU R5F App started at 79421 usecs                                                                                                      
Loading BootImage                                                                                                                       
BootImage completed, status = 0                                                                                                         
SBL_SlaveCoreBoot completed for Core ID#10, Entry point is 0x70014000                                                                   
SBL_SlaveCoreBoot completed for Core ID#11, Entry point is 0x70016000                                                                   
Loading BootImage                                                                                                                       
BootImage completed, status = 0                                                                                                         
SBL_SlaveCoreBoot completed for Core ID#12, Entry point is 0x70018000                                                                   
SBL_SlaveCoreBoot completed for Core ID#13, Entry point is 0x7001a000                                                                   
SBL_SlaveCoreBoot completed for Core ID#18, Entry poiC7X_0 booted                                                                       
nt is 0x90600000
SBL_SlaveCoreBoot completed for Core ID#19, Entry point is 0x90e00000
Loading BootImagC7X_1 booted
e
BootImage completed, status = 0
SBL_SlaveCoreBoot completed for Core ID#0, Entry point is 0x70000000
OSPI flash left configured in Legacy SPI mode.

 OSPI NOR device ID: 0x5b1a, manufacturer ID: 0x34 
MCU3_1 booted
Boot App: Started at 27 usec
Boot App: Total Num booted cores = 7
Boot App: Booted Core ID #10 at 5147 usecs
Boot App: Booted Core ID #11 at 5632 usecs
Boot App: Booted Core ID #12 at 35130 usecs
Boot App: Booted Core ID #13 at 35614 usecs
Boot App: Booted Core ID #18 at 36126 usecs
Boot App: Booted Core ID #19 at 36628 usecs
Boot App: Booted Core ID #0 at 1746146 usecs

MCU Boot Task started at 27 usecs and finished at 1763176 usecs
MCU3_1 booted
    OSPI_A72.txt 
    Welcome to minicom 2.8

OPTIONS: I18n 
Port /dev/ttyUSB2, 15:34:17

Press CTRL-A Z for help on special keys

NOTICE:  BL31: v2.8(release):v2.8-226-g2fcd408bb
NOTICE:  BL31: Built : 05:20:31, Oct 27 2023
ERROR:   GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader
MMU: 16-bit ASID 44-bit PA TCR_EL1=b5183519
ARM GIC-500 r1p1, arch v3.0 detected
gic_v3_lpi_add_entry for vectors 8192 -> 8447, Ok
gic_v3_lpi_add_entry for vectors 8448 -> 65535, Ok
No SPI intrinfo. Add default entry for 32 -> 991 vectors, Ok
LPI config table #1 @ 000000008000f000, callout vaddr: ffffff8040251000
aarch64_cpuspeed: core speed 2000
cpu0: MPIDR=80000000
cpu0: MIDR=411fd080 Cortex-A72 r1p0
cpu0: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT
cpu0: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1
cpu0: L1 Icache 48K linesz=64 set/way=256/3
cpu0: L1 Dcache 32K linesz=64 set/way=256/2
cpu0: L2 Unified 1024K linesz=64 set/way=1024/16
Enabling ITS 0
ITS queue at 0000000080020000, num slots: 256
Issue MAPC/SYNC/INVALL commands for ICID 0
update CWRITER to 0x00000060
Waiting for all commands to be processed ... Done in 1 tries
Enable LPIs in GICR_CTLR @ 0000000001900000 for CPU0
Display set to A72
Total Available L3 cache (MSMC SRAM): 4194304 bytes
Loading IFS...decompressing...done
ERROR:   GTC_CNTFID0 is 0! Assuming 200000000 Hz. Fix Bootloader
aarch64_cpuspeed: core speed 2000
cpu1: MPIDR=80000001
cpu1: MIDR=411fd080 Cortex-A72 r1p0
cpu1: CWG=4 ERG=4 Dminline=4 Iminline=4 PIPT
cpu1: CLIDR=a200023 LoUU=1 LoC=2 LoUIS=1
cpu1: L1 Icache 48K linesz=64 set/way=256/3
cpu1: L1 Dcache 32K linesz=64 set/way=256/2
cpu1: L2 Unified 1024K linesz=64 set/way=1024/16
ITS 0 already Enabled
ITS queue at 0000000080020000, num slots: 256
Issue MAPC/SYNC/INVALL commands for ICID 1
update CWRITER to 0x000000c0
Waiting for all commands to be processed ... Done in 1 tries
Enable LPIs in GICR_CTLR @ 0000000001920000 for CPU1

System page at phys:0000000080023000 user:ffffff8040275000 kern:ffffff8040272000
Starting next program at vffffff8060087280
All ClockCycles offsets within tolerance
Welcome to QNX Neutrino 7.1.0 on the TI J7 TDA4VMeco EVM Board!!
Starting random service ...
start serial driver
Setting OS clock from RTC
Starting MMC/SD memory card driver... eMMC
Starting MMC/SD memory card driver... SD
Starting XHCI driver
Path=0 - am65x
 target=0 lun=0     Direct-Access(0) - SDMMC: G1M15L Rev: 1.0
Setting environment variables...
done..
Mounting the sd ..
Looking for user script to run: /ti_fs/scripts/user.sh
Running user script...
user.sh called...
Setting additional environment variables...
Starting tisci-mgr..
Initializing sciclient in interupt mode
Starting shmemallocator..
Starting tiipc-mgr..
Starting tiudma-mgr..
Starting ti-vpu-codec-mgr
Starting VPU Codec resource manager...
Resource Manager loop starting
Start screen..
screen started with dss_on_r5 configuration..
Starting sshd
Starting Flash driver...
done...
J721S2-EVM@QNX:/# (devf  t1::flashcfg_setup:364) unknown command mask
(devf  t1::flashcfg_setup:364) unknown command mask
s28hx_ident: Calibration failed
(devf  t1::f3s_flash_probe:255) chip total = 1, bus_width = -1029679168, interleave = 1

J721S2-EVM@QNX:/# ls
bin      dev      lib      root     ti_fs    usr
boot     etc      proc     sbin     tmp      var
J721S2-EVM@QNX:/# cd ti_fs/vision_apps/
J721S2-EVM@QNX:/ti_fs/vision_apps# ./vision_apps_init.sh 
J721S2-EVM@QNX:/ti_fs/vision_apps#
    FLASH_COMMNDS_LOGS.txt 
    chaithrabv@LAP921U:~/ti/uniflash_8.6.0$ sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/binary/j721s2_evm/cust/bin/sbl_cust_img_mcu1_0_release.tiimage -d 3 -o 0x0
Executing the following command:
> ./ProcessorSDKSerialFlash -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/binary/j721s2_evm/cust/bin/sbl_cust_img_mcu1_0_release.tiimage -d 3 -o 0x0

For more details and examples, please refer to the UniFlash Quick Start guide.


----------------------------------------------------------------------------
ProcessorSDKSerialFlash CLI Tool
Copyright (C) 2017-2023 Texas Instruments Incorporated - http://www.ti.com/
Version 1.10.0.0
----------------------------------------------------------------------------
Transferring the Image to Flash Programmer..
Opening Port Successful!

Transferring Header Information..
Header Transfer Complete!
Opening Port Successful!

Flashing Image of size 231270 bytes
Flash Programming Success!
chaithrabv@LAP921U:~/ti/uniflash_8.6.0$ sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/drv/sciclient/soc/V4/tifs.bin -d 3 -o 0x80000
Executing the following command:
> ./ProcessorSDKSerialFlash -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/drv/sciclient/soc/V4/tifs.bin -d 3 -o 0x80000

For more details and examples, please refer to the UniFlash Quick Start guide.


----------------------------------------------------------------------------
ProcessorSDKSerialFlash CLI Tool
Copyright (C) 2017-2023 Texas Instruments Incorporated - http://www.ti.com/
Version 1.10.0.0
----------------------------------------------------------------------------
Transferring the Image to Flash Programmer..
Opening Port Successful!

Transferring Header Information..
Header Transfer Complete!
Opening Port Successful!

Flashing Image of size 160683 bytes
Flash Programming Success!
chaithrabv@LAP921U:~/ti/uniflash_8.6.0$ sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/example/boot_app/binary/j721s2_evm/ospi/sbl_boot_app_ospi_qnx_j721s2_evm_mcu1_0_freertos_TestApp_release.appimage -d 3 -o 0x100000
Executing the following command:
> ./ProcessorSDKSerialFlash -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/example/boot_app/binary/j721s2_evm/ospi/sbl_boot_app_ospi_qnx_j721s2_evm_mcu1_0_freertos_TestApp_release.appimage -d 3 -o 0x100000

For more details and examples, please refer to the UniFlash Quick Start guide.


----------------------------------------------------------------------------
ProcessorSDKSerialFlash CLI Tool
Copyright (C) 2017-2023 Texas Instruments Incorporated - http://www.ti.com/
Version 1.10.0.0
----------------------------------------------------------------------------
Transferring the Image to Flash Programmer..
Opening Port Successful!

Transferring Header Information..
Header Transfer Complete!
Opening Port Successful!

Flashing Image of size 181576 bytes
Flash Programming Success!
chaithrabv@LAP921U:~/ti/uniflash_8.6.0$ sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/example/boot_app/multicore_images/j721s2_evm/multicore_MCU2_0_MCU2_1_stage1.appimage -d 3 -o 0x1fc0000
Executing the following command:
> ./ProcessorSDKSerialFlash -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/example/boot_app/multicore_images/j721s2_evm/multicore_MCU2_0_MCU2_1_stage1.appimage -d 3 -o 0x1fc0000

For more details and examples, please refer to the UniFlash Quick Start guide.


----------------------------------------------------------------------------
ProcessorSDKSerialFlash CLI Tool
Copyright (C) 2017-2023 Texas Instruments Incorporated - http://www.ti.com/
Version 1.10.0.0
----------------------------------------------------------------------------
Transferring the Image to Flash Programmer..
Opening Port Successful!

Transferring Header Information..
Header Transfer Complete!
Opening Port Successful!

Flashing Image of size 2552 bytes
Flash Programming Success!
chaithrabv@LAP921U:~/ti/uniflash_8.6.0$ sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/example/boot_app/multicore_images/j721s2_evm/multicore_DSP_1_2_C7x_MCU3_0_MCU3_1_stage2.appimage -d 3 -o 0x27c0000
Executing the following command:
> ./ProcessorSDKSerialFlash -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/example/boot_app/multicore_images/j721s2_evm/multicore_DSP_1_2_C7x_MCU3_0_MCU3_1_stage2.appimage -d 3 -o 0x27c0000

For more details and examples, please refer to the UniFlash Quick Start guide.


----------------------------------------------------------------------------
ProcessorSDKSerialFlash CLI Tool
Copyright (C) 2017-2023 Texas Instruments Incorporated - http://www.ti.com/
Version 1.10.0.0
----------------------------------------------------------------------------
Transferring the Image to Flash Programmer..
Opening Port Successful!

Transferring Header Information..
Header Transfer Complete!
Opening Port Successful!

Flashing Image of size 157136 bytes
Flash Programming Success!
chaithrabv@LAP921U:~/ti/uniflash_8.6.0$ sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/tools/BootApp_binaries/qnx/j721s2_evm/atf_optee.appimage -d 3 -o 0x1c0000
Executing the following command:
> ./ProcessorSDKSerialFlash -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/tools/BootApp_binaries/qnx/j721s2_evm/atf_optee.appimage -d 3 -o 0x1c0000

For more details and examples, please refer to the UniFlash Quick Start guide.


----------------------------------------------------------------------------
ProcessorSDKSerialFlash CLI Tool
Copyright (C) 2017-2023 Texas Instruments Incorporated - http://www.ti.com/
Version 1.10.0.0
----------------------------------------------------------------------------
Transferring the Image to Flash Programmer..
Opening Port Successful!

Transferring Header Information..
Header Transfer Complete!
Opening Port Successful!

Flashing Image of size 39368 bytes
Flash Programming Success!
chaithrabv@LAP921U:~/ti/uniflash_8.6.0$ sudo ./dslite.sh --mode processors -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/tools/BootApp_binaries/qnx/j721s2_evm/ifs_qnx.appimage -d 3 -o 0x7c0000
Executing the following command:
> ./ProcessorSDKSerialFlash -c /dev/ttyUSB1 -f /home/chaithrabv/J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/pdk_j721s2_09_01_00_22/packages/ti/boot/sbl/tools/BootApp_binaries/qnx/j721s2_evm/ifs_qnx.appimage -d 3 -o 0x7c0000

For more details and examples, please refer to the UniFlash Quick Start guide.


----------------------------------------------------------------------------
ProcessorSDKSerialFlash CLI Tool
Copyright (C) 2017-2023 Texas Instruments Incorporated - http://www.ti.com/
Version 1.10.0.0
----------------------------------------------------------------------------
Transferring the Image to Flash Programmer..
Opening Port Successful!

Transferring Header Information..
Header Transfer Complete!
Opening Port Successful!

Flashing Image of size 9030832 bytes
Flash Programming Success!

  • 0 in reply to Chaithra B V
    TI__Guru* 75806 points

    Hi,

    I see that you are using sbl_cust_img. Are you seeing the same issue with sbl_ospi_img?

    Could you please confirm if you ran the flash programmer before loading the sbl image in the flash script?

    Regards

    Nikhil

  • 0 in reply to Nikhil Dasan
    Prodigy 80 points

    Hi Nikhil,

    Thankyou for the suggestion.

    I am able to resolve the issue by changing the makefile configurations of "J721S2_SF/ti-processor-sdk-rtos-j721s2-evm-09_01_00_06/sdk_builder/makerules/makefile_sbl.mak" by commenting NOR Patterns.bin Statement and all the images are flashing fine with

    "make qnx_fs_install_ospi" command.
    In this, its taking the SD-Card Dependency on the target board for "ti_fs/vision_apps".
    I am looking for standalone OSPI NOR Target system without intervention of SD Card and Please suggest me a way to resolve it.
  • 0 in reply to Chaithra B V
    TI__Guru* 75806 points

    Hi,

    You could use the uniflash tool to directly write into OSPI without SD Card intervention.

    But you would have to place the filesystem into the eMMC so that you could remove the dependency of the SD Card.

    Regards,

    Nikhil

  • 0 in reply to Nikhil Dasan
    Prodigy 20 points

    Hi Nikhil,

    Our custom ECU designed with SNOR Flash 512MbX1 and does not support any other storage media like SD/eMMC. The OSPI NOR Flash QNX boot loads the TI_FS for Vision Application from SD Card according to the SDK Build. We like to customize the Vision Application TI_FS and create the single QNX FS Package to boot the QNX with Vision Application without other storage Media support.

    Regards,

    Dr. Vina

  • 0 in reply to Vinayagam Mariappan
    TI__Guru* 75806 points

    Hi,

    It's not something supported by default in our SDK, 

    QNX will boot on OSPI, but the OSPI driver will not mount to a filesystem, and our SDK has no steps on programming QNX filesystem to OSPI.

    But let me check with the QNX experts on the feasibility of achieving the same.

    Regards,

    Nikhil

  • 0 in reply to Nikhil Dasan
    Prodigy 20 points

    Nikil,

    Yeah, that we know that TI SDK had not steps on programming QNX filesystem to OSPI.

    We are thinking to optimize the TI vision SDK file system and include it in QNX IFS with our own QNX custom build.

    Could you please share details on this direction?

    Regards,

    Dr. Vina

     

  • 0 in reply to Vinayagam Mariappan
    TI__Guru** 103931 points

    If you want to add the filesystem to the QNX-IFS image as part of the RAM filesystem, this is possible, but the side effect would be a large QNX-IFS boot image, and a large impact on amount of DDR used, as the entire filesystem would then in RAM.

    Modifications of QNX Build files to include/exclude content are available online.  

     A general guideline would be to follow the same format that is already in the existing build files, just add/remove content as needed.

    An alternate related approach would be to get the filesystem running on your target/flash, for which QNX/Blackberry team could support

    Regards,

    kb