SK-TDA4VM: Please confirm 2 PMIC parts.

Dear experts,

Please let me know if there are any updates about the issue above. Thanks.

Best regards,

Chase

Hello Chase,

Yes the TPS65941213+ TPS65941111 are the recommended PMICs for the TDA4VM. Both parts are fully released now. 

Chase Jeong said:

Do you have GUI tool or other program for dumping register of TPS65941213 and TPS65941111?

Yes, description of the GUI and where to find it can be found in this user guide: https://www.ti.com/lit/pdf/slvubt8

Chase Jeong said:

How about the jig or EVM for GUI program?

Customer can order the TPS65941212EVM or TPS65941111EVM and with GUI reprogram the device as they see fit. 

Dear Michael,

Thank you for your support, and hope you had a good weekend.

My customer dumped register of their PMICs both their own PCB(samples from TI.com) and TDA4 EVM

Comparing these 2 registers, It has little differences,

I want to know that these differences are known issue or something is wrong.

register dump.zip

And one more question, the samples from TI.com have the marking below. I want to know that the ICs which marking are like the picture below should have initial register settings above.

or, Could you provide register setting which is suitable for TDA4 EVM? It will be very helpful to my customer.

Best regards,

Chase

Dear Michael,

Thank you for your support.

Today I check the waveforms between customer PCB and TDA4 EVM.

The result is in the excel file below. Could you check the result and advise me why the PMICs in the customer PCB don't work?

240521.xlsx

And here are more questions;

1. My customer removed 32.768KHz crystal in PMIC of TDA4 EVM, and PMIC still works well. Is 32.768 crystal necessary?

2. What is the exact usage of AMUXOUT pin(P1) in PMIC?

3. in the excel file above, you can see 1.8V output tab. PMIC makes some output after startup, but it renamis only about 400ms. and the output falls to low.

Could you explain the condition of this waveform? Can I create it intentionally?

(all the other outputs have same waveforms.)

4. My customer had another test. he removed L11 inductor in TDA4EVM. it is connected to SW_B5A pin.

And of course B5A did not make proper output because feedback circuit is disconnected. But what I want to say is all the other outputs are stopped, just the result of removing L11 inductor.

Is it normal operation? I thought that just B5A output would not be detected and all the other outputs are detected.

Please check these issues. Thanks.

Best regards,

Chase

Hello Chase,

Please follow this FAQ for help in debugging your customer's board:

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1112617/faq-tps6594-q1-lp8764-q1-debugging-pmic-behavior-with-interrupt-interpretation?tisearch=e2e-sitesearch&keymatch=faq%3Atrue%20tps6594#

The PMIC's interrupt registers can help narrow down the problem.

Chase Jeong said:

1. My customer removed 32.768KHz crystal in PMIC of TDA4 EVM, and PMIC still works well. Is 32.768 crystal necessary?

The crystal is necessary to use the RTC Alarm and RTC Wake function of the PMIC. The are optional features and customer can remove the crystal if they don't plan to use them.

Chase Jeong said:

2. What is the exact usage of AMUXOUT pin(P1) in PMIC?

Buffered bandgap output.

Chase Jeong said:

4. My customer had another test. he removed L11 inductor in TDA4EVM. it is connected to SW_B5A pin.

And of course B5A did not make proper output because feedback circuit is disconnected. But what I want to say is all the other outputs are stopped, just the result of removing L11 inductor.

Is it normal operation? I thought that just B5A output would not be detected and all the other outputs are detected.

Yes this normal behavior. A fault on any rail will cause either all or some of the rails to shut down. Please review the PDN-0C user guide for details on the PFSM of the PMICs.

https://www.ti.com/lit/pdf/slvuc99

Hi I am JC, HW engineer in DX Solution.

This project is going on with Hyundai trying to replace Nvida solution to TDA4VM solution in Hyundai Robots such as Boston dynamics robot dog. 
We need to show image working with our NPU solution locating M.2 Key M slot until end of June. 

It is a serious situation because proto type boards won't turn on its power since it has been assembled about a week ago.
I referred design of SK-TDA4VM. 


SW cannot work anything until boards open their eyes.


The symptom is switching few moment and turn off, this repeats about 15 times and finally turn off forever. 
It looks like hiccupping but I don' t know much about PMIC since I used this for the first time.

This is shown not just a single rail but every rails on PMIC-A and B. 



What is the root cause of hiccupping signal? why are they try to turn on many times before turn off? 
Which state is this? 
I am curious as to why it operates this way and what effects or results are obtained from operating it. Is it some kind of protection? 
if so, for what?



L8 sample board PMIC- A VDD_CPU_AVS_L8 before (blue) after (purple)_(1)

L8 sample board PMIC- A VDD_CPU_AVS_L8 before (blue) after (purple)_(2)_scale 
 

Could you request the review  the schematics and gerber of our sample board if I attach them here? 

Jaecheon Yoo said:

What is the root cause of hiccupping signal? why are they try to turn on many times before turn off? 
Which state is this? 
I am curious as to why it operates this way and what effects or results are obtained from operating it. Is it some kind of protection? 
if so, for what?

Please review the TPS6594 data sheet: https://www.ti.com/lit/gpn/tps6594-q1

And the user guide of the TPS65941213 + TPS65941111: https://www.ti.com/lit/pdf/slvuc99

The PMIC is seeing a fault that is causing it to power down and do a recovery attempt. The PMICs will execute up to 15 recovery attempts before staying off. The list of triggers to cause recovery attempt are in section 6 of the user guide.

To debug what fault is being seen, please follow the steps in the FAQ link I provided in my previous reply.

-Mike

Dear Mike,

Thank you for your support.

1. As I said in another thread, if you review the schematic of 2 PIMCs in Processors forum, I agree to close the thread in Power management forum.

2. 2 PIMCs in customer's board are still not active. To figure out the reason, I have to access to register settings via I2C. Do you have any idea to read register settings and current status via I2C? (i.e. connecting to labtop)

3. My customer found that the latest schematic of TDA4 EVM is rev.B. They designed their schematic based on rev.B schematic. but TDA4 EVM is based on A1.

3-1. Is there any TDA4 EVM which is based on rev.B schematic?

3-2. Is there any latest schematic which is released after rev.B schematic?

3-3. Could you explain the reason why they changed the schematic from rev.A1 to rev.B line by line?

maybe It would be the key to operate the PMICs in customer's board.

Please check these issues. Thanks.

Best regards,

Chase

Chase Jeong said:

1. As I said in another thread, if you review the schematic of 2 PIMCs in Processors forum, I agree to close the thread in Power management forum.

Agree to schematic review. Please post in .pdf format that is searchable.

Chase Jeong said:

2. 2 PIMCs in customer's board are still not active. To figure out the reason, I have to access to register settings via I2C. Do you have any idea to read register settings and current status via I2C? (i.e. connecting to labtop)

Any I2C tool can be used to communicate with the PMIC. As long as the PMIC has power, the it can be communicated with. What did you use for the register dump from a few days ago?

Chase Jeong said:

3. My customer found that the latest schematic of TDA4 EVM is rev.B. They designed their schematic based on rev.B schematic. but TDA4 EVM is based on A1.

3-1. Is there any TDA4 EVM which is based on rev.B schematic?

3-2. Is there any latest schematic which is released after rev.B schematic?

3-3. Could you explain the reason why they changed the schematic from rev.A1 to rev.B line by line?

These questions will have to be answered by the TDA4 team. 

Hi, Michael thanks for your review.

I attached schematics . 

I just discovered that if I get rid of TDA4VM from our target board, all the outputs from PMIC-A and B turns on. 

POWER BLOCK_TI_1_REVIEW.pdf

this is i2c dump data of sample board that doesn’t turn on.

 i2c master is SK-TDA4VM

It is read via jumper wire

root@tda4vm-sk:/opt/edgeai-gst-apps# i2cdump -f -y 0x0 0x48
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 82 13 02 20 2b 20 2b 20 2f 20 2b 20 1b 37 37    .??? + + / + ?77
10: 37 37 fd fd 41 41 b2 b2 1b 1b 1b 1b 1b 20 20 20    77??AA???????
20: 20 00 00 38 38 10 38 1b 1b 1b 1b 21 3f 00 00 00     ..88?8????!?...
30: 00 20 40 58 c8 29 28 38 78 01 d8 43 19 00 00 88    . @X?)(8x??C?..?
40: 08 5a 96 05 1e 01 55 55 15 00 00 00 00 00 00 ff    ?Z????UU?.......
50: ff 3f 11 02 20 00 00 00 00 3f b9 04 00 00 06 00    .??? ....???..?.
60: 00 00 00 00 00 02 01 0a 00 0a 00 00 00 00 00 00    .....???.?......
70: 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00    ...?............
80: 00 04 18 0f 0f 00 00 1f 00 00 00 0b ff ff 00 00    .????..?...?....
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 80 00 00 08 00 00 00 00 00 00 00 00 00    ...?..?.........
b0: 00 00 00 00 00 00 00 00 01 01 00 00 00 00 00 00    ........??......
c0: 00 00 00 f8 80 00 00 00 00 00 00 00 00 58 9d 00    ...??........X?.
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 7a 28 ea a9 cc 5d ff b0 95 9f 5a e2 00 00 80 64    z(???].???Z?..?d
root@tda4vm-sk:/opt/edgeai-gst-apps# i2cdump -f -y 0x0 0x49
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 02 03 01 02 02 02 02 02 00 00 54 7f 0c 33 aa 6e    ????????..T??3?n
10: 52 ea 83 23 09 38 00 63 45 80 00 0b f6 88 88 88    R??#?8.cE?.?????
20: 00 05 48 12 00 03 02 09 01 00 00 00 0c 22 10 10    .?H?.????...?"??
30: 24 80 04 1f 00 00 00 00 00 00 00 00 00 00 00 01    $???...........?
40: c7 a5 00 01 00 53 00 00 00 00 06 00 00 00 00 00    ??.?.S....?.....
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 c0 59 5a 02 00 00 00    .........?YZ?...
80: 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 93 93 93 93 93 00 00 00 00    .......?????....
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00    ...?............
root@tda4vm-sk:/opt/edgeai-gst-apps# i2cdump -f -y 0x0 0x4a
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 11 18 18 00 13 18 00 12 18 0c 0f 58 23 33 07 57    ???.??.????X#3?W
10: 00 00 0c 12 12 13 13 10 0d 11 10 0f 11 0f 11 11    ..??????????????
20: 0e 13 13 14 14 10 0f 14 17 0f 12 0e 0e 17 0b 14    ????????????????
30: 0e 0e 0d 0b 0d 14 0d 0a 13 0a 12 11 18 13 17 11    ????????????????
40: 00 00 00 00 00 1d 00 1e 1e 08 08 00 1f 21 08 07    .....?.????.?!??
50: 00 24 1e 08 07 00 12 15 06 02 03 00 00 00 00 00    .$???.?????.....
60: 10 0d 10 03 08 03 07 08 0a 0c 09 07 0b 00 00 00    ?????????????...
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 0f 0d 11 03 07 03 07 08 07 0d 08 08 0b 00 00 00    ?????????????...
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 0b 0c 0f 02 07 03 08 08 09 0b 05 08 0d 00 00 00    ?????????????...
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 0d 0d 0f 03 08 03 06 08 08 0e 07 08 0a 00 00 00    ?????????????...
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 10 10 10 03 07 03 07 08 09 0c 07 07 0b 00 00 00    ?????????????...
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
root@tda4vm-sk:/opt/edgeai-gst-apps# i2cdump -f -y 0x0 0x4b
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
root@tda4vm-sk:/opt/edgeai-gst-apps# i2cdump -f -y 0x0 0x4c
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 82 11 02 20 2b 20 2b 20 22 20 22 20 1b 37 00    .??? + + " " ?7.
10: 37 00 00 00 00 00 41 00 1b 1b 00 00 1b 20 20 20    7.....A.??..?
20: 20 00 00 f4 f4 38 38 1b 1b 1b 1b 21 3f 00 00 00     ..??88????!?...
30: 00 00 1c 01 03 20 20 10 00 01 f8 01 19 00 00 c2    ..???  ?.????..?
40: 0a 0a a2 06 1e 01 51 55 15 00 00 00 00 00 00 fd    ??????QU?......?
50: fd 3f 11 02 e0 00 00 a0 09 3f b6 00 00 00 00 02    ?????..????....?
60: 00 04 00 08 02 00 01 08 00 0a 00 00 00 00 00 00    .?.??.??.?......
70: 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00    ...?............
80: 00 04 18 0f 0f 00 00 1f 00 00 00 0b ff ff 00 00    .????..?...?....
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 80 00 00 08 00 00 00 00 00 00 00 00 00    ...?..?.........
b0: 00 00 00 00 00 00 00 00 01 01 00 00 00 00 00 00    ........??......
c0: 00 00 00 f8 80 00 00 00 00 00 00 00 00 00 1d 00    ...??.........?.
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 73 bb 95 45 a6 0c aa 79 c8 4b 9f 51 00 00 79 f5    s??E???y?K?Q..y?
root@tda4vm-sk:/opt/edgeai-gst-apps# i2cdump -f -y 0x0 0x4d
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 02 03 01 02 02 02 02 02 00 00 54 7f 0c 33 aa 6e    ????????..T??3?n
10: 52 ea 83 23 09 38 00 61 45 80 00 09 f6 88 88 88    R??#?8.aE?.?????
20: 00 03 4c 13 00 00 02 09 01 00 00 00 0a 1d 16 0f    .?L?..???...????
30: e2 18 04 1f 00 00 00 00 00 00 00 00 00 00 00 01    ????...........?
40: c7 a5 00 01 00 53 00 00 00 00 06 00 00 00 00 00    ??.?.S....?.....
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 c0 59 5a 02 00 00 00    .........?YZ?...
80: 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 93 93 93 93 93 00 00 00 00    .......?????....
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00    ...?............
root@tda4vm-sk:/opt/edgeai-gst-apps# i2cdump -f -y 0x0 0x4e
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 0f 18 18 00 10 18 00 10 18 0d 12 57 26 62 07 57    ???.??.????W&b?W
10: 00 00 0d 11 10 0d 0f 11 13 0f 0f 14 12 0d 14 11    ..??????????????
20: 0d 0d 13 0e 0f 12 0f 12 14 0f 0e 12 14 0e 0e 11    ????????????????
30: 13 10 0d 15 0a 0f 0e 0c 11 0b 12 0f 18 0f 18 10    ????????????????
40: 00 00 00 00 00 1e 00 1d 1e 07 08 00 21 21 08 08    .....?.????.!!??
50: 00 23 1f 09 07 00 10 18 07 01 03 00 00 00 00 00    .#???.?????.....
60: 0f 0b 10 02 07 03 07 08 08 0d 07 07 0b 00 00 00    ?????????????...
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 0b 10 11 03 08 03 06 08 07 0c 0a 08 09 00 00 00    ?????????????...
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 10 0c 10 03 08 03 07 08 0b 0d 07 08 0b 00 00 00    ?????????????...
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 0d 0e 10 03 06 03 07 08 09 0d 07 08 0a 00 00 00    ?????????????...
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 0e 09 10 02 06 03 07 08 0b 0c 06 07 09 00 00 00    ?????????????...
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
root@tda4vm-sk:/opt/edgeai-gst-apps# i2cdump -f -y 0x0 0x4f
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

Here are significant register value from the dump above. 

Here are several questions. 

1) What is of the power rail of SOC_PWR and MCU_PWR ? I couldn't get information in the datasheet. 
Do they run different power rails?

2) Why BUCK5 show UV interrupt ? BUCK5 means VDD_PHYIO_1V8 by the way? 

3) Do you know the history why C582 (47uF) has been DNI in SK-TDA4VM ?

4) I just disconnected FL5/FL8/FL20/FL23/FL21 to separate VDD_PHYIO_1V8 from TDA4VM. And I got rid of C582.

The result of dump data was the same.

Dear Michael,

Hope you have a good day.

Please let me know if there are any updates about the issue below.

The schedule of project is delayed too much, your help is urgently needed.

Best regards,

Chase

Regarding previous question about differences between SK-TDA4VM RevA and SK-TDA4VM RevB - the schematic contains a history/log of all changes.  Please review. Reviewing - it looks like some changes made to first stage regulator (LM5141), buffer inserted for monitor detect for DisplayPort (power leakage issue when monitor connected with EVM off), and few changes to Type C interface.

The TDA4VM processor can optionally operate the MCU and MAIN domains separately.  The SK-TDA4VM design which you referenced has these IO domains combined to single power domain.  Looking a previous version of SK-TDA4VM designs - C582 has always been DNI.

Do you know if the PMIC is detecting error before or after it completes it start-up sequence?  Is it ever de-asserting MCU_PORz (PMIC's nRSTOUT)?

Robert Eschler said:

Do you know if the PMIC is detecting error before or after it completes it start-up sequence?  Is it ever de-asserting MCU_PORz (PMIC's nRSTOUT)?

MCU_PORz (PMIC's nRSTOUT) is low in sample board. 

When I get rid of TDA4VM from the board, MCU_PORz (PMIC's nRSTOUT) is high and all the PMIC-A/B power rails turn on. 

If nRSTOUT is never going high, then the PMIC is not completing its power up sequence before it detects the error.  Do you know which rail was the last to be turned on prior to the PMIC shutting down?  That would help indicate where the PMIC detected the error.

Hi Robert, 

it stops PMIC-B LDO4.

Before that, we can observe PMIC-A BUCK5 rail voltage is about 250mV toggling. 

CH1 : LDO1 PMIC-A
CH2 : LDO4 PMIC-A
CH3 : BUCK5 PMIC-A
CH4 : LDO4 PMIC-B

PMIC-A BUCK5 rail voltage is about 250mV toggling.

This is dump data of the sample board at this stage. 

=>
0100: 00 82 13 04 20 2b 20 2b 20 2d 20 2b 20 1b 3b 37    .... + + - + .;7
0110: 37 37 fd fd 41 41 b2 b2 1b 1b 3f 1b 1b 20 20 20    77..AA....?..
0120: 20 00 00 38 38 10 38 1b 1b 1b 1b 21 3f 00 00 00     ..88.8....!?...
0130: 00 20 40 58 c8 29 28 38 78 01 d8 43 19 00 00 88    . @X.)(8x..C....
0140: 08 5a 96 05 1e 01 55 55 15 33 33 03 33 33 00 ff    .Z....UU.33.33..
0150: ff 3f 11 02 20 00 00 00 00 3f b9 04 00 00 08 00    .?.. ....?......
0160: 00 00 00 00 00 02 01 0a 00 02 00 00 00 00 00 00    ................
0170: 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00    ................
0180: 00 04 18 0f 0f 00 00 1f 00 00 00 0b ff ff 00 00    ................
0190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
01a0: 00 00 00 80 00 00 08 00 00 00 00 00 00 00 00 00    ................
01b0: 00 00 00 00 00 00 00 00 01 01 00 00 00 00 00 00    ................
01c0: 00 00 00 e0 80 00 00 00 00 00 00 00 00 58 9d 00    .............X..
01d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
01e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
01f0: 64 a3 23 fc 55 bf b9 4d 9a 09 6b b8 00 00 5a 03    d.#.U..M..k...Z.

when I get rid of 0.1uF at C470 and C454 in the schematics below, register dump data has been updated like this.

=> i2c md 0x48 0x0 0x100

0000: 00 82 13 04 20 2b 20 2b 20 2d 20 2b 20 1b 3b 37 .... + + - + .;7
0010: 37 37 fd fd 41 41 b2 b2 1b 1b 3f 1b 1b 20 20 20 77..AA....?..
0020: 20 00 00 38 38 10 38 1b 1b 1b 1b 21 3f 00 00 00 ..88.8....!?...
0030: 00 20 40 58 c8 29 28 38 78 01 d8 43 19 00 00 88 . @X.)(8x..C....
0040: 08 5a 96 05 1e 01 55 55 15 33 33 03 33 33 00 ff .Z....UU.33.33..
0050: ff 3f 11 02 20 00 00 00 00 3f b8 00 00 00 00 00 .?.. ....?......
0060: 00 00 00 00 00 02 01 08 00 02 00 00 00 00 00 00 ................
0070: 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 ................
0080: 00 04 18 0f 0f 00 00 1f 00 00 00 0b ff ff 00 00 ................
0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00a0: 00 00 00 80 00 00 08 00 00 00 00 00 00 00 00 00 ................
00b0: 00 00 00 00 00 00 00 00 01 01 00 00 00 00 00 00 ................
00c0: 00 00 00 e0 80 00 00 00 00 00 00 00 00 58 9d 00 .............X..
00d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00f0: 64 a3 23 fc 55 bf b9 4d 9a 09 6b b8 00 00 5a 03 d.#.U..M..k...Z.

0x48 5Ah BUCK5 interrupt disappeared 

250mV toggling became 1.8V toggling at BUCK5. 

But still LDO4 of PMIC-B doesn't seem to turn on. 

3771.POWER BLOCK_TI_1_REVIEW.pdf

CH1 :BUCK5
CH2 LDO4

 LDO4 PMIC-B was short. I was able to get out of the short circuit state by deleting few CAPs (0.1uF). this short was generated by installing the CAPs by me.)

Then all the rails toggling until the end of sequence rail that is GPIO3 PMICB
See the o-scope result.

CH1 : LDO3 PMICB
CH2 : GPIO3 PMICB
CH3 : MCU_PORz (very narrow toggling. why??)
CH4 : SOC_PORz (very narrow toggling. why??)

 

However, I encountered the interrupts that had not occurred before

such as LDO2_OV_INT and LDO3_SC_INT. 

=> i2c md 0x48 0x0 0x100
0000: 00 82 13 04 20 2b 20 2b 20 2d 20 2b 20 1b 3b 37 .... + + - + .;7
0010: 37 37 fd fd 41 41 b2 b2 1b 1b 3f 1b 1b 20 20 20 77..AA....?..
0020: 20 00 00 38 38 10 38 1b 1b 1b 1b 21 3f 00 00 00 ..88.8....!?...
0030: 00 20 40 58 c8 29 28 38 78 01 d8 43 19 00 00 88 . @X.)(8x..C....
0040: 08 5a 96 05 1e 01 55 55 15 00 00 00 00 00 00 ff .Z....UU........
0050: ff 3f 11 02 20 00 00 00 00 3f ba 00 00 00 00 03 .?.. ....?......
0060: 10 04 00 00 00 02 01 08 00 0e 00 00 00 00 00 00 ................
0070: 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 ................
0080: 00 04 18 0f 0f 00 00 1f 00 00 00 0b ff ff 00 00 ................
0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00a0: 00 00 00 80 00 00 08 00 00 00 00 00 00 00 00 00 ................
00b0: 00 00 00 00 00 00 00 00 01 01 00 00 00 00 00 00 ................
00c0: 00 00 00 e0 80 00 00 00 00 00 00 00 00 58 9d 00 .............X..
00d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00f0: 64 a3 23 fc 55 bf b9 4d 9a 09 6b b8 00 00 5a 03 d.#.U..M..k...Z.

o-scope LDO2 TP43

o-scope LDO3 TP35

I'm not understanding how removing C470 and C454 can fix BCK5 - were they installed incorrectly?

LDO4 was fixed by removing caps as well?  Is there a manufacturing/assembly issue or design issue?

Could we have similar issue causing the issues with LDO2, LDO3?

What other connections exist for LDO2 (vsys_mcuio_1v8)?

LDO3 (vda_dll_0v8) seems to match the SK-TDA4VM design.

Michael - can you comment on the PMIC register dumps?  Any ideas?  It looks like as soon as PMIC releases nRSTOUT, an issue is detected and system is shutdown.

there was a manufacturing/assembly issue not installing 0.1uF underneath the TDA4VM chipset (about 37 point, 0201 size)
I installed them manually.

Even though 0.1uF were not installed manually LDO2 and LDO3 on PMIC-A had same interrupts (LDO2_OV_INT and LDO3_SC_INT)
After I installed them manually, LDO2_OV_INT and LDO3_SC_INT were disappeared, but as I described above, BUCK5/LDO4 occurred issue which I cleared. 

So for now, LDO2_OV_INT and LDO3_SC_INT still remains. 

Here is full schematics attached. 

I don't see any short on the rail of LDO2 (vsys_mcuio_1v8), It is toggling about 2.1V  which is higher than 1.8V and LDO2_OV_INT interrupt occurred. 

TI_1_DVKIT_A0_schematics.pdf

LDO2 had a problem. it was 2.1V level until I disconnected R88. 

In this situation, VDD_MCUIO_1V8_REG = 1.8V and VSYS_MCUIO_1V8 =1.5V even though VSYS_MCUIO_1V8 was disconnected from PMIC-A.

I got rid of OSPI Flash, or other ICs that were connected the net but the symptom wasn't changed

Then I started to suspect VDDSHV1_MCU Power group and when I removed connection between CPLD and TDA4VM, that are R181,R179,R178,R180 the 1.5V that appeared to be a induced voltage from disconnected net became 0V, and when I reconnected R88, the full power from PMIC-A/B started to be output.

I have few question about SK-TDA4VM. 

1) 
CPLD (LCMXO2-256HC-5TG100E) was not programmed, 
What causes induced voltage from CPLD to the power group of VSYS_MCUIO_1V8 ? 
all the board we assembled have same symptom. 

2) 
Is it necessary to connect CPLD_TCK/CPLD_TDI/CPLD_TDO/CPLD_TMS from TDA4VM to CPLD? what is the usage for that?

3) 
What is the detail of "Added 0 ohm resistor option to disable hiccup mode for LM5141" in the schematics at revision history? 
Would you share why hiccup mode has been disabled and how I can make SK-TDA4VM hiccup mode?
If 3.3V shorten, what kind of behavior can I expect from LM5141 ?

VDDSHV1_MCU is powered at 1.8V (VSYS_MCUIO_1V8).  However it is also connected to 3.3V signals which are pulled up to 3.3v signals (CPLD_TMS is one example).  This is an invalid configuration.  Cannot support 3.3v signals when IO is powered at 1.8V.  This type of connection is likely causing some of your issues.  (Note there may be other similar type of connections where incorrect IO voltages are being applied.)

Thanks,
I don't think TDA4VM communicate with CPLD during boot by the wire below. 
I think it is needed only when I want programming CPLD from host. 

Is that right?

Jaecheon Yoo said:

Is it necessary to connect CPLD_TCK/CPLD_TDI/CPLD_TDO/CPLD_TMS from TDA4VM to CPLD? what is the usage for that?

Correct - was put in the TI's design for option to reprogram CPLD if needed.  Again - this is just one example I saw.  I didn't review entire design.  Could be other similar violations causing the invalid voltages being seen.

I need to know the history of the below which is about SK-TDA4VM hiccup mode>

Jaecheon Yoo said:

3) 
What is the detail of "Added 0 ohm resistor option to disable hiccup mode for LM5141" in the schematics at revision history? 
Would you share why hiccup mode has been disabled and how I can make SK-TDA4VM hiccup mode?
If 3.3V shorten, what kind of behavior can I expect from LM5141 ?

On earlier revisions we had some issues with the front end regulator generating the 3.3V for the PMIC + Processor.  At high loads for extended times, we had some reset issues.   It was unclear if the LM5141 was entering hiccup mode, so we added option to disable if needed.