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TMDS64EVM: Set processors and controller Clock Frequency

Raj Kumar
Intellectual 318 points
Part Number: TMDS64EVM
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello TI,

We have the TMDS64EVM board and MCU+ SDK version 09.01, along with the Debian Bookworm Processor SDK. According to the datasheet, the A53 can run up to 1GHz, the R5 up to 800MHz, and the M4 up to 400MHz. How can we determine the current frequency of these processors? We found some information in the clock tree section here: dev.ti.com/.../

How do we set the clock frequency of the cores and DDR4 RAM? Is there any procedure for this?

Thank you.

  • 0
    Intellectual 516 points

    Hi ,
    We already check with https://www.ti.com/tool/download/CLOCKTREE-AM64X/1.0.0
    there is no tool for CTT and double check with CCS also.
    Can you help us to achieve ???

    Regards
    Debashis

  • 0 in reply to Debashis Mahanty
    TI__Guru* 78640 points

    The DDR clock frequency should be set with the DDR Register Configuration tool in sysconfig.  See details here:  https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/09_00_00_35/exports/docs/api_guide_am64x/DRIVERS_DDR_PAGE.html

    Regards,

    James

  • 0 in reply to JJD
    TI__Mastermind 35078 points

    Hello Raj,

    Raj Kumar said:
    How do we set the clock frequency of the cores

    A similar issue has already been resolved in another thread. Please refer tmds64evm-how-to-change-the-clock-of-ca53 for more detail.

    Regards,

    Tushar

  • +1 in reply to Tushar Thakur
    Intellectual 318 points

    Thank you Tushar,

    We followed the above thread and flash uart_unifalsh(sbl) .it is working fine we can able to see below

    DMSC Firmware Version 9.1.6--v09.01.06 (Kool Koala)
DMSC Firmware revision 0x9
DMSC ABI revision 3.1

INFO: Bootloader_runCpu:155: CPU r5f1-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU r5f1-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU m4f0-0 is initialized to 400000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU a530-0 is initialized to 1000000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU a530-1 is initialized to 1000000000 Hz !!!
INFO: Bootloader_loadSelfCpu:207: CPU r5f0-0 is initialized to 800000000 Hz !!!
INFO: Bootloader_loadSelfCpu:207: CPU r5f0-1 is initialized to 800000000 Hz !!!
INFO: Bootloader_runSelfCpu:217: All done, reseting self ...


    we have increased A53 to 1GHz.After that we booted from sd card how to verify clock frequency in linux ?

  • +1 in reply to Raj Kumar
    TI__Mastermind 35078 points

    Hello Raj,

    Can you please what method of SOC initialization are you using? Is it SBL flow or SPL flow?

    SD Boot mode follows SPL flow, changes done in the MCU+SDK bootloader will have no impact when initializing the SOC with SD boot mode.

    To know more please refer Boot Flow.

    Raj Kumar said:
    After that we booted from sd card how to verify clock frequency in linux ?

    You can use the k3conf tool to know the frequency of cores.

    Run the below command from Linux coming on AM64x EVM.

    k3conf dump processor

    Hope the above information helps.

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Intellectual 318 points

    Hello Tushar !

    Thank you for your great support,

    we are check the processors frequency with the above command that you have mentioned,every core was running at its maximum frequency.

    But we want to to verify the DDR clock, in the sysconfig we have ddr configuration option for R5 core only ,how to set it for every core from the sysconfig and how to set it in Linux?

    in linux,we have check with k3config dump clock command ,it is not showing ddr's clock .

  • 0 in reply to Raj Kumar
    TI__Mastermind 35078 points

    Hello Raj,

    Raj Kumar said:
    But we want to to verify the DDR clock, in the sysconfig we have ddr configuration option for R5 core only ,how to set it for every core from the sysconfig and how to set it in Linux?

    In MCU+SDK the supported CPU for DDR is R5F only and sysconfig support is only available for R5F core for DDR. Please refer release notes for more details. 

    Raj Kumar said:
    in linux,we have check with k3config dump clock command ,it is not showing ddr's clock

    The command to check DDR input clock frequency in Linux is given below.

    k3conf dump clock 138

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Intellectual 516 points

    Hello Tushar,
    Thankyou for your reply.
    Can you please tell us how we can change the clock to 400MHz to 800MHz.

    root@am64xx-evm:~# k3conf dump clock 138
|------------------------------------------------------------------------------|
| VERSION INFO                                                                 |
|------------------------------------------------------------------------------|
| K3CONF | (version 0.3-nogit built Sun Mar 03 08:52:05 UTC 2024)              |
| SoC    | AM64x SR2.0                                                         |
| SYSFW  | ABI: 3.1 (firmware version 0x0009 '9.2.7--v09.02.07 (Kool Koala))') |
|------------------------------------------------------------------------------|

|-------------------------------------------------------------------------------------------|
| Device ID | Clock ID | Clock Name                     | Status          | Clock Frequency |
|-------------------------------------------------------------------------------------------|
|   138     |     0    | DEV_DDR16SS0_DDRSS_DDR_PLL_CLK | CLK_STATE_READY | 400000000       |
|   138     |     1    | DEV_DDR16SS0_PLL_CTRL_CLK      | CLK_STATE_READY | 500000000       |
|-------------------------------------------------------------------------------------------|

  • 0 in reply to Debashis Mahanty
    TI__Guru* 78640 points

    Debashis, the 400MHz you see is the max allowable.  Note that this is the PLL clock frequency, and the memory clock frequency is always double.

    4 * PLL frequency = 2 * Memory Clock Frequency = DDR Data rate 

    So 400MHz DDR PLL frequency represents 800MHz DDR memory clock or 1600MTs, which is the maximum allowable for AM64x

    Regards,

    James