• State Resolved
  • Locked Locked
  • Replies 7 replies
  • Subscribers 31 subscribers
  • Views 552 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMP139: Unable to write in I3C mode.

Marsh Cai
Intellectual 2965 points
Part Number: TMP139

Hi experts,

Please kindly help me about the problem：

I have sent (S+0xfc+ack+0x29+T+P) to TMP139 to ender I3C mode. However after I entered I3C, and in I3C Basic Mode Write, no ACK feedback was received after device address sent. (S+0X2e (or 0x6e)+NOACK).

But with I3C Basic Mode Default Read Address Enabled, read order works normal, (S+0X2f (or 0x6f) + ack + DATA + T…….P).

 

What I mean above is I cannot write in I3C, but read is ok. 

I can read that the value for register MR18(ADDRESS:0X12) is 0x20, which means TMP139 is in I3C mode, right?

Can you kindly help about this problem, no ack feedback when sending write order?

Thanks,

Marsh.

  • +1
    TI__Genius 10080 points

    Hi Marsh,

    Thank you for posting to the Sensing forum.

    Can you please provide a logic analyzer capture of the unsuccessful write commands, as well as captures for a successful read? Additionally, can you please confirm the value in register MR2?

    Marsh Cai said:
    I can read that the value for register MR18(ADDRESS:0X12) is 0x20, which means TMP139 is in I3C mode, right?

    Yes, this means that the device is in I3C mode. However, register MR18 should be 0x30 if Default Read mode is enabled.

    Best regards,

    Nicole

  • 0 in reply to Nicole Khoury
    TI__Intellectual 2965 points

    Hi Nicole,

    Please kindly review my input below:

    1, M2R: 0x04.

    2, Pic1: Waveform Capture for send 0xfc+0x29. 

    3, Pic2: Waveform Capture for send 0x6e+W/bit after pic1 configuration.

     

    4, Pic3: Waveform Capture for send 0x2e+W/bit after pic1 configuration.

    notes for pic1,2,3: According to the D/S, there're two TMP139 on my board. One's SA is high, and the other is Low.

    5, Pic4: Waveform Capture for send 0x6e+R/bit after pic1 configuration. (read)

    6, Pic5: The readback data with Read order. (read)

    Issue summary: Under I3C mode, write order seems not work and no ack feedback. Read order works well and I can read the data in sequence. 

    Please kindly help to review the captures and help me about this case.

    Thanks

    Marsh

  • 0 in reply to Marsh Cai
    TI__Genius 10080 points

    Hi Marsh,

    Thank you for the provided captures.

    Are you setting a value for the host ID (HID) before entering I3C mode?

    Best regards,

    Nicole

  • 0 in reply to Nicole Khoury
    TI__Intellectual 2965 points

    Hi Nicole,

    No, I didn't configure the HID, and default value 0x0E was used.

    Marsh

  • 0 in reply to Marsh Cai
    TI__Genius 10080 points

    Hi Marsh,

    Marsh Cai said:
    But with I3C Basic Mode Default Read Address Enabled, read order works normal, (S+0X2f (or 0x6f) + ack + DATA + T…….P).

    You mention that you put the device in Default Read mode, which suggests that you are able to write to device registers. Please try writing 0x10 to register MR12 while in I3C mode and then reading back the value. Attach scope captures of this if possible.

    Best regards,

    Nicole

  • 0 in reply to Nicole Khoury
    TI__Intellectual 2965 points

    Hi Nicole,

    I don't understand. I can't find the MR12. There's no MR12 in D/S.

    Nicole Khoury said:
    Please try writing 0x10 to register MR12 while in I3C mode and then reading back the value.

    Nicole, honestly, I'm confused about this issue. Is there anything wrong about my action to enter I3C write mode? What's the standard action to enter I3C write mode?

    Do you have any finding from the captures I uploaded? Can you share some insights with me about this case and root cause.

    Thanks,

    Marsh.

  • 0 in reply to Marsh Cai
    TI__Genius 10080 points

    Hi Marsh,

    I apologize, I meant to say register MR18. 

    You are sending the correct command to enter I3C mode. You confirmed that the device is in I3C mode by reading 0x20 from the Configuration Register. 

    Can you please zoom in to the 9th clock cycle of Picture #2 and #3? I believe that you are actually seeing an ACK + handoff during this clock cycle. See below:

    The host is expected to drive SDA after the acknowledge, but it appears that there is an issue you are seeing where the host is not driving SDA for some reason. What I3C host are you using?

    You're not seeing this during reads because there is no handoff during the read transaction:

    Best regards,

    Nicole