Other Parts Discussed in Thread: SN74CB3Q3253, TS3A5017, SN74CBTLV3253
Hello,
I am currently working on a board where I've integrated four TMUX1204 general-purpose analog multiplexers to select from four different slots. I've observed a puzzling behavior that I believe might be related to back-powering through the TMUX1204's I/O pins.
Setup and Observations:
- As illustrated in the provided schematic, I use four TMUX1204s for signal multiplexing to select one of four slots.
- Even when the board, including the TMUX1204 ICs, is unpowered, I noticed that applying a 3V signal to any one of the input pins (like
RST_S2
,SWD
,SWCLK
etc.) causes the other corresponding pins on the IC to also show the same voltage. In addition to this, the VDD pin of the MUX reads 2.1V. Notably, the LED (D1) lights up in this scenario, indicating power on the board. - This unintended power-up seems to be propagated via the TMUX1204. It's essential to note that this phenomenon is not specific to any particular pin; applying voltage to any input results in the same behavior across the IC.
Possible Cause:
Based on my observations and the TMUX1204 datasheet, it appears that applying voltage to one of the MUX's inputs is leading to some kind of back-powering through the IC's internal structures, affecting the VDD. The TMUX1204 datasheet does mention a Fail-Safe Logic feature that allows the operation with control inputs up to 5.5V, even when VDD is unpowered or at a lower voltage, which makes me suspect this feature may be related.
Questions:
- Is it possible that the TMUX1204's I/O pins can influence or back-power the VDD through internal structures when a voltage is applied to them, especially if VDD is not aplied?
- What could cause the other RST pins to read 3V when voltage is only applied to
RST_S2
? - Are there preventive measures or design guidelines provided by TI to mitigate such scenarios with the TMUX1204?
- Would specific power sequencing or circuit protection techniques be recommended in this case to prevent unexpected behavior?
I would greatly appreciate any insights or guidance on this issue. The attached schematic should provide further clarity on my setup. Thank you for your assistance and time.