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TMUX1204: Unexpected Back-Powering Issue with TMUX1204 Resulting in Unintended Power-Up

Part Number: TMUX1204
Other Parts Discussed in Thread: SN74CB3Q3253, TS3A5017, SN74CBTLV3253

Hello,

I am currently working on a board where I've integrated four TMUX1204 general-purpose analog multiplexers to select from four different slots. I've observed a puzzling behavior that I believe might be related to back-powering through the TMUX1204's I/O pins.




Setup and Observations:

  1. As illustrated in the provided schematic, I use four TMUX1204s for signal multiplexing to select one of four slots.
  2. Even when the board, including the TMUX1204 ICs, is unpowered, I noticed that applying a 3V signal to any one of the input pins (like RST_S2, SWD, SWCLK etc.) causes the other corresponding pins on the IC to also show the same voltage. In addition to this, the VDD pin of the MUX reads 2.1V. Notably, the LED (D1) lights up in this scenario, indicating power on the board.
  3. This unintended power-up seems to be propagated via the TMUX1204. It's essential to note that this phenomenon is not specific to any particular pin; applying voltage to any input results in the same behavior across the IC.

Possible Cause:

Based on my observations and the TMUX1204 datasheet, it appears that applying voltage to one of the MUX's inputs is leading to some kind of back-powering through the IC's internal structures, affecting the VDD. The TMUX1204 datasheet does mention a Fail-Safe Logic feature that allows the operation with control inputs up to 5.5V, even when VDD is unpowered or at a lower voltage, which makes me suspect this feature may be related.

Questions:

  1. Is it possible that the TMUX1204's I/O pins can influence or back-power the VDD through internal structures when a voltage is applied to them, especially if VDD is not aplied?
  2. What could cause the other RST pins to read 3V when voltage is only applied to RST_S2?
  3. Are there preventive measures or design guidelines provided by TI to mitigate such scenarios with the TMUX1204?
  4. Would specific power sequencing or circuit protection techniques be recommended in this case to prevent unexpected behavior?

I would greatly appreciate any insights or guidance on this issue. The attached schematic should provide further clarity on my setup. Thank you for your assistance and time.

  • The control pins have fail-safe logic, the I/O pins have not. There are clamping diodes to VDD, so a current can flow from the I/O pins into the supply.

    In general, CMOS switches have low leakage currents, so you should just leave them powered.

    There are devices that isolate the I/O pins when powered down; this is called "Powered-off protection" in the search function. See the SN74CBTLV3253, TS3A5017, or SN74CB3Q3253.

  • Hey Selim,

    Clemens points and recommendatiosn are correct but I will still go through your questions below : 

    Is it possible that the TMUX1204's I/O pins can influence or back-power the VDD through internal structures when a voltage is applied to them, especially if VDD is not aplied?

    Yea, tit's very much possible. The TMUX1204 will have a esd cell that goes from the I/O pins to the supply. Note that this isn't just the supply pin but also the internal supply rails. So you can't simply put a diode on the supply rail to stop the device from back powering because you'll still power on the internal elements.
    This would also be violating the recommending operating conditions as your source/drain voltage will be greater than your supply 

    What could cause the other RST pins to read 3V when voltage is only applied to RST_S2?

    This one is a little tricky. I don't think that back powering the device would cause this necessarily, if the device isn't damaged. There may be some ESD damage that is shorting the other RST pins to the supply so when you back power the device the other RST's are also seeing the same voltage. When powered on does the device function normally? I would try power sequencing the device is the proper order (Supply first then the I/O's) and seeing if the issue is resolved. But also a ABA swap may be needed to check if the device itself is just damaged.
     

    Are there preventive measures or design guidelines provided by TI to mitigate such scenarios with the TMUX1204?

    As mentioned above, proper power sequencing would be the recommendation if you want to continue using the TMUX1204 in the system. You'll need the supply on before the I/O signals are present on the Source or Drain. 
    As Clemens mentioned as well, a device with powered off protection may also be a course of action you take.


    Would specific power sequencing or circuit protection techniques be recommended in this case to prevent unexpected behavior?

    Yes it would Slight smile  Sorry for my repetition but yes, power sequencing would help here

    Thanks,
    Rami 

  • Hello Clemens and Rami,

    Thank you for your detailed insights. In response to Rami's question: When powered at 3.3V, the device behaves normally. However, applying 5V on the pins while VDD is at 3.3V results in the mentioned issue.

    Given your feedback and my observations, I realize that the TMUX1204 might not suit my project. I'll consider other options, especially those with "Powered-off protection".

    Your guidance has been invaluable in steering my decisions. Much appreciated.

    Warm Regards,
    Selim Coskun Guler