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TLV320AIC3254: TLV320AIC3254 Clock Configuration

Part Number: TLV320AIC3254


Our platform is TI CC2642 + AIC3254, regarding AIC3254, the MCLK is directly connected to BCLK.

some questions need your help:

1. we would like to use PLL clock as AIC3254 clock,so about Clock Setting Register 1(P0_R4), should we set it to 0x3 or 0x7????

2. if we would like use 16KHz sample rate, could you help provide the the following registers setting:

P0_R5

P0_R6

P0_R7

P0_R8

P0_R11

P0_R12

P0_R11

P0_R12

P0_R13

P0_R14

P0_R18

P0_R19

P0_R20

Thanks.

  • Hi, Trevor,

    Regarding your first question,  the difference between configuring register P0_R4 as 0x03 and 0x07 is the selection of the input for the PLL; which for this application (MCLK tied to BCLK) does not make a difference.

    I can help with the register configuration for the clocks, but need the value of the frequency of the BCLK/MCLK provided to the device as all the clock settings should be derived  from it.

    Regards,

      -Diego Meléndez López
       Audio Applications Engineer

  • Thanks, I will provide the BCLK frequency later.