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Interfacing DDR parallel LVDS ADC to ML605 via the ADC-FMC -Adapter.

Other Parts Discussed in Thread: ADS58C48

Hi Richard and other experts,

 

I have visited the High Speed Data Converters forum discussion at :

 

http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/57627/204911.aspx#204911

 

I am interfacing the ADS58C48EVM to ML605 via the ADC-FMC -Adapter. It is a quad channel double multiplexed 11-bits DDR LVDS output.

In this context, can you please pass me  the reference VHDL code and constraint file of TSW1200 or ML605, so that I may adapt it to my application. My E-mail: saeed_qaisar@yahoo.fr.

Thanks,

  • Sent to the address provided,

    but please note:

    The ADS58C48 that you are considering is a four channel device, and with that many LVDS outputs it uses most of the differential pairs on the Samtec connector on the EVM.  The TSW1200 has this many LVDS pairs into the FPGA, but the FMC connector to the Xilinx development board does not have that many available differential pairs.  So the adapter board to connect the Ads58C48 EVM to the Xilinx development platform will only bring the LVDS from two of the channels to the FPGA.  There just were not enough available pairs into the FMC connector to get the rest of them.

     Regards,

    Richard P.

     

  • Thanks for the information. Normally following the ADS58C48 schematic in slar053 and ADC-FMC-Adapter schematic in slor101, I can manage to treat the quad channels.

    Best Regards,