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Dear Sir,
Now I am able to interface 7825 with my controller.But problem is the counts i am getting is not right with mathematical calculations.
And I see counts not get saturated with Ref voltage.And i am getting full scale value as 32768 not 65536. I am unable to follow these things in data sheet also.
Need your support much.
Thanks
Radha
Hello Radha,
It is very good news that the interface is working.
As for the counts, they are in two’s complement format ranging from -32768 to 32767
This means that the input voltage is calculated from the output code as follows:
Vin = 8 * Vref / 65536 *CODE, where -32768 < CODE < 32767
Thus, Vref should be measured to calculate Vin, but if Vref were “exactly” 2.5V, this would be expected:
|
Analog |
Digital Output in Two's Complement Format |
|
|
Binary CODE |
HEX Code |
|
|
9.999695V |
0111 1111 1111 1111 |
7FFF |
|
305.18uV |
0000 0000 0000 0001 |
0001 |
|
0V |
0000 0000 0000 0000 |
0000 |
|
-305.18uV |
1111 1111 1111 1111 |
FFFF |
|
-10.000000V |
1000 0000 0000 0000 |
8000 |
I recommend using a “signed int” variable to store the data because its format is typically 16 bit two’s complement.
Let us know if this information helps.
Best Regards,
Rafael
Hello Rafael,
Thanks for your Input.. As per your reply I am getting my positive counts correctly. But In Negative I cant conclude whats happening..
I am doing 2's compliment
if( (AD_SDATA== 1) && Count ==0) //Negative polarity is setted then the following loop will execute
{
ADCOUNTSDATA = 0xFFFF - ADCOUNTSDATA; // 16 bit ADCOUNTSDATA is signed long.
ADCOUNTSDATA = ADCOUNTSDATA * (-1);
}
lcd_goto(8);
sprintf(Buf,"%05Ld",ADCOUNTSDATA);
As per this for -9v I should get -25000 range but my display show 3000 counts only.Can U explain me what I should do.
and the Output 15 bits is not stable 50 counts is fluctuating. Can U help me further.
Thanks with Regards
Radha
Dear Rafael,
I have no reply from you so far, Any how now i have made my counts 14 bits only stable . I have found cross talk and channel interference in channel Input.
If i adjust my any one of my channel . The other channel counts get affected. Can u suggest me what to do?
Pl give me timely solution.
Regards
Radha
Hi Radha,
Are you still having trouble with the B2C number format? If so, please provide input voltage versus output codes and we'll take a look at that for you. On the noise, (crosstalk/count variation) can you provide a schematic of your ADS78925 interface to your applied input signal?
Hi Tom,
Thanks for your reply .Here with I attach my schematic and my code for your reference3051.ads7825.pdf
I have selected external clock so I shorted R15 in my circuit.my Main issue is i got channel interference , means If i adjust 4th channel the 1st channel counts get affected by 10 to 20 counts.
If read only 3 channels .If i adjust 3 channel the same happens in 1 s
#include <p30f6012A.h>
#include <dsp.h>
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
#include <uart.h>
#include <can.h>
#include "General_functions.h"
#include "Disp_LCD.h"
//#include "ADC_Uart.h"
#define FCY 7500000 //7480550 // Fcy = FOCS / 4
#define CANFCY FCY * 4 // CAN Clock is multiplied by 4
#define BITRATE 1000000 // 1Mbps
#define NTQ 15 // Number of Tq cycles which will make the
//CAN Bit Timing .
#define BRP_VAL ((CANFCY/(2*NTQ*BITRATE))-1) //Formulae used for C1CFG1bits.BRP
#define CH_SEL1 _RB9
#define CH_SEL2 _RB8
#define RD_CNVRT _RB10
#define AD_BUSYOUT _RB11
#define AD_SYNOUT _RB12
#define CLK_TEST _RB15
#define AD_SDATA _RG12
#define AD_SCLK _RG14
_FOSC(FRC_PLL4); // FOSC = ~30mhz 29.9222 = ( 7.37MHZ * 4 Pll) +1.5%
_FWDT(WDT_OFF); /* Turn off the Watch-Dog Timer. */
_FBORPOR(MCLR_EN & PWRT_OFF); /* Enable MCLR reset pin and turn off the power-up timers. */
_FGS(CODE_PROT_OFF);
char *Bufptr;
char Buf[20];
//signed int ADCBUF[50];
int value;
int ADCOUNTS = 0;
unsigned char NegativePolFlag;
unsigned char count,Samples;
signed int ADCValue,ADCSampleVal;
unsigned int *ADC16Ptr;
signed long ADC_AVGCNTS;
unsigned char REMOTEFRAME = 0;
unsigned char DATAREADY = 0;
unsigned char ADDATAREADY = 0;
// unsigned int conversionResult[16];
//volatile unsigned int *ptr;
unsigned int OutData0[4] = {0x0043, 0x004F, 0x004D, 0x0030}; //Data = CAN0
unsigned int OutData1[2] = {0x0045, 0x046};
unsigned int OutData2[4] = {0x0047, 0x0048, 0x0049, 0x004A};
unsigned int OutData3[2] = {0x004B, 0x004C};
unsigned int InData0[4] = {0, 0, 0, 0};
unsigned int InData1[2] = {0, 0};
unsigned int InData2[4] = {0, 0, 0, 0};
unsigned int InData3[2] = {0, 0};
void __attribute__((interrupt, no_auto_psv)) _C1Interrupt(void)
{
IFS1bits.C1IF = 0; //Clear interrupt flag
if(C1INTFbits.TX0IF)
{
C1INTFbits.TX0IF = 0; //If the Interrupt is due to Transmit0 of CAN1 Clear the Interrupt
}
else if(C1INTFbits.TX1IF)
{
C1INTFbits.TX1IF = 0; //If the Interrupt is due to Transmit1 of CAN1 Clear the Interrupt
}
if(C1INTFbits.RX0IF)
{
C1INTFbits.RX0IF = 0; //If the Interrupt is due to Receive0 of CAN1 Clear the Interrupt
if(C1RX0DLCbits.RXRTR ==1)
{
REMOTEFRAME = 1;
}
else
{
REMOTEFRAME = 0;
}
InData0[0] = C1RX0B1;
InData0[1] = C1RX0B2; //Move the recieve data from Buffers to InData
InData0[2] = C1RX0B3;
InData0[3] = C1RX0B4;
DATAREADY = 1;
// turn on the LED
}
else if(C1INTFbits.RX1IF)
{
C1INTFbits.RX1IF = 0; //If the Interrupt is due to Receive1 of CAN1 Clear the Interrupt
InData1[0] = C1RX1B1; //Move the data received to Indata Registers
InData1[1] = C1RX1B2;
}
}
void __attribute__((__interrupt__)) _ADCInterrupt(void)
{
ADDATAREADY = 1;
ADCOUNTS = ADCBUF0;
// int i = 0;
// ptr = &ADCBUF0;
// while (i < 16)
// {
// conversionResult[i++] = *ptr++;
//}
//Clear the A/D Interrupt flag bit or else the CPU will
//keep vectoring back to the ISR
IFS0bits.ADIF = 0;
}
//--------------------------------------------------------------------------------------------------------------------------
void Init_Oscillator(void)
{
OSCCON = 0x0700; //
OSCTUN = 0x0002; // Tune 1.5%
OSCCON = 0x7846; // Lock Osc so that accidental overwrite is avoided
OSCCON = 0x9A57; // Lock bits
//while(!OSCCONbits.LOCK);
}
void Init_Device(void)
{
Init_Oscillator(); // May include Other Def in future
}
void CAN_Config_CH1(void)
{
C1CTRLbits.CANCKS = 0; // Select the CAN Master Clock .
// equal to 4 Fcy.(Fcy= 7.5)
C1CFG1bits.SJW=01; //Synchronized jump width time is 1 x TQ when SJW is equal to 00
C1CFG1bits.BRP = BRP_VAL; //((FCY/(2*NTQ*BITRATE))-1)
// C1CFG2 = 0x03F5; // SEG1PH=6Tq, SEG2PH=3Tq, PRSEG=5Tq
// Sample 3 times
// Each bit time is 15Tq
C1CFG2 = 0x04A3; //Sample 1 times pr 5 + ph1 5 + ph2 5
///Interrupt Section of CAN Peripheral
C1INTF = 0; //Reset all The CAN Interrupts
IFS1bits.C1IF = 0; //Reset the Interrupt Flag status register
C1INTE = 0x00FF; //Enable Tx0 int only F4
IEC1bits.C1IE = 1; //Enable the CAN1 Interrupt
}
void CAN_Config_CH2(void)
{
C2CTRLbits.CANCKS = 0; // Select the CAN Module Frequency Here CAN Master Clk is 4
// times equal to Fcy.(Fcy=7.5Mhz)
C2CFG1bits.SJW=1;//00; //Synchronized jump width time is 1 x TQ when SJW is equal to 00
C2CFG1bits.BRP = BRP_VAL; //((FCY/(2*NTQ*BITRATE))-1)
// C2CFG2 = 0x03F5; // SEG1PH=6Tq, SEG2PH=3Tq, PRSEG=5Tq
// Sample 3 times
// Each bit time is 15Tq
C2CFG2 = 0x04A3;
//CAN2 Interrupt Section
C2INTF = 0; //Reset all The CAN Interrupts
IFS2bits.C2IF = 0; //Reset the Interrupt Flag status register
// C2INTE = 0x00F1; //Enable Rx0 int only//F1
IEC2bits.C2IE = 1; //Enable the CAN2 Interrupt
}
void SendRTRframe(unsigned int identifier)
{
C1TX0CON = 0x0003;
C1TX0SID = identifier; // SID = 01010101010 (0x2AA)
C1TX0EID = 0x0000; // EID = 0000000000000000000 (0x00000)
C1TX0DLC = 0x0380; // RTR frame no data
}
//Functions:
//ADC_Init() is used to configure A/D to convert 16 samples of 1 input
//channel per interrupt. The A/D is set up for a using the ADRC oscillator
//Automatic conversion trigger is applied after 1Tad of sampling time.
//The input pin being acquired and converted is AN8,AN9,AN10,AN11.
void ADC_Init(void)
{
ADPCFG = 0xFFFF;
ADCSSL = 0;
_TRISB8 = 0; // OP CH_SEL2 RB8
_TRISB9 = 0; // OP CH_SEL1 RB9
_TRISB10 = 0; // OP RD_CNVRT RB10
_TRISB11 = 1; // IP AD_BSYOUT RB11
_TRISB12 = 1; // OP AD_SYNOUT RB12
_TRISG12 = 1; // OP AD_SDATA RG12
_TRISG14 = 0; // OP AD_SCLK RG14
}
/*
void ReadADCCounts(unsigned char Channel)
{
unsigned char ADI;
unsigned long ADCOUNTSDATA;
CH_SEL1 = 0;
CH_SEL2 = 0; // Select channel 0
// CS = LOW
RD_CNVRT = 0; // Start Convert Data
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
// while(AD_BUSYOUT); // Will bcome Low
RD_CNVRT = 1;
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
while(AD_BUSYOUT == 1); //Wait till conversion complete
//while(!AD_SYNOUT);
//while(AD_SYNOUT); // DATA Ready
//Delay_ms(1);
ADCOUNTSDATA = 0;
for(ADI =0; ADI <15;ADI++)
{
while(!AD_SCLK);
if(AD_SDATA)ADCOUNTSDATA |= 1;
else ADCOUNTSDATA |= 0;
if(ADI < 14) ADCOUNTSDATA <<= 1; // Dont shift 16th Bit
}
ADCSampleVal = ADCOUNTSDATA;
}
*/
void Delay_1micro()
{
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
}
void ReadADCCounts(unsigned char channel)
{
unsigned char ADI;
signed long ADCOUNTSDATA;
ADCSampleVal = 0;
if(channel==0){
CH_SEL1 = 0;
Nop();
Nop();
Nop();
CH_SEL2 = 0;
Nop();
Nop();
}
else if(channel == 1){
CH_SEL1 = 1;
Nop();
Nop();
Nop();
CH_SEL2 = 0;
Nop();
Nop();
}
else if(channel == 2){
CH_SEL1 = 0;
Nop();
Nop();
Nop();
CH_SEL2 = 1;
Nop();
Nop();
}
else if(channel == 3){
CH_SEL1 = 1;
Nop();
Nop();
Nop();
CH_SEL2 = 1;
Nop();
Nop();
}
//Select Ch 0
/*
CH_SEL1 = 1;
Nop();
Nop();
Nop();
CH_SEL2 = 0;
Delay_1micro();
*/
RD_CNVRT = 1;
Nop();
Nop();
Nop();
RD_CNVRT = 0; // Falling edge starts conv
Delay_1micro();
Delay_1micro();
RD_CNVRT = 1;
Nop();
Nop();
Nop();
while(AD_BUSYOUT == 0); //wait till convert
while(AD_SYNOUT == 0)
{
AD_SCLK = 0;
Delay_1micro();
AD_SCLK = 1;
Delay_1micro();
};
while(AD_SYNOUT == 1)
{
AD_SCLK = 0;
Delay_1micro();
AD_SCLK = 1;
Delay_1micro();
};
ADCOUNTSDATA = 0;
for(ADI =0; ADI < 16;ADI++)
{
AD_SCLK = 0;
Nop();
Nop();
Nop();
Delay_1micro();
if(AD_SDATA)ADCOUNTSDATA |= 1;
else ADCOUNTSDATA |= 0;
AD_SCLK = 1;
Nop();
Nop();
Nop();
if(ADI < 15) ADCOUNTSDATA <<= 1; // Dont shift 16th Bit
}
if (ADCOUNTSDATA & 0x8000)
{
ADCSampleVal = (~ADCOUNTSDATA) + 1;
ADCSampleVal |= 0x8000;
}
else ADCSampleVal = ADCOUNTSDATA;
}
int main(void)
{
signed int CH1ADC,CH2ADC,CH3ADC,CH4ADC;
unsigned int Avgcnt;
Init_Device();
InitLCDDisplay();
_TRISB15 = 0; //OP
ADC_Init();
ClearLcd();
lcd_goto(0);
lcd_puts("Adc Test..");
// Delay_1s(1);
ClearLcd();
lcd_goto(0);
lcd_puts("C:");
do{
ADC_AVGCNTS = 0;
CLK_TEST = 0;
for(Avgcnt = 0;Avgcnt < 500;Avgcnt++)
{
ReadADCCounts(0);
ADC_AVGCNTS+= (signed int)ADCSampleVal;
}
CH1ADC = (signed int)(ADC_AVGCNTS / 500);
CH1ADC = CH1ADC /2;
// CH1ADC = (signed int)ADCSampleVal;
CLK_TEST = 1;
lcd_goto(2);
sprintf(Buf,"%06Ld",CH1ADC);
lcd_putch(Buf[0]);
lcd_putch(Buf[1]);
lcd_putch(Buf[2]);
lcd_putch(Buf[3]);
lcd_putch(Buf[4]);
lcd_putch(Buf[5]);
//-----------------------------------------
lcd_goto(8);
lcd_puts("C:");
ADC_AVGCNTS = 0;
for(Avgcnt = 0;Avgcnt < 500;Avgcnt++)
{
ReadADCCounts(1);
ADC_AVGCNTS+= (signed int)ADCSampleVal;
}
CH1ADC = (signed int)(ADC_AVGCNTS / 500);
CH1ADC = CH1ADC /2;
// CH1ADC = (signed int)ADCSampleVal;
lcd_goto(10);
sprintf(Buf,"%06Ld",CH1ADC);
lcd_putch(Buf[0]);
lcd_putch(Buf[1]);
lcd_putch(Buf[2]);
lcd_putch(Buf[3]);
lcd_putch(Buf[4]);
lcd_putch(Buf[5]);
//---------------------------------------
lcd_goto(16);
lcd_puts("C:");
ADC_AVGCNTS = 0;
for(Avgcnt = 0;Avgcnt < 500;Avgcnt++)
{
ReadADCCounts(2);
ADC_AVGCNTS+= (signed int)ADCSampleVal;
}
CH1ADC = (signed int)(ADC_AVGCNTS / 500);
CH1ADC = CH1ADC /2;
// CH1ADC = (signed int)ADCSampleVal;
lcd_goto(18);
sprintf(Buf,"%06Ld",CH1ADC);
lcd_putch(Buf[0]);
lcd_putch(Buf[1]);
lcd_putch(Buf[2]);
lcd_putch(Buf[3]);
lcd_putch(Buf[4]);
lcd_putch(Buf[5]);
//---------------------------------------
lcd_goto(24);
lcd_puts("C:");
ADC_AVGCNTS = 0;
for(Avgcnt = 0;Avgcnt < 500;Avgcnt++)
{
ReadADCCounts(3);
ADC_AVGCNTS+= (signed int)ADCSampleVal;
}
CH1ADC = (signed int)(ADC_AVGCNTS / 500);
CH1ADC = CH1ADC /2;
// CH1ADC = (signed int)ADCSampleVal;
lcd_goto(26);
sprintf(Buf,"%06Ld",CH1ADC);
lcd_putch(Buf[0]);
lcd_putch(Buf[1]);
lcd_putch(Buf[2]);
lcd_putch(Buf[3]);
lcd_putch(Buf[4]);
lcd_putch(Buf[5]);
Delay_ms(20);
}
while(1);
}
Thanks with Regards
Radha.P
Hi Radha,
What sort of input signals are you looking at? The INA126 is a little on the slow side and you may not be getting the input settled in time between MUX changes. What sampling rate are you using with the ADS7825?
Hi Tom,
My Input signal is from Load Cell. And I have also bypassed the INA126 and directly given to Analog Input of ADC.
My Sampling Rate is 200 SPS Only. I already attached m code and Schematic for your ref. Due to this Error I m unable
to implement in my project . Is is solvable ? Or Not.
Thanks with Regards
Radha
Hello Radha,
Check the changes of the “ReadADCCounts” function in the attached text file.
void ReadADCCounts(unsigned char channel)
{
unsigned char ADI;
signed int ADCOUNTSDATA;
ADCSampleVal = 0;
ADCOUNTSDATA = 0;
AD_SCLK = 0; // Lets make sure clock idle is LOW
RD_CNVRT = 1; // R/C idle HIGH
while(AD_BUSYOUT == 0); //Verify that no conversion is taking place
Delay_1micro(); // Another delay just in case
//Select channel
if(channel==0){
CH_SEL1 = 0;
Nop();
Nop();
Nop();
CH_SEL2 = 0;
Nop();
Nop();
}
else if(channel == 1){
CH_SEL1 = 1;
Nop();
Nop();
Nop();
CH_SEL2 = 0;
Nop();
Nop();
}
else if(channel == 2){
CH_SEL1 = 0;
Nop();
Nop();
Nop();
CH_SEL2 = 1;
Nop();
Nop();
}
else if(channel == 3){
CH_SEL1 = 1;
Nop();
Nop();
Nop();
CH_SEL2 = 1;
Nop();
Nop();
}
Delay_1micro(); // Makes sure CH address is ready to be loaded
//Start Dummy Conversion (Load Channel Address)
RD_CNVRT = 1;
Nop();
Nop();
Nop();
RD_CNVRT = 0; // Falling edge starts Dummy conv
Delay_1micro();
RD_CNVRT = 1;
Nop();
Nop();
Nop();
while(AD_BUSYOUT == 0); //wait till convert
// End Dummy Conversion
//Big Delay to Capture the voltage at the Selected Channel
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
Delay_1micro();
//Start Conversion the Good conversion
RD_CNVRT = 1;
Nop();
Nop();
Nop();
RD_CNVRT = 0; // Falling edge starts selected Channel conv
Delay_1micro();
RD_CNVRT = 1;
Nop();
Nop();
Nop();
while(AD_BUSYOUT == 0); //wait till convert
// No SYNC tracking required
//First Dummy clock
AD_SCLK = 1;
Nop();
Nop();
Nop();
Delay_1micro();
AD_SCLK = 0;
Nop();
Nop();
Nop();
Delay_1micro();
//End First Dummy Clock
for(ADI =0; ADI < 16;ADI++)
{
AD_SCLK = 1;
Nop();
Nop();
Nop();
Delay_1micro();
AD_SCLK = 0;
if(AD_SDATA)ADCOUNTSDATA |= 1;
else ADCOUNTSDATA |= 0;
if(ADI < 15) ADCOUNTSDATA <<= 1; // Dont shift 16th Bit
Delay_1micro();
}
ADCSampleVal = ADCOUNTSDATA;
}
It includes:
1) Changed “signed long” (32bits) to “signed int”(16bits) to have direct conversion to 2’s complement.
2) Clock is set idle LOW and R/C is set idle HIGH, and check that /BUSY isn't low.
3) 1us delay before and after channels pins are set.
4) The dummy conversion connects the selected channel to the internal sample and hold cap. (Loads the Address pin values)
5) Big delay (10us) before the actual conversion. This makes sure the sample and hold cap has the right voltage value before the good conversion starts.
6) Good conversion start and ends
7) SYNC is not tracked. Instead, a “balanced” 500KHz (2us period) dummy clock is used with idle low polarity.
8) The 16 good bits are read after the falling edge of the “balanced” 500KHz clock. At the 16th loop, clock should idle low.
9) Removed 2’s complement correction code. Since the variable is “signed int”(16bit), the 16 bits captured already represent decimal values in 2’s complement format(-32768to+32767)
As for hardware, a bridge sensor cannot be connected to the ADC inputs, the resistance from the sensor will affect performance. It needs to have the INA126 in between the ADC input and the bridge.
The schematic shows that there is an RC filter between the ADC input and INA126 output. Since the resistance can introduce errors, just connect the INA126 output directly(R=0) without a cap to the ADC input. If the un-averaged data is more the 5 counts peak-to-peak, the CAP might be need, but don't use it for now.
Let us know if the performance improves with any of these software and hardware recommendations.
Best regards,
Rafael
Dear Rafael,
Thanks for your input. Now Channel interference and crosstalk cleared. But seems to be little slower when took average samples.
Thank you for solving.
Regards
Radha