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ADS1278EVM-PDK Firmware

Gaston Schelotto
Expert 2850 points
Other Parts Discussed in Thread: ADS1278EVM-PDK, ADS1278, ADCPRO, CDCE913, CLOCKPRO

I'd like to have a look at the ADS1278EVM-PDK firmware as well, specifically CLKR generation. I wonder if it uses CY22393 or VC55 Timers.

Could you provide this information to me?

thanks in advance,

Gaston

  • 0
    TI__Mastermind 23235 points

    Gaston -

    Please find the ADS1278 firmware attached.  Is there anything in particular that you are looking for?  This firmware is fairly specific to the evaluation system, so take that into consideration if/when you use it.

     

    Let us know if there is anything else that we can help with

    Greg

    ADS1278EVM_FW.zip
  • 0 in reply to Greg Hupp
    Expert 2850 points

    Greg, thank you for the attached firmware. In particular I'm looking for the method used to generate ADS1278 oversampling frequency through CLKR pin. In short, for a frequency of 51ksps is necessary a 51 x 256 = 13,056Mhz output tied to CLKR of ADS1278. How could I generate such an accurate rate from a DSP like C6747?

    Gaston

  • 0 in reply to Gaston Schelotto
    TI__Guru**** 180901 points

    Hi Gaston,

    How's Barcelona?  The clock in this firmware is generated by the McBSP peripheral - the setup is in the t1278_ob.c file.  You are limited to an integer divide of the DSPs main clock when using the McBSP port of the 5507/5509.  I believe the same is true for the C6747s McASP and SPI ports.  You may need to use a precision external clock source like we talked about last year with the C6727. 

  • 0 in reply to Tom Hendrick
    Expert 2850 points

    Hi Tom,

    There is a summer time in Barcelona that you shouldn't miss. On the other hand I just started to work as Independent Designer for a couple of companies. So no time to go to the beach. Well, I've already checked MMB0 schematics and related firmware. As you said, ADS1278 clock is generated by McBSP peripheral using its sample rate generator block. Going further this block is configured to be fed by an external clock through CLKX pin (CLKSM=1, SCLKME=1). I've tracked CLKX from MMB0 reaching the CLKC output of the CY22393 device. If I'm not wrong I'd say that this is the precision external clock used by McBSP. Could you confirm it? If it's true, where is the code for CY22393 configuration through 5507/5509 I2C bus?


    regards,
    Gaston

  • 0 in reply to Gaston Schelotto
    TI__Mastermind 23235 points

    Gaston -

    The information that you seek is located in the base ADCPro fw files that are attached.

    The files of interest will be mmb0files.c and clk.c.  Keep in mind that the calculations for the PLL are done in the LabView code and the PLL functions contained in the previously mentioned files relate to the settings made for the evaluation system.

    You may need to modify the functions in these files to take the settings/inputs from your source instead of Styx files.

     

    Let us know if there are any further questions,

    Greg

    ADCProFW.zip
  • 0 in reply to Greg Hupp
    Expert 2850 points

    Greg, I've been able to adapt ADCPro fw files to my C6747 EVM platform without much effort. Initialization and configuration of CY22393 work fine to me, great! Now I can drive ADS1278 clkr and adjust its rate as I need. Only one thing puzzles me. Why you have not used a TI part like CDCE913 for MMB0? This has a similar performance, cheaper than CY22393 and personally I prefer ClockPro programming software instead the Cypress CyberClocks.

    regards,

    gaston

  • 0 in reply to Gaston Schelotto
    TI__Mastermind 23235 points

    Gaston -

    The design of the MMB0 motherboard goes back  to 2003-2004, which pre-date the CDCE913, so this was probably the best option at the time.  There is no reason to think that this part wouldn't work in place of the Cypress device.  We do have long term plans to revise the MMB0 and definitely will be considering new devices at that time.

     

    Greg