Hi,
We are developing a programmer for TMS320F28x series used for inline production. We use our own programmer (containing an FPGA) to directly access the chip through the JTAG port.
To be clear, this means we will only use our own tooling, so not Code Composer or any TI programming POD (such as XDS510USB or any related devices).
What we plan to do is to write a firmware image to the RAM via JTAG, and then set the Program Counter and Stack Pointer through JTAG to execute the uploaded firmware image.
This uploaded image will then further take care of programming the flash.
After signing an NDA, we have received the JTAG emulation information from TI.
However there is still some information unclear after studying the datasheets we received.
We are now able to access the RAM through JTAG and read and write it, using or own hardware as mentioned.
However, it seems reading or writing to Core Registers (like Status Register and Program Counter) is still not possible, because we don’t know to which address these registers are memory mapped.
These addresses seem not be mentioned in documents spruf82_c28 and sprue64. Therefore we still can't access to CPU registers. I can't find any useful information in other public documents.
Could you tell us where we can find the addresses of memory mapped Core registers, such as Program Counter, Stack pointer, etc.?
Do we have to apply for another document containing this information?
Thanks in advance
Wouter
