interrupts in C++ : Significant that a Syntax error is generated when using extern C to make ISRs in C available to C++ methods

Greg Oakes

Using F28335 development kit (mixing C and C++), in one application and an OMAP (pure C++) with both ARM and DSP in another, all with CCS v5.

It appears that there may be a problem with the TI C/C++ compiler or with CCS when "extern C" is used to bring in C code for "interrupt void TINT0(void)", and all other ISRs, into C++.

GeorgeM composed the following TI Wiki entry in 2008 but he has no entries on the TI community prior to Oct 2008 and apparently none on this subject since:

http://processors.wiki.ti.com/index.php/Invoke_a_C%2B%2B_Class_Member_Function_from_an_Interrupt

I have implemented this solution with unacceptable results. I need a resolution that includes a statement that the Syntax error is inconsequential, i.e., a CCS bug that has no further consequences, or a quick bug fix, or a different solution ot mixed C and C++ that allows interrupts to be called from C++. The latter option is preferable.

Actually I did not have to implement anything since "extern C" is already used in DSP2833x_DefaultIsr.h which accompanies DSP2833x_DefaultIsr.c .

But when a copy of these files are renamed as hpp and cpp files and called by a Main in a cpp file, Syntax errors pop up - these is not the first YI-provided files in my use of the FlashingLeds example to be converted to C++ with success; and I have already integrated successfully my own C++ code that is relatively complex (using templates).

The Syntax errors affect neither the success of the compilation nor the apparent success of execution, but the errors/warning leave a bad feeling that the implementation may be unreliable.

The result from following the paradigm described in GerorgeM’s post is the Syntax error that I get in CCS – it is unacceptable to have a Syntax error flagged in the IDE which nevertheless appears to have no affect on the compilation or execution – compilation or execution both seem to be something that can be accomplished but with unknown reliability.

I have tried pragma interrupt, with no success. I have tried __interrupt without use of a pragma (note: 2x underscores), with no success.

The latter does not fix the Syntax error, but changes the view in CCS, in that the left margin is now hi-lited light blue, as shown in one of the following images.

Here is a list of screen captures as an exhibit that there are no compiler errors, and that there are syntax error warnings shown in the CCS Console, though they appear in the file listing pane.

CPP Syntax error

Syntax error warnings in C++ files using extern C on the functions

pragma interrupt error

"__pragma interrupt" Syntax error warning with blue hi-lited left margin

HPP Syntax error warnings using extern C - also Console shows no new errors with additional compile after previous compile

Console showing no associated errors or warnings after fresh compile of HPP which is displayed by CCS with Syntax error warnings

No H Syntax error warnings using extern C - fresh compile with function declarations commented out of C++/H++ Default_Isr.cpp/hpp

Console showing No associated errors or warnings after fresh compile of H which is displayed by CCS with No Syntax error warnings

over 13 years ago

AartiG over 13 years ago

TI__Guru**** 173310 points

Greg,

This sounds like an issue with the Indexer not recognizing some keywords in C++ files rather than a compiler/build issue. I found a similar issue that was reported prior to CCS 5.1 release where the "interrupt" keyword was not recognized in C++ files, but that was fixed for 5.1.

Which specific version of CCS are you using? Could you see if the issue is reproducible with a new clean workspace? So open a new workspace, import your project into it and see if the syntax errors are still displayed. We have seen some issues with these errors persisting when using older workspaces with CCS5.1, but go away when a new workspace is opened, as the updated indexer settings built into CCS only take effect with a new workspace.

If the errors still appear with a new workspace, could you please attach one of the .cpp/.hpp files that generates this error so I can reproduce it and submit a bug report?

Greg Oakes over 13 years ago

Intellectual 590 points

I just posted the following image after having attempted to attach to txt files. I did not get a clear view of the "view attachment" notification from within the under-construction post before "Posting" it, so I am afraid that the post failed. And I will eb in need of guidance in getting the files to you in some alternative fashion.

The origin of the source code I am working from is the C2000 Flashinf LEDs example project for F28335.

Greg Oakes over 13 years ago in reply to Greg Oakes

Intellectual 590 points

Attachment widget working better now, I think.

Fullscreen 4863.DSP2833x_DefaultCppIsr_hpp.txt Download

// TI File $Revision: /main/1 $
// Checkin $Date: August 18, 2006   13:45:37 $
//###########################################################################
//
// FILE:    DSP2833x_DefaultIsr.h
//
// TITLE:   DSP2833x Devices Default Interrupt Service Routines Definitions.
//
//###########################################################################
// $TI Release: 2833x/2823x Header Files V1.32 $
// $Release Date: June 28, 2010 $
//###########################################################################

/////////////////////// #ifndef DSP2833x_DEFAULT_ISR_H  // WHY CANNOT THIS BE USED ?
/////////////////////// #define DSP2833x_DEFAULT_ISR_H

  class C_Interrupts
  {
    public:

      /**
       * Retrieve the singleton instance variable.
       *
       * @return the singleton instance variable.
       */
      static C_Interrupts& GetInstance(void)
      {
         return instance;
      }

      // Function prototypes.
//      void Init_VectTbl(void);
//      static void VctrTbl(void);
      static void RemapCppPieVect(void);
      static void TINT0_ISR(void); // CPU-Timer 0
//    static void NMI_Intr(void);
//    static void Timer_Intr(void);
//    static void Unused_Intr(void);

    private:

      /** Singleton instance variable. */
      static C_Interrupts instance;

      /** Disallow usage of the constructor. */
      C_Interrupts(void){};

      /** Disallow usage of the destructor. */
      virtual ~C_Interrupts(void){};

      /** Disallow usage of the copy constructor. */
      C_Interrupts(const C_Interrupts &singleton);

      /** Disallow usage of the assignment operator. */
      C_Interrupts& operator=(const C_Interrupts &singleton);


  }; // class C_Interrupts




#ifdef __cplusplus
extern "C" {
#endif


//---------------------------------------------------------------------------
// Default Interrupt Service Routine Declarations:
// 
// The following function prototypes are for the 
// default ISR routines used with the default PIE vector table.
// This default vector table is found in the DSP2833x_PieVect.h 
// file.  
//

// Non-Peripheral Interrupts:
interrupt void INT13_ISR(void);     // XINT13 or CPU-Timer 1
interrupt void INT14_ISR(void);     // CPU-Timer2
interrupt void DATALOG_ISR(void);   // Datalogging interrupt
interrupt void RTOSINT_ISR(void);   // RTOS interrupt
interrupt void EMUINT_ISR(void);    // Emulation interrupt
interrupt void NMI_ISR(void);       // Non-maskable interrupt
interrupt void ILLEGAL_ISR(void);   // Illegal operation TRAP
interrupt void USER1_ISR(void);     // User Defined trap 1
interrupt void USER2_ISR(void);     // User Defined trap 2
interrupt void USER3_ISR(void);     // User Defined trap 3
interrupt void USER4_ISR(void);     // User Defined trap 4
interrupt void USER5_ISR(void);     // User Defined trap 5
interrupt void USER6_ISR(void);     // User Defined trap 6
interrupt void USER7_ISR(void);     // User Defined trap 7
interrupt void USER8_ISR(void);     // User Defined trap 8
interrupt void USER9_ISR(void);     // User Defined trap 9
interrupt void USER10_ISR(void);    // User Defined trap 10
interrupt void USER11_ISR(void);    // User Defined trap 11
interrupt void USER12_ISR(void);    // User Defined trap 12

// Group 1 PIE Interrupt Service Routines:
interrupt void  SEQ1INT_ISR(void);   // ADC Sequencer 1 ISR
interrupt void  SEQ2INT_ISR(void);   // ADC Sequencer 2 ISR
interrupt void  XINT1_ISR(void);     // External interrupt 1
interrupt void  XINT2_ISR(void);     // External interrupt 2
interrupt void  ADCINT_ISR(void);    // ADC

interrupt void  TINT0_ISR(void);     // Timer 0

interrupt void  WAKEINT_ISR(void);   // WD

// Group 2 PIE Interrupt Service Routines:
interrupt void EPWM1_TZINT_ISR(void);    // EPWM-1
interrupt void EPWM2_TZINT_ISR(void);    // EPWM-2
interrupt void EPWM3_TZINT_ISR(void);    // EPWM-3
interrupt void EPWM4_TZINT_ISR(void);    // EPWM-4
interrupt void EPWM5_TZINT_ISR(void);    // EPWM-5
interrupt void EPWM6_TZINT_ISR(void);    // EPWM-6

// Group 3 PIE Interrupt Service Routines:
interrupt void EPWM1_INT_ISR(void);    // EPWM-1
interrupt void EPWM2_INT_ISR(void);    // EPWM-2
interrupt void EPWM3_INT_ISR(void);    // EPWM-3
interrupt void EPWM4_INT_ISR(void);    // EPWM-4
interrupt void EPWM5_INT_ISR(void);    // EPWM-5
interrupt void EPWM6_INT_ISR(void);    // EPWM-6

// Group 4 PIE Interrupt Service Routines:
interrupt void ECAP1_INT_ISR(void);    // ECAP-1
interrupt void ECAP2_INT_ISR(void);    // ECAP-2
interrupt void ECAP3_INT_ISR(void);    // ECAP-3
interrupt void ECAP4_INT_ISR(void);    // ECAP-4
interrupt void ECAP5_INT_ISR(void);    // ECAP-5
interrupt void ECAP6_INT_ISR(void);    // ECAP-6

// Group 5 PIE Interrupt Service Routines:
interrupt void EQEP1_INT_ISR(void);    // EQEP-1
interrupt void EQEP2_INT_ISR(void);    // EQEP-2

// Group 6 PIE Interrupt Service Routines:
interrupt void SPIRXINTA_ISR(void);   // SPI-A
interrupt void SPITXINTA_ISR(void);   // SPI-A
interrupt void MRINTA_ISR(void);      // McBSP-A
interrupt void MXINTA_ISR(void);      // McBSP-A
interrupt void MRINTB_ISR(void);      // McBSP-B
interrupt void MXINTB_ISR(void);      // McBSP-B

// Group 7 PIE Interrupt Service Routines:
interrupt void DINTCH1_ISR(void);     // DMA-Channel 1
interrupt void DINTCH2_ISR(void);     // DMA-Channel 2
interrupt void DINTCH3_ISR(void);     // DMA-Channel 3
interrupt void DINTCH4_ISR(void);     // DMA-Channel 4
interrupt void DINTCH5_ISR(void);     // DMA-Channel 5
interrupt void DINTCH6_ISR(void);     // DMA-Channel 6

// Group 8 PIE Interrupt Service Routines:
interrupt void I2CINT1A_ISR(void);     // I2C-A
interrupt void I2CINT2A_ISR(void);     // I2C-A
interrupt void SCIRXINTC_ISR(void);    // SCI-C
interrupt void SCITXINTC_ISR(void);    // SCI-C

// Group 9 PIE Interrupt Service Routines:
interrupt void SCIRXINTA_ISR(void);    // SCI-A
interrupt void SCITXINTA_ISR(void);    // SCI-A
interrupt void SCIRXINTB_ISR(void);    // SCI-B
interrupt void SCITXINTB_ISR(void);    // SCI-B
interrupt void ECAN0INTA_ISR(void);    // eCAN-A
interrupt void ECAN1INTA_ISR(void);    // eCAN-A
interrupt void ECAN0INTB_ISR(void);    // eCAN-B
interrupt void ECAN1INTB_ISR(void);    // eCAN-B

// Group 10 PIE Interrupt Service Routines:

// Group 11 PIE Interrupt Service Routines:

// Group 12 PIE Interrupt Service Routines:
interrupt void  XINT3_ISR(void);     // External interrupt 3
interrupt void  XINT4_ISR(void);     // External interrupt 4
interrupt void  XINT5_ISR(void);     // External interrupt 5
interrupt void  XINT6_ISR(void);     // External interrupt 6
interrupt void  XINT7_ISR(void);     // External interrupt 7
interrupt void  LVF_ISR(void);       // Latched overflow flag
interrupt void  LUF_ISR(void);       // Latched underflow flag

// Catch-all for Reserved Locations For testing purposes:
interrupt void PIE_RESERVED(void);       // Reserved for test
interrupt void rsvd_ISR(void);           // for test
interrupt void INT_NOTUSED_ISR(void);    // for unused interrupts

#ifdef __cplusplus
}
#endif /* extern "C" */

/////////////////////// #endif    // end of DSP2833x_DEFAULT_ISR_H definition

//===========================================================================
// End of file.
//===========================================================================

Fullscreen 0028.DSP2833x_DefaultCppIsr_cpp.txt Download

// TI File $Revision: /main/2 $
// Checkin $Date: January 14, 2008   11:17:46 $
//###########################################################################
//
// FILE:	DSP2833x_DefaultIsr.c
//
// TITLE:	DSP2833x Device Default Interrupt Service Routines.
//
// This file contains shell ISR routines for the 2833x PIE vector table.
// Typically these shell ISR routines can be used to populate the entire PIE
// vector table during device debug.  In this manner if an interrupt is taken
// during firmware development, there will always be an ISR to catch it.
//
// As develpment progresses, these ISR rotuines can be eliminated and replaced
// with the user's own ISR routines for each interrupt.  Since these shell ISRs
// include infinite loops they will typically not be included as-is in the final
// production firmware.
//
//###########################################################################
// $TI Release: 2833x/2823x Header Files V1.32 $
// $Release Date: June 28, 2010 $
//###########################################################################

#include "DSP2833x_Device_WGO.h"     // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File

#include "DSP2833x_DefaultCppIsr.hpp"
#include "DSP2833x_PieVect.h"

#include <stdint.h>
#include <math.h>

//#define voltageScaler(v) (Uint16)((3.0/4095.0)*(float)(v)*(float)pow (2.0,13.0)) + 1
#define voltageScaler(v) (Uint16)((3.0/4095.0)*(float)(v)*8192.0) + 1

#define DIVIDE_DOWN_TO_10KHZ 5
#define DIVIDE_DOWN_TO_100HZ 500
#define DIVIDE_DOWN_TO_20HZ  2500
#define DIVIDE_DOWN_TO_1HZ   50000

#define TEST_MODE_PWR_SHUTOFF
#define TACT_MODE_PWR_NOT_SHUTOFF

#ifdef TEST_MODE_PWR_SHUTOFF
#endif

extern unsigned char SPA_to_SP_Msg[];

extern uint16_t encodingComplete;
extern uint16_t decodingReady;

extern uint16_t encodingReady;
extern uint16_t decodingComplete;

extern int32	SerialCommsTimer;

Uint16 buffIndexRX  = 0;
Uint16 buffIndexTX  = 0;
Uint16 byteToggleRX = 0;
Uint16 byteToggleTX = 0;

//Uint16 UnusedISR = 0;

Uint16 ADC_SampleTable[16];
//int16 ADC_Result[16];


int16 toggle1 = 0;
int16 toggle2 = 0;
int16 toggle3 = 0;


Uint16 divide_down_by_5     = DIVIDE_DOWN_TO_10KHZ;
Uint16 divide_down_by_500   = DIVIDE_DOWN_TO_100HZ - 1;
Uint16 divide_down_by_2500  = DIVIDE_DOWN_TO_20HZ - 2;
Uint16 divide_down_by_50000 = DIVIDE_DOWN_TO_1HZ - 3;

void ADC_DualSimultaneous_Update    (Uint16 *ADC_Results);
void ADC_CascadeSimultaneous_Update (Uint16 *ADC_Results);
void ADC_BIT_Update           (const Uint16 *ADC_Results);
void SCI_SerialCommRcv_Update (void);
void SCI_SerialCommXmt_Update (void);
void ISR_Unexpected(void);

extern void SerialHostComms();

void Process50KHz_Update(void);
void Process10KHz_Update(void);
void Process100Hz_Update(void);
void Process20Hz_Update(void);
void Process1Hz_Update(void);


// Create an instance of the class structure above and give it a data section
// name that the linker can locate in memory.
// #pragma DATA_SECTION("INTR_VECS");
// SP::C_Intr_Proc::Intr_Vector_Table_t SP::C_Intr_Proc::INTR_VECS;

C_Interrupts C_Interrupts::instance;


// -----------------------------------------------------------
// PIE Group 1 - MUXed into CPU INT1
// -----------------------------------------------------------

// To receive more interrupts from this PIE group, acknowledge
// the individual interrupt after processing call to it
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

// INT1.7



//void RemapCppPieVect(void);

//void C_Interrupts::RemapCppPieVect(void)
void RemapCppPieVect(void)
{
//	//WGO Evaluate CPP Interrupts Initialization
//	EALLOW;
// 	PieVectTable.TINT0 = (PINT) &(C_Interrupts::TINT0_ISR);
//	EDIS;
    asm ("      ESTOP0");
    for(;;);
}



#pragma INTERRUPT;
//#pragma CODE_SECTION("ramfuncs");
void C_Interrupts::TINT0_ISR(void) // CPU-Timer 0
{
	//	GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;


    // Used for 50 kHz interrupt overall timing.
    GpioDataRegs.GPBSET.bit.GPIO63 = 1;

    if (toggle1 == 0)	// Set GPIO59 high.
    { GpioDataRegs.GPBSET.bit.GPIO59   = 1; toggle1 = 1; }
    else					// Set GPIO59 low.
    { GpioDataRegs.GPBCLEAR.bit.GPIO59 = 1; toggle1 = 0; }


    // Create a 10 kHz, 100 Hz, 20 Hz, 1 Hz processes from the 50 kHz process.
    --divide_down_by_5;
    --divide_down_by_500;
    --divide_down_by_2500;
    --divide_down_by_50000;

    // 50 kHz Update.
    Process50KHz_Update();

    // 10 kHz Update.
    if (divide_down_by_5 <= 0)     { Process10KHz_Update(); }

    // 100 Hz Update.
    if (divide_down_by_500 <= 0)   { Process100Hz_Update(); }

    // 20 Hz Update.
    if (divide_down_by_2500 <= 0)  { Process20Hz_Update();  }

    // 1 Hz Update.
    if (divide_down_by_50000 <= 0) { Process1Hz_Update();   }

    // Set GPIO63 low.
    GpioDataRegs.GPBCLEAR.bit.GPIO63 = 1;

 	PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}


void Process50KHz_Update(void)
{
//****************************************************************************************
//**************************** ADC UPDATE and BIT PROCESSING *****************************

//  ADC_DualSimultaneous_Update    (&ADC_SampleTable[0]);
    ADC_CascadeSimultaneous_Update (&ADC_SampleTable[0]);
    ADC_BIT_Update                 (&ADC_SampleTable[0]);

//  ISR_Unexpected();

//**************************** ADC UPDATE and BIT PROCESSING *****************************
//****************************************************************************************
}

void Process10KHz_Update(void)
{
    divide_down_by_5 = DIVIDE_DOWN_TO_10KHZ;

    // Used for 50 kHz interrupt overall timing.
    GpioDataRegs.GPBSET.bit.GPIO63 = 1;				// SHOULD NOT BE REPEATED HERE ?

    if (toggle2 == 0)	// Set GPIO60 high.
    { GpioDataRegs.GPBSET.bit.GPIO60   = 1; toggle2 = 1; }
    else				// Set GPIO60 low.
    { GpioDataRegs.GPBCLEAR.bit.GPIO60 = 1; toggle2 = 0; }

//****************************************************************************************
//*********************** RECEIVE MESSAGE TO BUFFER FOR DECODING *************************

    SCI_SerialCommRcv_Update ();

//*********************** RECEIVE MESSAGE TO BUFFER FOR DECODING *************************
//****************************************************************************************
//****************************************************************************************
//*************************** TRANSMIT ENCODED MESSAGE BUFFER ****************************

    SCI_SerialCommXmt_Update ();

//*************************** TRANSMIT ENCODED MESSAGE BUFFER ****************************
//****************************************************************************************
}

void Process100Hz_Update(void)
{
    divide_down_by_500 = DIVIDE_DOWN_TO_100HZ;

    if (toggle3 == 0)	// Set GPIO62 high.
    { GpioDataRegs.GPBSET.bit.GPIO62   = 1; toggle3 = 1; }
    else				// Set GPIO62 low.
    { GpioDataRegs.GPBCLEAR.bit.GPIO62 = 1; toggle3 = 0; }
}

void Process20Hz_Update(void)
{
    divide_down_by_2500 = DIVIDE_DOWN_TO_20HZ;

//	  if (toggle3 == 0)	// Set GPIO62 high.  //COMMENTED OUT SINCE USING IN 100 HZ LOOP
//	  { GpioDataRegs.GPBSET.bit.GPIO62   = 1; toggle3 = 1; }
//	  else				// Set GPIO62 low.
//	  { GpioDataRegs.GPBCLEAR.bit.GPIO62 = 1; toggle3 = 0; }

//WGO encodingComplete = 1;

// 	  SerialHostComms();		// Serialport controls LED2 (GPIO-31)
//	  SerialCommsTimer++;
}

void Process1Hz_Update(void)
{
    divide_down_by_50000 = DIVIDE_DOWN_TO_1HZ;

    // toggle GPIO34 which controls LD3 on most controlCARDs
    GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;
}

void ADC_DualSimultaneous_Update (Uint16 *ADC_Results)
{
	//  while (AdcRegs.ADCST.bit.INT_SEQ2 == 0) {}  // Wait for SEQ2 interrupt (Dual)
	//         AdcRegs.ADCST.bit.INT_SEQ2_CLR = 1;  // Clear    SEQ2 interrupt (Dual)

	if (AdcRegs.ADCST.bit.INT_SEQ2 == 1) {      // If       SEQ2 EOS
	    AdcRegs.ADCST.bit.INT_SEQ2_CLR = 1;     // Clear    SEQ2 interrupt
	    AdcRegs.ADCTRL2.bit.SOC_SEQ1   = 0x1;   // Re-SOC   SEQ1
	    AdcRegs.ADCTRL2.bit.SOC_SEQ2   = 0x1; } // Re-SOC   SEQ2

    ADC_Results[0]  = voltageScaler((AdcRegs.ADCRESULT0>>4) );
    ADC_Results[1]  = voltageScaler((AdcRegs.ADCRESULT1>>4) );
    ADC_Results[2]  = voltageScaler((AdcRegs.ADCRESULT2>>4) );
    ADC_Results[3]  = voltageScaler((AdcRegs.ADCRESULT3>>4) );
    ADC_Results[4]  = voltageScaler((AdcRegs.ADCRESULT4>>4) );
    ADC_Results[5]  = voltageScaler((AdcRegs.ADCRESULT5>>4) );
    ADC_Results[6]  = voltageScaler((AdcRegs.ADCRESULT6>>4) );
    ADC_Results[7]  = voltageScaler((AdcRegs.ADCRESULT7>>4) );
    ADC_Results[8]  = voltageScaler((AdcRegs.ADCRESULT8>>4) );
    ADC_Results[9]  = voltageScaler((AdcRegs.ADCRESULT9>>4) );
    ADC_Results[10] = voltageScaler((AdcRegs.ADCRESULT10>>4) );
    ADC_Results[11] = voltageScaler((AdcRegs.ADCRESULT11>>4) );
    ADC_Results[12] = voltageScaler((AdcRegs.ADCRESULT12>>4) );
    ADC_Results[13] = voltageScaler((AdcRegs.ADCRESULT13>>4) );
    ADC_Results[14] = voltageScaler((AdcRegs.ADCRESULT14>>4) );
    ADC_Results[15] = voltageScaler((AdcRegs.ADCRESULT15>>4) );

	//    AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 0x1; // Re-SOC SEQ1 (Dual Sequential)
	//    AdcRegs.ADCTRL2.bit.SOC_SEQ2 = 0x1; // Re-SOC SEQ2 (Dual Sequential)
}

void ADC_CascadeSimultaneous_Update (Uint16 *ADC_Results)
{
	//  while (AdcRegs.ADCST.bit.INT_SEQ1== 0) {}   // Wait for SEQ1 interrupt (Cascade)
	//         AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;  // Clear    SEQ1 interrupt (Cascade)

    ADC_Results[0]  = voltageScaler((AdcRegs.ADCRESULT0>>4) );
    ADC_Results[1]  = voltageScaler((AdcRegs.ADCRESULT1>>4) );
    ADC_Results[2]  = voltageScaler((AdcRegs.ADCRESULT2>>4) );
    ADC_Results[3]  = voltageScaler((AdcRegs.ADCRESULT3>>4) );
    ADC_Results[4]  = voltageScaler((AdcRegs.ADCRESULT4>>4) );
    ADC_Results[5]  = voltageScaler((AdcRegs.ADCRESULT5>>4) );
    ADC_Results[6]  = voltageScaler((AdcRegs.ADCRESULT6>>4) );
    ADC_Results[7]  = voltageScaler((AdcRegs.ADCRESULT7>>4) );
    ADC_Results[8]  = voltageScaler((AdcRegs.ADCRESULT8>>4) );
    ADC_Results[9]  = voltageScaler((AdcRegs.ADCRESULT9>>4) );
    ADC_Results[10] = voltageScaler((AdcRegs.ADCRESULT10>>4) );
    ADC_Results[11] = voltageScaler((AdcRegs.ADCRESULT11>>4) );
    ADC_Results[12] = voltageScaler((AdcRegs.ADCRESULT12>>4) );
    ADC_Results[13] = voltageScaler((AdcRegs.ADCRESULT13>>4) );
    ADC_Results[14] = voltageScaler((AdcRegs.ADCRESULT14>>4) );
    ADC_Results[15] = voltageScaler((AdcRegs.ADCRESULT15>>4) );

	AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 0x1; // Re-SOC SEQ1 (Cascade Simultaneous)
}


void ADC_BIT_Update (const Uint16 *ADC_Results)
{
    Uint16 i;

    int16 Error[16];

    static Uint16 Error_Record[16]          = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
    static const Uint16 Error_Indicator[32] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,
	                                           0,0,0,0,0,0,0,0,0,0,0,1,0,0,1,1};
    static const int16 HIGH_LIMIT = 3190;
    static const int16 LOW_LIMIT  = 0;

    for (i = 0; i < 16; i++)
    {
       // Test the voltage for out of bounds.
       if (ADC_SampleTable[i] >= HIGH_LIMIT)
       {
         //Record an error.
         Error_Record[i] = ((Error_Record[i] << 1) | 0x1) & 0x1f;
         Error[i]        =   Error_Indicator[Error_Record[i]];
       }
       else if (ADC_SampleTable[i] <= LOW_LIMIT)
       {
         //Record an error.
         Error_Record[i] = ((Error_Record[i] << 1) | 0x1) & 0x1f;
         Error[i]        =   Error_Indicator[Error_Record[i]];
       }
       else
       {
         //Record a pass.
         Error_Record[i] =  (Error_Record[i] << 1) & 0x1f;
         Error[i]        =   Error_Indicator[Error_Record[i]];
       }
    }

}


void SCI_SerialCommRcv_Update (void)
{
   unsigned char rcvWord;
   static uint16_t numWordsRX = 0xFFFF;

   // maybe "while" // wait for XRDY =1 for empty state
   if((SciaRegs.SCIFFRX.bit.RXFFST != 0)) // & decodingComplete)
   {
	   GpioDataRegs.GPBTOGGLE.bit.GPIO61 = 1;

	   if (byteToggleRX == 0)
	   {
		   byteToggleRX = 1;
		   rcvWord=(unsigned char)SciaRegs.SCIRXBUF.all << 8;
//		   rcvWord = SciaRegs.SCIRXBUF.all << 8;
	   }
	   else
	   {
		   byteToggleRX = 0;
		   rcvWord = rcvWord | ((unsigned char)SciaRegs.SCIRXBUF.all & 0xFF);
//		   rcvWord = rcvWord | (SciaRegs.SCIRXBUF.all & 0xFF);

		   SPA_to_SP_Msg[buffIndexRX] = rcvWord; // | ((unsigned char)SciaRegs.SCIRXBUF.all & 0xFF);

		   if(buffIndexRX == 1)
		   {
			   numWordsRX = SPA_to_SP_Msg[buffIndexRX] & 0xFF;
		   }

		   buffIndexRX++; // this may need to be moved down
	   }

	   if(buffIndexRX >= numWordsRX >> 1)
	   {
		   buffIndexRX      = 0;
		   numWordsRX       = 0xFFFF;

		   decodingComplete = 0;
		   decodingReady    = 1;
	   }

   }
}


void SCI_SerialCommXmt_Update (void)
{
   static uint16_t numWordsTX = 0;

   if((SciaRegs.SCIFFTX.bit.TXFFST != 16) & encodingComplete)
   {
	   encodingReady    = 0;

	   if (buffIndexTX == 0)
	   {
		   numWordsTX = SPA_to_SP_Msg[1] & 0xFF;
	   }

	   if (byteToggleTX == 0)
	   {
		   byteToggleTX = 1;
		   SciaRegs.SCITXBUF = SPA_to_SP_Msg[buffIndexTX] >> 8;
	   }
	   else
	   {
		   byteToggleTX = 0;
		   SciaRegs.SCITXBUF = SPA_to_SP_Msg[buffIndexTX] & 0xFF;

		   buffIndexTX++;
	   }

	   if (buffIndexTX >= numWordsTX)
	   {
		   buffIndexTX      = 0;

		   encodingComplete = 0;
		   encodingReady    = 1;
	   }
   }
}


//void ISR_Unexpected (void)
//{
//	if (UnusedISR > 0)
//	{
//         // To receive more interrupts from this PIE group, acknowledge this interrupt
//         // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
//
//         // Next two lines for debug only to halt the processor here
//         // Remove after inserting ISR Code
//
//         asm ("      ESTOP0");
//         for(;;);
//	}
//}
//
//interrupt void NMI_ISR(void)     {
//	UnusedISR++;
//} // Non-maskable interrupt
//
//
//interrupt void ILLEGAL_ISR(void) {
//	UnusedISR++;} // Illegal operation TRAP
//
//
//// Connected to INT13 of CPU (use MINT13 mask):
//// Note CPU-Timer1 is reserved for TI use,
//// however XINT13 ISR can be used by the user.
//interrupt void INT13_ISR(void)   {
//	//WGO GpioDataRegs.GPATOGGLE.bit.GPIO31 = 1;
//	int16 i;
//	for(i=1;i<10;i++);
//	//UnusedISR++;
//} // INT13 or CPU-Timer1
//
//// Note CPU-Timer2 is reserved for TI use.
//interrupt void INT14_ISR(void)   {
//	//WGO GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;
//	int16 i;
//	for(i=1;i<10;i++);
//	//UnusedISR++;
//} // CPU-Timer2
//
//
//interrupt void DATALOG_ISR(void) {
//	UnusedISR++;} // Datalogging interrupt
//
//
//interrupt void RTOSINT_ISR(void) {
//	UnusedISR++;} // RTOS interrupt
//
//
//interrupt void EMUINT_ISR(void)  {
//	UnusedISR++;} // Emulation interrupt
//
//
//interrupt void USER1_ISR(void)   {
//	UnusedISR++;} // User Defined trap 1
//
//
//interrupt void USER2_ISR(void)   {
//	UnusedISR++;} // User Defined trap 2
//
//
//interrupt void USER3_ISR(void)   {
//	UnusedISR++;} // User Defined trap 3
//
//
//interrupt void USER4_ISR(void)   {
//	UnusedISR++;} // User Defined trap 4
//
//
//interrupt void USER5_ISR(void)   {
//	UnusedISR++;} // User Defined trap 5
//
//
//interrupt void USER6_ISR(void)   {
//	UnusedISR++;} // User Defined trap 6
//
//
//interrupt void USER7_ISR(void)   {
//	UnusedISR++;} // User Defined trap 7
//
//
//interrupt void USER8_ISR(void)   {
//	UnusedISR++;} // User Defined trap 8
//
//
//interrupt void USER9_ISR(void)   {
//	UnusedISR++;} // User Defined trap 9
//
//
//interrupt void USER10_ISR(void)  {
//	UnusedISR++;} // User Defined trap 10
//
//
//interrupt void USER11_ISR(void)  {
//	UnusedISR++;} // User Defined trap 11
//
//
//interrupt void USER12_ISR(void)  {
//	UnusedISR++;} // User Defined trap 12
//
//// -----------------------------------------------------------
//// PIE Group 1 - MUXed into CPU INT1
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
//
//// INT1.1
//interrupt void SEQ1INT_ISR(void) {
//	UnusedISR++;}  //SEQ1 ADC
//
//// INT1.2
//interrupt void SEQ2INT_ISR(void) {
//	UnusedISR++;}  //SEQ2 ADC
//
//// INT1.3 - Reserved
//
//// INT1.4
//interrupt void XINT1_ISR(void)   {
//	UnusedISR++;}
//
//// INT1.5
//interrupt void XINT2_ISR(void)   {
//	UnusedISR++;}
//
//// INT1.6
//interrupt void ADCINT_ISR(void)  {
//	UnusedISR++;}  // ADC
//
//// INT1.8
//interrupt void WAKEINT_ISR(void) {
//	UnusedISR++;}  // WD, LOW Power
//
//// -----------------------------------------------------------
//// PIE Group 2 - MUXed into CPU INT2
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
//
//// INT2.1
//interrupt void EPWM1_TZINT_ISR(void) {
//	UnusedISR++;}  // EPWM-1
//
//// INT2.2
//interrupt void EPWM2_TZINT_ISR(void) {
//	UnusedISR++;}  // EPWM-2
//
//// INT2.3
//interrupt void EPWM3_TZINT_ISR(void) {
//	UnusedISR++;}  // EPWM-3
//
//// INT2.4
//interrupt void EPWM4_TZINT_ISR(void) {
//	UnusedISR++;}  // EPWM-4
//
//// INT2.5
//interrupt void EPWM5_TZINT_ISR(void) {
//	UnusedISR++;}  // EPWM-5
//
//// INT2.6
//interrupt void EPWM6_TZINT_ISR(void) {
//	UnusedISR++;}  // EPWM-6
//
//// INT2.7 - Reserved
//// INT2.8 - Reserved
//
//// -----------------------------------------------------------
//// PIE Group 3 - MUXed into CPU INT3
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
//
//// INT 3.1
//interrupt void EPWM1_INT_ISR(void) {
//	UnusedISR++;}  // EPWM-1
//
//// INT3.2
//interrupt void EPWM2_INT_ISR(void) {
//	UnusedISR++;}  // EPWM-2
//
//// INT3.3
//interrupt void EPWM3_INT_ISR(void) {
//	UnusedISR++;}  // EPWM-3
//
//// INT3.4
//interrupt void EPWM4_INT_ISR(void) {
//	UnusedISR++;}  // EPWM-4
//
//// INT3.5
//interrupt void EPWM5_INT_ISR(void) {
//	UnusedISR++;}  // EPWM-5
//
//// INT3.6
//interrupt void EPWM6_INT_ISR(void) {
//	UnusedISR++;}  // EPWM-6
//
//// INT3.7 - Reserved
//// INT3.8 - Reserved
//
//
//// -----------------------------------------------------------
//// PIE Group 4 - MUXed into CPU INT4
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
//
//// INT 4.1
//interrupt void ECAP1_INT_ISR(void) {
//	UnusedISR++;}  // ECAP-1
//
//// INT4.2
//interrupt void ECAP2_INT_ISR(void) {
//	UnusedISR++;}  // ECAP-2
//
//// INT4.3
//interrupt void ECAP3_INT_ISR(void) {
//	UnusedISR++;}  // ECAP-3
//
//// INT4.4
//interrupt void ECAP4_INT_ISR(void) {
//	UnusedISR++;}  // ECAP-4
//
//// INT4.5
//interrupt void ECAP5_INT_ISR(void) {
//	UnusedISR++;}  // ECAP-5
//
//// INT4.6
//interrupt void ECAP6_INT_ISR(void) {
//	UnusedISR++;}  // ECAP-6
//
//// INT4.7 - Reserved
//// INT4.8 - Reserved
//
//// -----------------------------------------------------------
//// PIE Group 5 - MUXed into CPU INT5
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
//
//// INT 5.1
//interrupt void EQEP1_INT_ISR(void) {
//	UnusedISR++;}  // EQEP-1
//
//// INT5.2
//interrupt void EQEP2_INT_ISR(void) {
//	UnusedISR++;}  // EQEP-2
//
//// INT5.3 - Reserved
//// INT5.4 - Reserved
//// INT5.5 - Reserved
//// INT5.6 - Reserved
//// INT5.7 - Reserved
//// INT5.8 - Reserved
//
//// -----------------------------------------------------------
//// PIE Group 6 - MUXed into CPU INT6
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
//
//// INT6.1
//interrupt void SPIRXINTA_ISR(void) {
//	UnusedISR++;}  // SPI-A
//
//// INT6.2
//interrupt void SPITXINTA_ISR(void) {
//	UnusedISR++;}  // SPI-A
//
//// INT6.3
//interrupt void MRINTB_ISR(void)    {
//	UnusedISR++;}  // McBSP-B
//
//// INT6.4
//interrupt void MXINTB_ISR(void)    {
//	UnusedISR++;}  // McBSP-B
//
//// INT6.5
//interrupt void MRINTA_ISR(void)    {
//	UnusedISR++;}  // McBSP-A
//
//// INT6.6
//interrupt void MXINTA_ISR(void)    {
//	UnusedISR++;}  // McBSP-A
//
//// INT6.7 - Reserved
//// INT6.8 - Reserved
//
//// -----------------------------------------------------------
//// PIE Group 7 - MUXed into CPU INT7
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
//
//// INT7.1
//interrupt void DINTCH1_ISR(void) {
//	UnusedISR++;}   // DMA
//
//// INT7.2
//interrupt void DINTCH2_ISR(void) {
//	UnusedISR++;}   // DMA
//
//// INT7.3
//interrupt void DINTCH3_ISR(void) {
//	UnusedISR++;}   // DMA
//
//// INT7.4
//interrupt void DINTCH4_ISR(void) {
//	UnusedISR++;}   // DMA
//
//// INT7.5
//interrupt void DINTCH5_ISR(void) {
//	UnusedISR++;}   // DMA
//
//// INT7.6
//interrupt void DINTCH6_ISR(void) {
//	UnusedISR++;}   // DMA
//
//// INT7.7 - Reserved
//// INT7.8 - Reserved
//
//// -----------------------------------------------------------
//// PIE Group 8 - MUXed into CPU INT8
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
//
//// INT8.1
//interrupt void I2CINT1A_ISR(void) {
//	UnusedISR++;} // I2C-A
//
//// INT8.2
//interrupt void I2CINT2A_ISR(void) {
//	UnusedISR++;} // I2C-A
//
//// INT8.3 - Reserved
//// INT8.4 - Reserved
//
//// INT8.5
//interrupt void SCIRXINTC_ISR(void) {
//	UnusedISR++;} // SCI-C
//
//// INT8.6
//interrupt void SCITXINTC_ISR(void) {
//	UnusedISR++;} // SCI-C
//
//// INT8.7 - Reserved
//// INT8.8 - Reserved
//
//// -----------------------------------------------------------
//// PIE Group 9 - MUXed into CPU INT9
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
//
//// INT9.1
//interrupt void SCIRXINTA_ISR(void) {
//	UnusedISR++;} // SCI-A
//
//// INT9.2
//interrupt void SCITXINTA_ISR(void) {
//	UnusedISR++;} // SCI-A
//
//// INT9.3
//interrupt void SCIRXINTB_ISR(void) {
//	UnusedISR++;} // SCI-B
//
//// INT9.4
//interrupt void SCITXINTB_ISR(void) {
//	UnusedISR++;} // SCI-B
//
//// INT9.5
//interrupt void ECAN0INTA_ISR(void) {
//	UnusedISR++;} // eCAN-A
//
//// INT9.6
//interrupt void ECAN1INTA_ISR(void) {
//	UnusedISR++;} // eCAN-A
//
//// INT9.7
//interrupt void ECAN0INTB_ISR(void) {
//	UnusedISR++;} // eCAN-B
//
//// INT9.8
//interrupt void ECAN1INTB_ISR(void) {
//	UnusedISR++;} // eCAN-B
//
//// -----------------------------------------------------------
//// PIE Group 10 - MUXed into CPU INT10
//// -----------------------------------------------------------
//
//// INT10.1 - Reserved
//// INT10.2 - Reserved
//// INT10.3 - Reserved
//// INT10.4 - Reserved
//// INT10.5 - Reserved
//// INT10.6 - Reserved
//// INT10.7 - Reserved
//// INT10.8 - Reserved
//
//// -----------------------------------------------------------
//// PIE Group 11 - MUXed into CPU INT11
//// -----------------------------------------------------------
//
//// INT11.1 - Reserved
//// INT11.2 - Reserved
//// INT11.3 - Reserved
//// INT11.4 - Reserved
//// INT11.5 - Reserved
//// INT11.6 - Reserved
//// INT11.7 - Reserved
//// INT11.8 - Reserved
//
//// -----------------------------------------------------------
//// PIE Group 12 - MUXed into CPU INT12
//// -----------------------------------------------------------
//
//// To receive more interrupts from this PIE group, acknowledge
//// the individual interrupt after processing call to it
//// PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
//
//// INT12.1
//interrupt void XINT3_ISR(void) {
//	UnusedISR++;} // External Interrupt
//
//// INT12.2
//interrupt void XINT4_ISR(void) {
//	UnusedISR++;} // External Interrupt
//
//// INT12.3
//interrupt void XINT5_ISR(void) {
//	UnusedISR++;} // External Interrupt
//
//// INT12.4
//interrupt void XINT6_ISR(void) {
//	UnusedISR++;} // External Interrupt
//
//// INT12.5
//interrupt void XINT7_ISR(void) {
//	UnusedISR++;} // External Interrupt
//
//// INT12.6 - Reserved
//
//// INT12.7
//interrupt void LVF_ISR(void)   {
//	UnusedISR++;} // Latched overflow
//
//// INT12.8
//interrupt void LUF_ISR(void)   {
//	UnusedISR++;} // Latched underflow
//
//
////---------------------------------------------------------------------------
//// Catch All Default ISRs:
////
//
//interrupt void PIE_RESERVED(void)   // Reserved space.  For test.
//{
//  asm ("      ESTOP0");
//  for(;;);
//}
//
//interrupt void rsvd_ISR(void)       // For test
//{
//  asm ("      ESTOP0");
//  for(;;);
//}


//===========================================================================
// End of file.
//===========================================================================

Greg Oakes over 13 years ago in reply to Greg Oakes

Intellectual 590 points

Same problem when imported into a new Workspace. But perhaps the compiler issues shown above are at issue ?

AartiG over 13 years ago in reply to Greg Oakes

TI__Guru**** 173310 points

Greg,

Thanks for providing the files. I can reproduce the editor syntax errors and have submitted bug # SDSCM00044079 agains the CCS IDE. They look to be purely indexer issues and should not affect the output of build itself. Feel free to track the status of the bug using the SDOWP link in my signature.

Greg Oakes over 13 years ago in reply to AartiG

Intellectual 590 points

AartiG,

Thanks for your help but ...

Perhaps the solution will take not of this, but it is probably more than eliminating the Syntax Error when the keyword is "interrupt" is observed.

In C++, functions used as ISRs should not use this keyword; instead the storage class for the function return only should precede the name on the same line and the line with the name should be preceded with a line issuing the "#pragma INTERRUPT;" pragma.

This is particularly relevant to your resolution because when I use the pragma instead on the "interrupt" keyword the function is not treated as an interrupt - context is not saved as can be observed in the Disassembly window and the interrupt knows not where to return and hits a Trap never to return at all - this is perhaps until I Classify my ISR functions (specified with the pragma) and qualify their storage class as "static".

But the interrupt keyword should not even be allowed in C++ to precede a function return value storage class identifier it would seem.

AartiG over 13 years ago in reply to Greg Oakes

TI__Guru**** 173310 points

Greg Oakes said:

In C++, functions used as ISRs should not use this keyword; instead the storage class for the function return only should precede the name on the same line and the line with the name should be preceded with a line issuing the "#pragma INTERRUPT;" pragma.

This is particularly relevant to your resolution because when I use the pragma instead on the "interrupt" keyword the function is not treated as an interrupt - context is not saved as can be observed in the Disassembly window and the interrupt knows not where to return and hits a Trap never to return at all - this is perhaps until I Classify my ISR functions (specified with the pragma) and qualify their storage class as "static".

But the interrupt keyword should not even be allowed in C++ to precede a function return value storage class identifier it would seem.

Greg,

These questions are more related to the compiler I think, especially if the pragma does not treat the function as interrupt. So I think they would get a better answer from the compiler forum. Would you mind posting this specific issue to the compiler forum so the experts there can comment further?

George Mock over 13 years ago in reply to Greg Oakes

TI__Guru**** 249260 points

Greg Oakes said:

Perhaps the solution will take not of this, but it is probably more than eliminating the Syntax Error when the keyword is "interrupt" is observed.

In C++, functions used as ISRs should not use this keyword; instead the storage class for the function return only should precede the name on the same line and the line with the name should be preceded with a line issuing the "#pragma INTERRUPT;" pragma.

This is particularly relevant to your resolution because when I use the pragma instead on the "interrupt" keyword the function is not treated as an interrupt - context is not saved as can be observed in the Disassembly window and the interrupt knows not where to return and hits a Trap never to return at all - this is perhaps until I Classify my ISR functions (specified with the pragma) and qualify their storage class as "static".

But the interrupt keyword should not even be allowed in C++ to precede a function return value storage class identifier it would seem.

I don't understand. Please send a test case, that we can compile, which demonstrates the problem you are describing. Details on how to do that are at the end of the forum guidelines.

Thanks and regards,

-George

Code Composer Studio™︎

Code Composer Studio forum

interrupts in C++ : Significant that a Syntax error is generated when using extern C to make ISRs in C available to C++ methods