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TPS65920 VIO initial ramp to 0.8V before rising to 1.8V later

Other Parts Discussed in Thread: TPS65920, OMAP3503, TPS65950

We found that regardless of whether or not TPS65920 starts up correctly, the VIO output rail will rise to 0.6 to 0.8V soon after VBAT/VIN is applied.  When the chip does start up correctly, VIO will then later (hundreds of ms) rise to it's correct output voltage of 1.8V.  When it doesn't start correctly, VIO will remain around 0.8V.

When VIO remains in this 0.8V state, its output voltage tracks the VBAT/VIN voltage.  The higher VBAT/VIN is, the higher VIO is.

If the chip does not power up properly, we discovered reducing the VBAT/VIN voltage below 3.3V will cause the chip to turn on.  At the same time of reducing VBAT/VIN, VIO will reduce until it hits a threshold of 0.7V and it's at this point the chip seems to power on.  Does this behavior make sense based on the internals of the IC?  Is there an internal diode that could be latching on when it shouldn’t be?

We noted that if we lower the external power supply voltage to <3.3V and then apply power, the chip seems to power up correctly everytime.  If we set the power supply voltage >3.3V and then apply power, the chip fails to power up, unless we subsequently reduce the input voltage to <3.3V.  The ramp-up times for both the external power supply and the BFT power supply board are ~5-10 ms.  We discovered that if we slowly turn up the power supply voltage by hand, the board starts up correctly as well.

  • We are very interested in this too.  I'm designing a board using the OMAP3503 and the TPS65920 instead of the TPS65950 and would like to know how this was resolved.  If I come across any info on the Todd I will pass it onto you.  Please let me know how this was fixed.  Has anyone else successfully designed with the TPS65920?  Should I stick with the TPS65950?

    Thanks

    Gary

  • Gary,

    yes we have many board with TPS65920 :-)

    There got several issue at the same time that we fixed with forum member.

    Item1: TEST.RESET was not grounded and left floating which cause wrong Power up.

    Item2: Boot should be Tied to GND/VBAT

    Item3: Some current was drawing from LED.

    Item4: We still suspect an IC in the platform leakaging on VIO ball, when the 3.3V supply is here. (needed to check one by one)

    Item5: As system supply by 3.3V, we have a full Power up coming at each supply enable (including 32K oscillator timing....) so start up was several Hundred ms.

     

  • I  have a customer that has the issue listed as Item 4 above.

    In his case, he has a LAN9220 tied to GPMC on OMAP, and also has 1.8v VDDVARIO (variable io supply voltage) connections to VIO.

    The LAN9220 has an internal LDO for 1.8v that is fed from the 3.3v supply.

    As the 3.3v come up, the VIO on PMIC will get driven from the VDDVARIO from the LAN9220's internal LDO. 

    The VDDVARIO is tied to VIO and will rise to about 700mv in this condition.

    Can the VIO handle this back voltage without degradation?

    Will this cause any other functional issues with power up?   Any solutions?

    Thanks,

    Wade

     

     

     

  • Hi Wade,

    There shouldnt be any degradation for VIO if you have this voltage. When VIO powers up properly then it will drive the LAN IO properly. However, if the VIO level rises more (say above 1V) then it may happen that when VIO powers up you will see a spike before it settles to its normal value. This will not be good as OMAP and other VIO receivers cannot handle the spike.

    Hope this helps.

     

    Regards,

    Gandhar.