F2806x_Cla_typedefs.h

Jaspreet,

Is there any particular reason that you are wanting to port to the v100 version of the F2806x header files?

I'd recommend using the newer v136 if possible.


Thank you,
Brett

Hi Brett,

Thanks for your quick reply.

As you mentioned, I tried using the v136. I get another set of errors saying EPwm1Regs, EPwm2Regs, EPwm3Regs, EPwm4Regs, EPwm5Regs, EPwm6Regs... are undefined in resource: DPLib.h. and a warning: typedef name has already been declared (with same type) in resource: F2806x_Cla.typedefs.h

The EPwmxRegs are defined in the DPLib.h library for indirect access to all EPWM modules.

No idea why the compiler is complaining about this. Probably, I don't understand the use of EPwms to be used as indirectly. However, this won't effect the typedefs.h.

Sincerely,

Jaspreet

Jaspreet,

A very raw template project and Digital Power Library for the F2806x family of MCUs is attached.  This should get you quite a bit closer to what you want to do. 

Note the Readme.txt file.

Happy coding!


Thank you,
Brett

Brett,

Thank you for sending across Template project for DPLib F2806x family. I'm working on it at the moment, however, still getting errors

unresolved symbol mdebugstop

unresolved symbol cla_scratchpad_start

unresolved symbol cla_scratchpad_end

Thank you

Jaspreet

Igor,

Thank you for the reply. The error disappeared. However, I'm receiving an error saying that _ClafuncsRunStart expression is used before it has been assigned a value. Quite difficult to figure out why compiler is complaining about it.

For your reference the contents of linker file are as follows:

_Cla1Prog_Start = _Cla1funcsRunStart;

-heap 0x200

-stack 0x200

// Define a size for the CLA scratchpad area that will be used

// by the CLA compiler for local symbols

and temps

// Also force references to the special symbols that mark the

// scratchpad are.

CLA_SCRATCHPAD_SIZE=0x100;

//--undef_sym=__cla_scratchpad_end

//--undef_sym=__cla_scratchpad_start

MEMORY

{

PAGE 0 :

  /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN                :origin = 0x000000, length = 0x000002

   RAMM1                :origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */

   RAML0L1              :origin = 0x008000, length = 0x000C00

   RAML3                :origin = 0x009000, length = 0x001000

   RAML4              :origin = 0x00A000, length = 0x002000     /* on-chip RAM block L4 */

   RESET           :origin = 0x3FFFC0, length = 0x000002

   FPUTABLES   :origin = 0x3FD860, length = 0x0006A0 /* FPU Tables in Boot ROM */

   IQTABLES    :origin = 0x3FDF00, length = 0x000B50    /* IQ Math Tables in Boot ROM */

   IQTABLES2   :origin = 0x3FEA50, length = 0x00008C    /* IQ Math Tables in Boot ROM */

   IQTABLES3   :origin = 0x3FEADC, length = 0x0000AA /* IQ Math Tables in Boot ROM */

   BOOTROM              :origin = 0x3FF27C, length = 0x000D44　

PAGE 1 :

   BOOT_RSVD            :origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */

   RAMM0                :origin = 0x000050, length = 0x0003B0

   dataRAM              :origin = 0x008C00, length = 0x000400 /* RAML2 */

   RAML5       :origin = 0x00C000, length = 0x002000     /* on-chip RAM block L5 */

   RAML6       :origin = 0x00E000, length = 0x002000     /* on-chip RAM block L6 */

   RAML7       :origin = 0x010000, length = 0x002000     /* on-chip RAM block L7 */

   RAML8       :origin = 0x012000, length = 0x002000     /* on-chip RAM block L8 */

   USB_RAM     :origin = 0x040000, length = 0x000800     /* USB RAM   */

   CLA_CPU_MSGRAM      :origin = 0x001480, length = 0x000080

   CPU_CLA_MSGRAM      :origin = 0x001500, length = 0x000080

}　

SECTIONS

{

/* Setup for "boot to SARAM" mode:

      The codestart section (found in DSP28_CodeStartBranch.asm)

      re-directs execution to the start of user code.  */

   codestart        : > BEGIN,     PAGE = 0

   ramfuncs         : > RAMM1      PAGE = 0

  .text            : > RAML0L1,   PAGE = 0 /* default code section */ 

  .cinit           : > RAMM1,     PAGE = 0 /* initialised variables */

  .pinit           : > RAMM1,     PAGE = 0 /* global constructor table */

  .switch          : > RAMM1,     PAGE = 0

  .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */  

.stack           : > RAMM0,     PAGE = 1 align(2) /* stack: even word alignment */

  .ebss            : > dataRAM,     PAGE = 1

  .econst          : > dataRAM,     PAGE = 1

  .esysmem         : > dataRAM,     PAGE = 1

   IQmath           : > RAML0L1,   PAGE = 0

   IQmathTables     : > IQTABLES,  PAGE = 0,

TYPE = NOLOAD

   Cla1Prog         :

LOAD = RAML3, /* Note for running from RAM the load and RUN can be the same */

RUN = RAML3,

                      LOAD_START(_Cla1funcsLoadStart),

                      LOAD_SIZE(_Cla1funcsLoadSize),

                      LOAD_END(_Cla1funcsLoadEnd),

                      RUN_START(_Cla1funcsRunStart),

                      PAGE = 0 

/* Uncomment the section below if calling the IQNexp() or IQexp()

      functions from the IQMath.lib library in order to utilize the

      relevant IQ Math table in Boot ROM (This saves space and Boot ROM

      is 1 wait-state). If this section is not uncommented, IQmathTables2

      will be loaded into other memory (SARAM, Flash, etc.) and will take

      up space, but 0 wait-state is possible.

   */

  /*  IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD

   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   } */

  /* Uncomment the section below if calling the IQNasin() or IQasin()

      functions from the IQMath.lib library in order to utilize the

      relevant IQ Math table in Boot ROM (This saves space and Boot ROM

      is 1 wait-state). If this section is not uncommented, IQmathTables2

      will be loaded into other memory (SARAM, Flash, etc.) and will take

      up space, but 0 wait-state is possible.

   */ 

/*

   IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD

   {

              IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

  }

   */#

}

SECTIONS

{                                  

/*************       DPLIB Sections C28x      ************************/

/* ADCDRV_1ch section */

ADCDRV_1ch_Section : > dataRAM PAGE = 1

/* ADCDRV_4ch section */

ADCDRV_4ch_Section : > dataRAM PAGE = 1

/* CNTL_2P2Z section */

CNTL_2P2Z_Section : > dataRAM PAGE = 1

CNTL_2P2Z_InternalData : > dataRAM PAGE = 1

CNTL_2P2Z_Coef : > dataRAM PAGE = 1

/* CNTL_3P3Z section */

CNTL_3P3Z_Section : > dataRAM PAGE = 1

CNTL_3P3Z_InternalData : > dataRAM PAGE = 1

CNTL_3P3Z_Coef : > dataRAM PAGE = 1

/*DLOG_4CH section */

DLOG_4CH_Section : > dataRAM PAGE = 1

DLOG_BUFF : > dataRAM PAGE = 1

/*MATH_EMAVG section */

MATH_EMAVG_Section : > dataRAM PAGE = 1

/*PFC_ICMD section*/

PFC_ICMD_Section : > dataRAM PAGE = 1

/*PFC_INVSQR section*/

PFC_INVSQR_Section : > dataRAM PAGE = 1

/* PWMDRV_1ch driver section */

PWMDRV_1ch_Section : > dataRAM PAGE = 1

/* PWMDRV_1chHiRes driver section */

PWMDRV_1chHiRes_Section : > dataRAM PAGE = 1

/* PWMDRV_PFC2PhiL driver section */

PWMDRV_PFC2PhiL_Section : > dataRAM PAGE = 1

/* PWMDRV_PSFB driver section */

PWMDRV_PSFB_Section : > dataRAM PAGE = 1

/* PWMDRV_DualUpDwnCnt driver section */

PWMDRV_DualUpDwnCnt_Section : > dataRAM PAGE = 1

/* PWMDRV_ComplPairDB driver section */

PWMDRV_ComplPairDB_Section : > dataRAM PAGE = 1

/* ZeroNet_Section  */

ZeroNet_Section : > dataRAM PAGE = 1

}

 Sincerely,

Jaspreet

Hello!

1 You can try thus:

LOAD_START(_Cla1funcsLoadStart),
LOAD_END(_Cla1funcsLoadEnd),
LOAD_SIZE(_Cla1funcsLoadSize),

instead:

LOAD_START(_Cla1funcsLoadStart),

LOAD_SIZE(_Cla1funcsLoadSize),

LOAD_END(_Cla1funcsLoadEnd),

2 You can try http://e2e.ti.com/cfs-file.ashx/__key/communityserver-discussions-components files/171/3531.28069_5F00_RAM_5F00_CLA_5F00_C_5F00_lnk.txt. 

Though I'm not sure about  "DPLIB Sections C28x", because I don't know the features of your project. Perhaps you need to add this section from your old CMD-file to my new CMD-file.

Regards,

Igor

Hello Igor,

I tried the first option, problem still persists.

The second option directs me a 404- File not found page. Can you please mention the link again please.

Sincerely,

Jaspreet

Hello Jaspreet!

Ok. 

/*
//###########################################################################
//
// FILE:    28069_RAM_CLA_C_lnk.cmd
//
// TITLE:   Linker Command File For F28069 examples that run out of RAM
//
//          This ONLY includes all SARAM blocks on the F28069 device.
//          This does not include flash or OTP.
//
//          Keep in mind that L0,L1,L2,L3 and L4 are protected by the code
//          security module.
//
//          What this means is in most cases you will want to move to
//          another memory map file which has more memory defined.
//
//###########################################################################
// $TI Release: F2806x C/C++ Header Files and Peripheral Examples V136 $ 
// $Release Date: Apr 15, 2013 $ 
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For BIOS applications add:      F2806x_Headers_BIOS.cmd
// For nonBIOS applications add:   F2806x_Headers_nonBIOS.cmd
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l F2806x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l F2806x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\F2806x_headers\cmd to the
   library search path under project->build options, linker tab,
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F2806x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes:
         Memory blocks on F28069 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program
         and/or data.

         Contiguous SARAM memory blocks can be combined
         if required to create a larger memory block.
*/

_Cla1Prog_Start = _Cla1funcsRunStart;
-heap 0x400
-stack 0x400

// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are. 
// CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN      		: origin = 0x000000, length = 0x000002
   RAMM0      		: origin = 0x000050, length = 0x0003B0
   RAML5L8          : origin = 0x00C000, length = 0x008000

  /* RAML0_L2       : origin = 0x008000, length = 0x001000 */	 
   RAML3		    : origin = 0x009000, length = 0x001000  
   RESET      		: origin = 0x3FFFC0, length = 0x000002

   /* FPU Tables in Boot ROM */
   FPUTABLES        : origin = 0x3FD860, length = 0x0006A0	

    /* IQ Math Tables in Boot ROM */
   IQTABLES   		: origin = 0x3FDF00, length = 0x000B50 
   IQTABLES2  		: origin = 0x3FEA50, length = 0x00008C 
   IQTABLES3  		: origin = 0x3FEADC, length = 0x0000AA	

   BOOTROM    		: origin = 0x3FF3B0, length = 0x000C10


PAGE 1 :

   /* Part of M0, BOOT rom will use this for stack */
   BOOT_RSVD   	        : origin = 0x000002, length = 0x00004E
   /* on-chip RAM block M1 */
   RAMM1       	        : origin = 0x000480, length = 0x000380     
   CLARAM0              : origin = 0x008800, length = 0x000400
   CLARAM1              : origin = 0x008C00, length = 0x000400
   CLARAM2				: origin = 0x008000, length = 0x000800
   /* on-chip RAM block L4-L8 */
   RAML4            	: origin = 0x00A000, length = 0x002000 
  /* RAML5              : origin = 0x00C000, length = 0x002000 */
  /* RAML6       	    : origin = 0x00E000, length = 0x002000 */
  /* RAML7       		: origin = 0x010000, length = 0x002000 */
  /* RAML8       		: origin = 0x012000, length = 0x002000 */

   CLA1_MSGRAMLOW       : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH      : origin = 0x001500, length = 0x000080
}


SECTIONS
{

/* Setup for "boot to SARAM" mode:
      The codestart section (found in DSP28_CodeStartBranch.asm)
      re-directs execution to the start of user code.  */
   codestart        : > BEGIN,     PAGE = 0
   ramfuncs         : > RAMM0,     PAGE = 0
   .text            : > RAML5L8,   PAGE = 0
   .cinit           : > RAMM0,     PAGE = 0
   .pinit           : > RAMM0,     PAGE = 0
   .switch          : > RAMM0,     PAGE = 0
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

   .stack           : > RAML4,     PAGE = 1
   .ebss            : > RAML4,     PAGE = 1
   .econst          : > RAML4,     PAGE = 1
   .esysmem         : > RAML4,     PAGE = 1
   .sysmem          : > RAML4,     PAGE = 1
   .cio             : > RAML4,     PAGE = 1

   .bss_cla		    : > CLARAM1,   PAGE = 1
   .const_cla	    : > CLARAM1,   PAGE = 1 
   
   IQmath           : > RAML4,	   PAGE = 1
   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD
   
   /* Allocate FPU math areas: */
   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
   
   Cla1Prog        : > RAML3,
                     LOAD_START(_Cla1funcsLoadStart),
                     LOAD_END(_Cla1funcsLoadEnd),
                     LOAD_SIZE(_Cla1funcsLoadSize),
                     RUN_START(_Cla1funcsRunStart),
                     PAGE = 0
   
   Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
   CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
   Cla1DataRam0		: > CLARAM0,		  PAGE = 1
   Cla1DataRam1		: > CLARAM1,		  PAGE = 1
   Cla1DataRam2		: > CLARAM2,		  PAGE = 1

   CLA1mathTables	: > CLARAM1,
                      LOAD_START(_Cla1mathTablesLoadStart),
                      LOAD_END(_Cla1mathTablesLoadEnd), 
                      LOAD_SIZE(_Cla1mathTablesLoadSize),
                      RUN_START(_Cla1mathTablesRunStart),
                      PAGE = 1

   CLAscratch       : 
                     { *.obj(CLAscratch)
                     . += CLA_SCRATCHPAD_SIZE;
                     *.obj(CLAscratch_end) } > CLARAM1,
					 PAGE = 1

  /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
   /* Uncomment the section below if calling the IQNasin() or IQasin()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

   }
   */

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Or \ti\controlSUITE\device_support\f2806x\v136\F2806x_common\cmd\28069_RAM_CLA_C_lnk.cmd.

Regards,

Igor

Jaspreet,

I have confirmed that the software I sent across works as long as it is unzipped into the location shown in the readme.  If done correctly, you should be able to compile with 2 or 3 warnings (as described in the ReadMe) but receive no errors.


Thank you,
Brett

Hello Brett,

Thank you for the reply.

I unzipped both the files as mentioned in the readme.txt. I had to modify the code little bit to include the F2806x headers and common files using the Build options. However, I receive 

Error: could not open the source file PWMDRV_CLA_C.h

Warning: 1) This project contains unresolved buildable linked resource. It might not build as expected. 2) typedef name has already been declared (with same type).

It sounds that both assembly and C coding of CLA has been mentioned in the project. I believe I need to include or exclude some of the files to use the Project for the CLA C code.

Also, I would like to mention from my previous comments in this thread that I'm using RAM as my active build configuration so I might have to exclude the FLASH.cmd files. Please correct me if I'm wrong.

On top of this, I'm constantly getting error message for unresolved symbol mdebugstop, unresolved symbol cla_scratchpad_start, unresolved symbol cla_scratchpad_end, and symbol "_Cla1funcsRunStart" used in expression before it has been assigned a value. 

For your reference, these are the options I select in the complier:

--silicon_version=28 -g --define="_DEBUG" --define="LARGE_MODEL"

--include_path="C:/Program Files (x86)/Texas Instruments/ccsv4/tools/compiler/c2000/include"

--include_path="C:/TI/controlSUITE/device_support/f2806x/v136/F2806x_headers/include"

--include_path="C:/TI/controlSUITE/device_support/f2806x/v136/F2806x_common/include"

--include_path="C:/TI/controlSUITE/development_kits/~SupportFiles"

--include_path="C:/TI/controlSUITE/libs/math/IQmath/v15b/include"

--include_path="C:/TI/controlSUITE/libs/app_libs/digital_power/f2806x_v3.4/asm_macros"

 --include_path="C:/TI/controlSUITE/libs/app_libs/digital_power/f2806x_v3.4/include"

--diag_warning=225 --large_memory_model --cla_support=cla0 

Please let me know if you would need more details about the template project I have configured on my system.

Sincerely,

Jaspreet

Jaspreet,

Why did you have to 'modify the code a little bit to include the F2806x headers and common files using the Build options'?

I think everything should work directly.


Thank you,
Brett

Hello Brett,

The reason I modified the code because the compiler was giving error:

Could not find F2806x_Device.h and other header files which assume the project is built for 2803x device. 

Sincerely

Jaspreet 

Jaspreet,

The code I attached was designed for the F2806x device family.

I suspect the issue may be that my project assumes version v136 of f2806x device_support has been installed.  Can you look at your controlSUITE directory to see if v136 is installed?  ie at the following directory there should be a folder labeled 'v136':
\controlSUITE\device_support\f2806x\

If it's not installed, it can be downloaded via a fresh installation of controlSUITE.


Thank you,
Brett

Hello Brett,

Thank you for quick reply. 

Certainly,  v136 is installed in the controlsuite directory mentioned above. 

Sincerely

Jaspreet

Jaspreet,

OK.  It imports fine for a colleague and I.   

When you are importing the CCS project in, is the 'Copy projects into workspace' checkbox in the 'Import CCS Eclipse Projects' dialog checked?  If so, import with that option unchecked.  (if this is what was going on you may need to start a new workspace)


Thank you,
Brett

Hello Brett,

The  'Copy projects into workspace' is already unchecked and still the issue persists. As mentioned, I start a new workspace and import the project with again the same errors.

It is strange to hear that project is working perfect at your end.

Can you send the Template project once again please.

Thank you,

Jaspreet

Jaspreet,

Can you delete out the f2806x DPlib TemplateProject & library and then reinstall it? 

Next reimport in the project.  Once imported try to rebuild and if there are issues, send me a screenshot equivalent to the attached (it should look similar).  Only the pathing should be a bit different.


Thank you,
Brett

Hi Brett,

I did as you mentioned above.

This is how the Project structure look like with errors. Also, I want to mention that I'm using CCSv4 not v5.

Sincerely,

Jaspreet

Jaspreet,

That is the issue then.  I built the template project with CCSv5.  CCSv4 projects can be imported into CCSv5, but CCSv5 projects are not importable into CCSv4. 

Is using CCSv5 a possibility for your project?


Thank you,
Brett

Hello Brett,

I thought so this might be the issue.

I have downloaded CCSv5 but haven't installed yet. I believe I would not be able to import the same license and have to use a free version of CCSv5.

I'll install CCSv5 keeping CCSv4 as well, just in case. I'll then import your template project and will get back.

Thank you,

Jaspreet

Hello Brett,

I have installed the CCSv5. The complier is showing these errors.

I believe these files are linked to the project as defined in the Project Properties/Resource/Linked Resources. However, I want to mention that red cross is displayed saying Invalid location as below.

Can you please look why this is so. Do I have to link the files again?

Sincerely,

Jaspreet

Hello Jaspreet!

You do something wrong. I use CCSv5.2. I have downloaded ZIP of Brett and I have done all the instructions in the file Readme. Then I have done "Import existing CCS eclipse project" with filled check box "Copy projects into workspace". Then I got warning about compiler version (project was builded with 6.1.4, but my CCS uses 6.1.0). I have corrected compiler version at Project's Properties. It was all. Then the project was builded successfuly.

Good luck,

Regards,

Igor

Hello Brett and Igor,

I just discovered that since I have both CCSv4 and CCSv5 in my system, the default location for controlSuite folder is set for CCSv4. I have now changed it for CCSv5.

This give me no error but two warnings which Brett mentioned on the typedef.

Sincerely,

Jaspreet

Jaspreet,
Sorry for all the difficulty.  My project was aimed at helping you not making it more difficult.  Hopefully, now that it's working your project can be successful.

Igor,
Thanks for checking the package on your machine.  It is good to know that it worked outside TI as well.


Thank you,
Brett

Hello Brett,

I very much appreciate your help on this project, but I must say I have learnt a lot while getting way with errors.

Igor,

Thanks, your suggestions have helped too.

Sincerely,

Jaspreet