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TMS320F28035: Question about CPU and CLA try to access 'cla_to_cpu message RAM' at the same time issue

Part Number: TMS320F28035


Hi,

I was wondering what happens if CPU and CLA are trying to access 'CLA to CPU Message RAM' at the same time. From the CLA data sheet, it says 'CLA write' has higher priority than 'CPU reads'.

Questions:

1. Does it mean 'CPU reads' request is ignored or 'CPU reads' will still happen but only after 'CLA write'?
2. If 'CPU_reads' occured slightly earlier than 'CLA write', how would 'CPU reads' be interrupted by 'CLA write'?

Thanks.

  • James,

    CPU reads are not ignored but stalled and access is given after CLA access is done. Please note that these access are single cycle access so if access are not in same cycle then access is granted in the same sequence.

    Regards,

    Vivek Singh