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TLC7725

TLC7725

This question is not answered
Ignacio Linares
Posted by Ignacio Linares
on Mar 14 2012 14:11 PM
Expert1240 points

I have a customer applying Vdd=3.3V and RESIN# being driven by a 5V logic signal.  I don't see this as a problem.  However, he has asked the following:

The maximum input current for RESIN is 2 uA.   In the case where RESIN is 5V and VDD is 3.3V, is it possible that the maximum input current could be violated?  What does the input circuit topology look like?

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  • Bill Stokes
    Posted by Bill Stokes
    on Mar 14 2012 15:16 PM
    Expert8810 points

    Hi Ignacio,

    Yes it is possible that the maximum RESIN current will exceed the 2uA characterized in the data sheet.  Since the part was not characterized for RESIN>Vdd it would be difficult to find how much the current changes in this region.

    Bill

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  • Jessica Hermosillo
    Posted by Jessica Hermosillo
    on Mar 15 2012 06:40 AM
    Prodigy10 points

    Good morning,

    If both nRESIN and VCC were powered off of 3.3V, but the nRESIN supply came up before the VCC supply by about 30ms would this be a concern?

    Thank you for your time,

    Jessica

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  • George Peterson
    Posted by George Peterson
    on Mar 15 2012 07:12 AM
    Intellectual2245 points

    This would be a concern.  nRESIN should not be above VCC.  The nRESIN input has an ESD protection diodes that goes from the input to VCC.  If the voltage at the input is higher than VCC, the ESD protection diode will conduct and start to power VCC through the input.   The ESD protection diodes input clamp current is rated at 10 mA.  If you put more than 10 mA through the input when the input is higher than VCC, you could damage the ESD protection diodes.   Essentially, you'll be powering everything on VCC through the input.

    Theoretically, you can put a current limiting resistor (> 1K) in series with the input to limit the current below 10 mA during this condition.   It is typically not recommended that the ESD protection diode be used in this way but this may be acceptable for 30 ms to prevent a major redesign in your circuit. 

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