Narasimha,
This device is a passive FET switch that can be modeled ideally modeled as a 0 ohm wire. The one pin of the switch will be the Drain and the other pin will be the source of the FET. You can make a basic model of the parasitic of the FET from parameters in the datasheet. You can use the series on-state resistance and the on state capacitance to ground to show the parasitic RC low pass filter a signal will encounter as it passes through the signal path.
What type of signal are you trying to model in your system? Will the basic low pass filter model work for your application?
We do not have a Spice model on the web for this basic switch and it could take several weeks to create. Is this still something you need?
Thank you,
Adam
Narasimha,
No, you may not operate the TS12A4515 the way you describe because it violates the recommended operating conditions in the datasheet.
If you operate the device with V+ = 5V you many not place a signal on the COM,NC, or NO pin >V+.
In order to place 7.5V on the signal path you need to have V+ >= 7.5 V.
I do not know of any switches we have that can pass 7.5 V with the supply voltage equal to 5 V.
Thank you,
Adam
Narasimha,
Yes the datasheet says the recommended operating condition of V+ to between 3 and 12.6 V.
The datasheet has a minimum value for a logic level high (Vih) of 5 V when the supply V+ = 12V. This vih value will vary with the supply voltage V+ but unfortunately we do not have any data on the vih value when V+ = 8V.
We do have a large range of level shifters on ti.com that can help translate the 3.3V logic signals to 5V levels. You can place a question on the level shifter e2e forum for assistance with these types of ICs.
Thank you,
Adam
