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Linux/DRA745: Clause 45 of the 802.3 is supported by DRA7X_EVM MDIO controller?

JeHun Kim
Intellectual 290 points
Part Number: DRA745
Other Parts Discussed in Thread: DP83865, DP83867IR

Tool/software: Linux

Hello.


Target board is based on DRA7X_EVM(VAYU 703761-1031).
There will be two PHYs.

One is EVM default PHY(DP83865), another is automotive marvell automotive gigabit PHY.
(Address 2 is for DP83865 PHY, addrss 3 for marvell PHY )
Clause 45 mdio protocol shoud be supported for Marvell automotive gigabit PHY.

Clause 45 of the 802.3 is supported by DRA7X_EVM MDIO controller(davinci mdio)?
Both HW and SW?

And is it possible to use both marvell PHY(clause 45)  and EVM default PHY?
(I know Cluase 45 is backwards compatible with Clause 22.)

Best Regards,
JeHun Kim

  • 0
    Intellectual 290 points
    SDK version is Processor SDK 3.02.
  • 0
    TI__Guru**** 170625 points
    JeHun,

    Clause 45 (802.3ae) is not supported for DRA7x device (nor HW neither SW). DRA7x is 1 Gbit (1000Mbit) ethernet device and support 802.3az (energy efficient ethernet).

    Clause 45 is supported for our Keystone devices which are 10 Gbit ethernet devices.

    See the below links for more info:

    e2e.ti.com/.../573701
    e2e.ti.com/.../546577

    Regards,
    Pavel
  • 0 in reply to Pavel Botev
    Intellectual 910 points

    Hello Pavel

    I'm working with JeHun.

    Additionally, We are checking "Annex 22D"

    According to Marvell datasheet(88Q2112), 88Q2112 device supporting register access using Clause 22 Register 13 and 14, as specified in IEEE 802.3 Annex 22D.

    So, we trying to implement 88Q2112 phy driver that supporting "IEEE 802.3 Annex 22D". (e.g: Having phy_read_mmd_indirect, phy_write_mmd_indirect)

    My question is,

    1) Does "davinci_mdio.c" mdio driver supports "IEEE 802.3 Annex 22D" without any modification. If not, why it can't.(e.g: Is there any coupling with cpsw driver?)

    2) If TI davinci_mdio.c support Annex 22D, can everything work without any relevant driver modifications?

    3) We have found dp83867 phy driver. It looks using Annex 22D. Does this working in Jacinto6 if we use DP83867 phy chip?
    (We are planning to reuse this driver as reference for our 88Q2112 phy. We need confirm that if it is correct or not)

    Thank you.

    802.3ah.pdf

    Annex 22D
    (informative)
    Clause 22 access to Clause 45 MMD registers
    Clause 22 provides access to registers in a Clause 45 MMD using Registers 13 and 14. This informative
    annex provides users with some insight how these registers can be utilized to access Clause 45 MMD
    registers. Accesses to Registers 13 and 14, for the purpose of accessing registers in a Clause 45 MMD,
    should be performed atomically to avoid the chance of another process changing the Function, DEVAD or
    address fields within the MMD. This is the same requirement of Clause 45 accesses.

  • 0 in reply to yangwoo Lee
    TI__Guru**** 170625 points

    yangwoo Lee said:
    3) We have found dp83867 phy driver. It looks using Annex 22D. Does this working in Jacinto6 if we use DP83867 phy chip?
    (We are planning to reuse this driver as reference for our 88Q2112 phy. We need confirm that if it is correct or not)

    How you define that DP83867IR is using Annex 22D?

    Note that DP83867IR is used in DRA72x TI EVM and DRA71x TI EVM. So MDIO driver should support it by default.

    yangwoo Lee said:
    1) Does "davinci_mdio.c" mdio driver supports "IEEE 802.3 Annex 22D" without any modification. If not, why it can't.(e.g: Is there any coupling with cpsw driver?)

    See answer above

    yangwoo Lee said:
    2) If TI davinci_mdio.c support Annex 22D, can everything work without any relevant driver modifications?

    See answer above

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Intellectual 910 points
    Sorry about my slow understanding.
    Please tell me again, whether we can use "Annex 22D" in our processor SDK.(whether dra75x support it or not)
    dp83867 using Annex 22D interface of "phy.c"(phy_read_mmd_indirect). so we will reuse it as marvell phy driver to support C45.
    We need confirmation.
  • 0 in reply to yangwoo Lee
    TI__Guru**** 170625 points
    Processor SDK Linux automotive 3.02 support DRA75x, DRA72x, DRA71x. Thus as it works fine for dp83867 in DRA72x/71x, it should work fine for DRA75x also.

    Regards,
    Pavel
  • 0 in reply to Pavel Botev
    TI__Guru**** 170625 points

    I confirm DP83867 PHY is using IEEE 802.3ah (Annex 22D), this is what we have in DP8386IR PHY DM:

    8.4.2.1 Extended Address Space Access
    The DP83867 SMI function supports read or write access to the extended register set using registers REGCR (0x000Dh) and ADDAR (0x000Eh) and the MDIO Manageable Device (MMD) indirect method defined in IEEE 802.3ah Draft for clause 22 for accessing the clause 45 extended register set.

    The DP83867 driver is located at:

    linux-kernel/drivers/net/phy/dp83867.c -> phy_read_mmd_indirect(), phy_write_mmd_indirect() are used here

    Also see the below files regarding DP83867:

    linux-kernel/Documentation/devicetree/bindings/net/ti,dp83867.txt
    linux-kernel/arch/arm/boot/dts/dra72-evm-revc.dts
    linux-kernel/arch/arm/boot/dts/dra71-evm.dts
    linux-kernel/arch/arm/boot/dts/keystone-k2g-ice.dts


    It is the correct approach to re-use the DP83867 PHY annex 22D code for your marvel PHY driver. This code should work for DRA75x device.

    See also the below link:
    lists.infradead.org/.../460029.html

    Regards,
    Pavel