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[FAQ] TDA4VM: DMIPS Calculation for Cortex R5F

Shalhoob Manatheykad
Genius 4205 points
Part Number: TDA4VM


Would you be able to let me know the DMIPS calculation for cortexR5F for TDA4VM processors are?

Looking in ARM website, the performance can be one of these values per MHz, which of these values should be used for TDA4V to calculate the DMIPS accurately?

1.67 / 2.02 / 2.45 DMIPS/MHz*
3.47 CoreMark/MHz*

  • 0
    TI__Intellectual 1310 points

    Shalhoob,

    The multiple dual Cortex-R5F clusters in TDA4 family devices are configurable and can run in either lockstep (ASIL-D capable) or non-lockstep (ASIL-B capable) modes. For example in the TDA4VM there are 3x dual R5F clusters each running at 1GHz operating frequency. Therefore, for lock-step (ASIL-D) operation each cluster is capable of 2k DMIPs lock-step performance per dual cluster. This means that on a device such as TDA4VM with 3x dual clusters, if they are all configured for lockstep operation you would have a total of 6k DMIPs lockstep available. Similarly, if all 3x dual R5F clusters were run in non-locktep mode each cluster in SMP mode is then capable of 4k DMIPs/cluster; for 3x dual clusters this would mean 12k DMIPs of non-lockstep performance is available. Each cluster can be independently configured so you can choose where you want to use lockstep mode and where you don't. This is all based on a rating of 2.0 DMIPs/MHz for the TI implementation of the Cortex R5F IP.

    Best Regards,

    Thomas Shelburne