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  • XTCIEVMK2LX: Usage of ADC14X250EVM with XTCIEVMK2LX

    Resolved
    Part Number: XTCIEVMK2LX Other Parts Discussed in Thread: ADC14X250EVM , RFSDK , LMK04828 Hello, experts. I have XTCIEVMK2LX and ADC14X250EVM, and wanna get some data from the ADC and process it on the DSP cores of the EVMK2L. I connected the ADC board…
    • Resolved
    • Answered

  • TSW14J56EVM: capturing the waveforms from ADC14X250EVM at lane rates lower than 1.5G

    Resolved
    Part Number: TSW14J56EVM Other Parts Discussed in Thread: ADC14X250EVM , ADC14X250 Hello, I am setting up my ADC14X250EVM to TSW14J56EVM test setup as explained in Figure 2 of slau625, user manual for ADC14x250. However, my clock is 70MHz and my…
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    • Answered

  • RE: ADC14X250EVM: I can not connect to ADC14x250 EVM with HSDC Pro .

    Resolved
    Hi, The GUI for ADC14X250 can be downloaded from the adc14x250evm page. Or you can click to download from this link: http://www.ti.com/lit/zip/slac712 Regards, satish.

  • RE: ADC14X250EVM: Can I use lower frequency signal for the clock input than presented in the user's guide?

    Hello Mark, Thank you for your answer! I will give it a try and be back to tell the result. :)
    • Answered

  • RE: TSW14J56EVM: distortions at lower frequency measurements

    Resolved
    Hi Lizon The ADC14X250EVM input signal path uses back to back baluns to convert the 50 single ended input to a differential format compatible with the ADC inputs. The baluns used have a lower frequency limit of 5 MHz. https://www.macom.com/products…

  • RE: Linux/TCI6630K2L: Configuration IQN2 and DFE module to transmit/receive raw data stream(not CDMA / LTE protocol) from JESD interface to application memory(DFE bypass)

    Hello! We are also developing an application that runs on Linux (ARM core). It is necessary to realize the direct high-speed data transfer from the JESD ADC interface to the application memory using DMA (without DFE processing, sample rate 245 MHz…

  • RE: Linux/66AK2L06: RFSDK Demo Setup Problem

    Hello , We have 3 boards , 66AK2L06 EVM ver. 1.0.3.0 , ADC14X250EVM rev B and DLC board that we produced according the desing files. We have no DAC Board, because we want to use only ADC Board and see any Signal generated by us in RX side RFSDK…
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  • RE: ADC14X250: JESD204B over fiber

    Resolved
    Hi Matt, Thank you. The first answer solves a big question that I had about retrieving the embedded clock. But if deterministic latency is not a requirement for my application, and If I am trying to use only one ADC, can I ignore SYSREF? I believe…
    • Answered

  • TSW14J56EVM: ADC14X250

    Resolved
    Part Number: TSW14J56EVM Other Parts Discussed in Thread: ADC14X250EVM , ADC14X250 Hi, I am using TSW14J56EVM with ADC14X250EVM as instructed in document SLAU625, however, my final goal is to use ADC14X250 to send data to a FPGA using JESD204B over…
    • Resolved

  • XEVMK2LX: 66AK2L: ADC & DAC EVM Selection

    TI Thinks Resolved
    Part Number: XEVMK2LX Other Parts Discussed in Thread: ADC14X250EVM , DAC38J84 , 66AK2L06 , ADC14X250 , ADC32RF80 I have plan to buy ADC14X250EVM and DAC38J84 for test XEVMK2LX. First question is "Does it need Deterministic Latency Card ?". …

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