Part Number: TSW1418EVM
Tool/software:
Hello,
Is the TSW1418EVM compatible with the ADC3443 or ADS4242 EVMs? If not, what is the best path forward to evaluate the ADC3443 or ADS4242?
Part Number: ADS4242
The datasheet says the ADC can handle a 2 Vpp signal, but in practice the ADC clips and can only handle a 1 Vpp signal. I'm using the ADS4242 EVM board with a signal generator for the input. The input signal is run through an op amp to generate a differential output, and the Vcm out of the ADS4242 is connected to the Vcm input of the amp.
Part Number: ADS4242
Hi, I work with ads4242 as a final stage in my rf cascade. I want to get a low noise figure and therefore try to get A high gain in low NF such that ADC NF contribution to Overall NF will be small. I try to understand if using 1:N (and not 1:1) transformer as balun (can help in reduce the required cascade gain to such purpose (voltage gain) ? This is for reduce power gain (and get more linearity) Thanks, YinonPart Number: ADS4242
Ads 4242 has a 2 Vpp analog input condition. For a 50 ohm input impedance it’s go to PFs of 10 dBm. It’s true to assume that by using 1:N transformer I can reduce the PFs by factor of N^2 ? If it’s true, it’s cause also to reduce ADC absolute noise floor (dBm value) according to ADC SNR spec (given in dBFS) ? Regards, YinonPart Number: ADS4242
Hi Team,
I would like to see ADS4242 datasheet but I couldn't access product folder now.
It is also same with ADS6442..
Could you support it?
Best Regards,
Yaita
Part Number: ADS4242
Dear Team,
My customer is considering using our ADS4242 for Dual, 14bit, 60Msps sampling.
As they have a very small FPGA they would like to use only single LVDS lane for each ADC core to transfer the data to the FPGA.
Is it possible to configure the ADS4242 for single LVDS lane operation ?
Alternatively, could you please advise an alternative device (Dual, 14Bit, 60Msps) that can drive each ADC samples data on a single LVDS lane ?
Regards,
Nir
Part Number: TMS320C6748
Dear Team,
I found there is no SW driver for upp in latest PDK and I found it in old SW release based on BIOS v5.
I'm afraid it is hard for my customer to develop custom board and attach ADC to upp of C6748 as there is no upp port in our EVM(LCDK) and no SW for upp.
Could you please recommend how ADC can be connected to C6748?
Thanks and Best Regards,
SI.
Part Number: TMS320C6748
Dear Champs,
Could you please check if ADS4242 can be attached to TMS320C6748 to receive 2ch data with 4 ~ 32MSPS ?
I think upp of C6748 can be used to receive 2ch data from ADS4242, and want to check if there is any issue to use upp port of C6748.
If upp is right peripheral, could you please let me know how ADS4242 can be connected to upp of C6748?
When I checked below wiki, it seemed it is OK to make 'ENABLE' and 'START' pin to be un-connected(NC), but I have no idea how clock should be connected.
It seemed upp requires clocks per each channels(e.g. 2 clocks required for 2 channels), but ADS4242 has only 1 clock output for 2 channels.
Thanks and Best Regards,
SI.
I am using ADS4242 for one of my design. If planning to used CMOS TCXO as clok input to the device. TCXO Voh = 2.97V (90% of 3.3V) and V0l = 0.33V (10% of 3.3V). TCXO output is connected through circuit in fig 164 on page 82 of datasheet.
Would this TCXO levels be sufficient to drive device? What is typical capacitive load on clk pin? What impedance would clock driver see?