Part Number: AM263P4 Hi,
do you have any example regarding implementation of Profinet on AM263P4 device? When I try to open https://software-dl.ti.com/processor-industrial-sw/esd/ind_comms_sdk/am263px/latest/docs/api_guide_am263px/EXAMPLES_INDUSTRIAL_COMMS_PROFINET_DEVICE_DEMO…
Part Number: AM263P4 Other Parts Discussed in Thread: AM2634 Hi,
I Have some questions regarding TCM and OCSRAM ECC.
OCSRAM
It seems like the ECC for OCSRAM is enabled by default according to the AM263P4 Register Addendum where ECC Enable, Check…
Part Number: AM263P4 Hi,
I understand that TI CCS includes the TI Arm Clang compiler, which can be used for the AM263P4 MCU. While this may be sufficient for a proof‑of‑concept, I would like to know what other compilers are compatible with this device…
Part Number: AM263P4 I reviewed the SHA calculation program for the DTHE module in the AM263P4 SDK (mcu_plus_sdk_am263px_11_00_00_19). When it is not the last block of data, for SHA256, the input length of the original text must be a multiple of 64 bytes…
Part Number: AM263P4-Q1 Other Parts Discussed in Thread: AM263P4 H iteam, Could you please provide a following detail on eCAP integration. Consider a two MCU A and B. MCU A generating a PWM for driver and MCU B should monitor a PWM generated by MCU A…
Part Number: AM263P4 In the SBL routine sbl_ospi_multicore_elf in mcu_plus_sdk_am263px_11_00_00_19, after executing status = Bootloader_parseAndLoadMultiCoreELF(bootHandle, &bootImageInfo); , the code proceeds to execute OSPI_enableDacMode(ospiHandle…
Part Number: AM263P4 I have a question about the SPI bus signals on the AM263P4 processor.
The AM263P4 processor has a SPI0_D0 signal and a SPI0_D1 signal for SPI bus 0, other SPI buses are similar.
The device that I want to hook up to has SI ( input…
Part Number: AM263P4 Hello TI Team,
We are currently working with the AM263P4 device for a safety-critical motor control application.
We would like clarification regarding the lockstep mechanism:
Is there any possibility to use the lockstep…
Part Number: AM263P4 I have examined the implementation of HsmClient_getRandomNum in the AM263P4 SDK (mcu_plus_sdk_am263px_11_00_00_19). Upon receiving data from the HSM, a coherency operation is performed using CacheP_inv due to the Cacheable attribute…
