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Showing 1,589 results View by: Thread Post Sort by
  • AM3354: AM3354 Boot ROM cannot boot from Foresee FSNS8A002G ONFI NAND (2KiB + 64B OOB), falls back to UART "CCCC"

    Jaeseop Kim
    Jaeseop Kim
    Part Number: AM3354 Hello, We are replacing the NAND flash on a custom AM3354-based board and are unable to boot the SPL/MLO directly from the new NAND device. The old Toshiba NAND boots successfully on the same board design, but the new Foresee NAND…
    • 1 month ago
    • Processors
    • Processors forum
  • RE: AM3354: AM3354 Custom SoM – Schematic Check before PCB Design

    Kallikuppa Sreenivasa
    Kallikuppa Sreenivasa
    Hello Marius Below are some observations: Signals that have specific direction can be indicated in the schematics for readability capacitor voltage rating? Suggest enabling voltage rating Is there a reason to have all the resistors reference designator…
    • 3 months ago
    • Processors
    • Processors forum
  • AM3354: AM3354 + ADV7513 Not Working

    Vinicius Duarte
    Vinicius Duarte
    Part Number: AM3354 Tool/software: HDMI Project with AM3354 + ADV7513 Hardware Context SoC: AM3354 (TI Sitara) HDMI Encoder: ADV7513 Interface: RGB (16-bit – LCD_DATA[0:15] pins) + control signals (PCLK, HSYNC, VSYNC, DE) Topology: SOM module…
    • over 1 year ago
    • Processors
    • Processors forum
  • Answered
  • AM3354: AM3354 U-Boot failed to boot from NAND and solution found

    Ted Feng
    Ted Feng
    Resolved
    Part Number: AM3354 Tool/software: The "spl_nand_read" function in "spl_nand.c" use nand_page_size() to get NAND page size, but it's not initialized in SPL. https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tree/common/spl/spl_nand.c#n62 static ulong…
    • Resolved
    • over 1 year ago
    • Processors
    • Processors forum
  • AM3354: AM3354 McSPI Issue: MISO Reads TX Data When FIFO Enabled (Silicon Rev 2.1, BSP_WINCE_ARM_A8 SDK)

    Jack
    Jack
    TI Thinks Resolved
    Part Number: AM3354 Hello TI Team, We are experiencing an intermittent issue with SPI communication between AM3354 and an MRAM device. The problem occurs when using the McSPI controller with FIFO enabled. Issue Description Occasionally, the MISO…
    • 10 months ago
    • Processors
    • Processors forum
  • AM3354:AM3354 USB mushw_tx_flush-Fifo

    ziqiang Huang
    ziqiang Huang
    Part Number: AM3354 Tool/software: I am using the 4.1 kernel on the AM3354 platform and have encountered an issue with USB tx FIFO clearing failure. The logs that appear are as follows 以下作路径为高频次所需路径: 1.插入 USB 驱动器和 USB 打印机 2.通过 /dev/usb/lp0 向 USB…
    • over 1 year ago
    • Processors
    • Processors forum
  • AM3354: EMMC write timeout on 6.1.119 kernel

    thomas zhang
    thomas zhang
    Part Number: AM3354 Hi, To fix the CVEs, I have upgraded SDK version to latest 09.03.05.02. The kernel version of this SDK is 6.1.119. I am suffering from a EMMC write timeout problem with fio test. This issue hasn't been observed in the old kernel…
    • 4 months ago
    • Processors
    • Processors forum
  • AM3354: AM3354: sdk6.1 update to sdk 9.3 gpio and compile issue

    zmg zmg
    zmg zmg
    Part Number: AM3354 Other Parts Discussed in Thread: PCA9535 Tool/software: 1. am 335x processor sdk 9.1 or 9.3 cross-compile tool why choose to use external-toolchain-dir/arm-gnu-toolchain-11.3.rel1-x86_64-arm-none-linux-gnueabihf/bin/arm-none-linux…
    • over 1 year ago
    • Processors
    • Processors forum
  • AM3354: Junction Temperature (Tj) Calculation and Verification for ZCZ Package

    Daniel Cheng1
    Daniel Cheng1
    Part Number: AM3354 Hi TI Team, We have a customer who is evaluating the thermal performance of the AM3354BZCZ100 and would like to verify their Junction Temperature ( $T_j$ ) calculation. Below are the measurement data and the calculation formula…
    • 4 months ago
    • Processors
    • Processors forum
  • AM3354: Watch dog resets randomly in AM335

    MK
    MK
    Part Number: AM3354 Team, Our customer observes a watch dog reset at random times in AM3354x processsor The status read from below register, which CPU reports that it is WD. Base address for the PRM registers = 0x44E00000 Offset from the base…
    • 5 months ago
    • Processors
    • Processors forum
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