Part Number: AM620-Q1 Tool/software: Hi, Dear Expert
Customer wants to use our internal default MAC address for final production, here are some question.
1. Does eth0 interface mapping WKUP_MMR0_MAC_ID0 and eWKUP_MMR0_MAC_ID1 Register?
2. What's default…
Hi Gibbs,
Gibbs Shih said: why our design try to cut off chip internal I/O power domain for VDDSHV_CANUART?
The domains are separated and turned on/off separately to keep power consumption low. The more I/Os that are enabled, the more power consumption…
Part Number: AM620-Q1 Tool/software: HI team , For MCAN below configuration in function App_mcanInitStdFilterElemParams causing Rx message ID which is exactly matching with APP_MCAN_STD_ID to be stored in Rx buffer And receiving DRX interrupt in IR /* sfid1…
Part Number: AM620-Q1 Tool/software: Hi, Dear Expert
This thread is a concept clarification.
I want to choice some GPIO as Partial I/O wake up source.
So I think only these pins belong "VDDSHV_CANUART" power domain which support Partial I/O wake…
Part Number: AM620-Q1 Other Parts Discussed in Thread: SK-AM62-LP Tool/software: Hi Expert,
I have request for SK-AM62-LP EVM, this is Q100 Version, but this is GP version, I want to know do we have HSFS version?
BR,
Biao
Hi Board designers,
Refer below information regarding Package's PAD/SMO information needed
e2e.ti.com/.../faq-am625-package-parameter-description e2e.ti.com/.../faq-am623-package-s-pad-smo-information-needed https://e2e.ti.com/support/processors-group…
Part Number: AM620-Q1 Other Parts Discussed in Thread: SYSCONFIG , Tool/software: We are trying MCSPI communication on AM62x-SK(General Purpose) Eval board. we need clarification on following points.
1. we are trying to generate clock line using example…
Hello Gibbs
Thank you.
Gibbs Shih said: [Question 1] Which one is correct PU/PD internal Resistor?
I notice Resistor with three values (40/50/60/kΩ), which one is correct PU/PD resistor?
Please refer data sheet.
Internal pulls have a wide range.
Regards…
Part Number: AM620-Q1 Tool/software: Hi,
I have come across SBL boot in MCU+SDK that it has a secure boot support.
My question is in an AM62X platform for a fully secured device (HS-SE), if it is possible to use the M4F core with full integrity validation…