Part Number: AM62P-Q1 Other Parts Discussed in Thread: AM62P Hi, We are currently building a board with the AM62P-Q1 SoC. We would like to use the following Memory parts for our design. Can you confirm the compatibility with AM62P? Also, please let us…
Hello Elsa,
ELSA JOHN said: We would like to keep the impedance at 55E if it's acceptable.
Please refer below
Kallikuppa Sreenivasa said: The DPI nom impedance is 60E. 55E +/- 10% can be an option.
ELSA JOHN said: Also, PCKL has a series resistor…
Part Number: AM62P-Q1 Other Parts Discussed in Thread: AM62P , TPS65224 Hi,
We have a query about the I/O Only Plus DDR mode on the AM62P-Q1. While initiating this mode, it is mentioned in the technical reference manual that most of the rails are off…
Part Number: AM62P-Q1 Other Parts Discussed in Thread: AM62P Hi, We are currently building a board with AM62P-Q1 SoC. We would like to clarify some memory chipset related queries.
We are planning to use a 4GB/6GB part for the LPDDR4 with the following…
Part Number: AM62P-Q1 Hi,
On the EVK board, for the LPDDR4 routing, the T-branch is used for some signals. While looking at the EVK stackup, for the 3rd-layer routing, the impedance achieved is below the recommended value (Around 105.9E for a target…
Part Number: AM62P-Q1 Other Parts Discussed in Thread: AM62P Hello
We found the docs for security and HSM is quite old version, where can we download the latest versions for AM62p?
Thanks!
Part Number: AM62P-Q1 Other Parts Discussed in Thread: AM62P Hi TI Experts,
In our IVI system project, we are planning to interface the DPI output of the AM62P SoC with the UB921 serializer. From the AM62P SoC, we are planning to route the VOUT data…
Part Number: AM62P-Q1 Other Parts Discussed in Thread: AM62P Hi Expert,
A customer is currently evaluating the AM62P52CSMSIAMHRQ1 and AM62P54CVMSIAMHRQ1 for a new project.
The customer's requirements are listed below. Could you please confirm if the…
Part Number: AM62P-Q1 Hi everybody,
I am working with the AM62P-Q1 processor, especially on the MDIO interface. I checked the processor MDIO and MDC timings and i found out that the Delay time, MDIO[x]_MDC low to MDIO[x]_MDIO valid timing was violated…
Part Number: AM62P-Q1 Other Parts Discussed in Thread: SYSCONFIG Hi,
In our AM62P54-Q1 based application, we are would like to use all MCSPI interfaces(0,1,2) in the main domain, all MMC interfaces (0,1,2) and OSPI. Can you let me know which all interfaces…
