Part Number: AM6442 Hi Ti Team,
We are planning to use Kingston or ISSI LPDDR4 devices with the AM6442 processor in our design. Has TI validated AM6442 with any of these DRAMs? Can we safely use these manufacturers, and do you foresee any challenges…
Part Number: AM6442 Hi,
We are planning to use AM6442 in our custom board which has MAC to MAC RGMII interface.
So, could you please confirm which ethernet ports in AM6442 has MAC to MAC support(CPSW or PRU_ICSSG).
Warm Regards,
Mythili B
Part Number: AM6442 Hello, I am currently running into an issue with ospi multi-partitioned booting. My application is utilizing all the cores and these are the files I am flashing with the correct offsets: r5fss0-0.mcelf.hs_fs r5fss0-1.mcelf.hs_fs r5fss1…
Part Number: AM6442 Hello TI team,
I am working with an AM6442 and using PRU1_0 . I am using the PRU IEP timer as a precise timing source, and I am supplying the IEP clock from an external 20-MHz clock connected through MCU_REFCLK0 .
My goal is to…
Part Number: AM6442 Dear TI,
We currently have MT35XL512ABA1G12-0SIT designed in, and this works for us.
could you please let us know if AM64 can work with the following OSPI flash:
MT35XU512ABA1G12- A 0SIT
Will there be any changes required when…
Part Number: AM6442 Other Parts Discussed in Thread: SYSCONFIG Hello exparts,
When reading data from the NOR Flash and FRAM connected to the OSPI on the AM6442, we are encountering an issue where the data appears corrupted only on the first read. We…
Part Number: AM6442 We are using the AM6442BSFGHAALV processor for a new design.
Could you please clarify whether VMON_VSYS is intended for undervoltage detection, overvoltage detection, or both for pre regulator supply.
Additionally, the datasheet…
Part Number: AM6442 Other Parts Discussed in Thread: DRA829 , TDA4VM Hello,
We are using the AM6442 R5F core and would like to clarify the status of nested interrupt support on this device.
According to the AM64x TRM, the R5FSS VIM supports priority…
Part Number: AM6442 Hello,
On AM64 EVM SK schematic, it is implemented a NOR device using QSPI or OSPI :
The pin RESET is mainly driven in order reset the NOR device when the MPU is reseted. We study the use of device like Winbond W25Q32 in USON8…